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drm/amdgpu: Fix definition of KFD_CIK_SDMA_QUEUE_OFFSET

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This counts the queue offset in register index, not register address.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
This commit is contained in:
Felix Kuehling 2017-11-27 18:29:47 -05:00 committed by Oded Gabbay
parent 36582fa516
commit fdcba29c5d
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/amd/amdgpu/cikd.h
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@ -562,7 +562,7 @@
#define PRIVATE_BASE(x) ((x) << 0) /* scratch */ #define PRIVATE_BASE(x) ((x) << 0) /* scratch */
#define SHARED_BASE(x) ((x) << 16) /* LDS */ #define SHARED_BASE(x) ((x) << 16) /* LDS */
#define KFD_CIK_SDMA_QUEUE_OFFSET 0x200 #define KFD_CIK_SDMA_QUEUE_OFFSET (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL)
/* valid for both DEFAULT_MTYPE and APE1_MTYPE */ /* valid for both DEFAULT_MTYPE and APE1_MTYPE */
enum { enum {