This is the pxa changes for v4.17 cycle :
- minor changes for property API - clock API fix for ULPI driver warning It exceptionally contains a merge from the mtd tree from Boris to prevent any merge conflicts in the PXA tree. -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEExgkueSa0u8n4Ls+HA/Z63R24yxIFAlqi9CMXHHJvYmVydC5q YXJ6bWlrQGZyZWUuZnIACgkQA/Z63R24yxIa0g//aCllCGnEY2S5+hxtg7eCAkEg QKqBTpHhGUDpvix8MwWrt+089Kj5CWHknx7PWQs3YQj/XzevA5mX65szteICfDX2 K0BJj/OsecKBTCdHjVOEerM6Yy6nKrL0gX7zzUuD81H54Dk6os2pnruZEYEIn1HD /YhWprLs0sDqwjPI/a9Tfqw5N3nM3uStl0hp3HDplw2AtIovL/E4CrPt9Q3CCtEy Qj1PtM0ON9UkrlnHnFNEh3f5bja9Lwo1v3IueSoTWw8UdyxoA3itPXo+5pHZv5GG H4UXan1vYSaj1ISsAnOt9YuFxEMl4+d8BfKmzrqr2CAlNAeMPJRZ66UdYTecx1FJ z65kxxLiBi7r1eQqvBz6PhtKndHKUbBHJjc4RVJFm8PY7fzW/6LReDnHhUYpxfB1 K5BfzfIPjH3ex9PME370gZx6wdtaepSgeQFpo2jpCI1AXO1IFEdD0v/IkQounrUe fgBle5yW4qQMuG+EDDOn/aDosVx7uM4856V7JtMrhUecB8fMwZ0elCaCSnchZO/G mOeZUa9YXUOfFVBpKdidQzVxMQBP62zd8MFKOCOIkKUjfBC9AHRn1nLkXQak8hNt HjRY34YqIEzbn5+3SRJO9doTV7oXMSOTfDvsQFugalhOKgHRZo7IpkREhqWWXByw r7vKVVY1elTGKVVWdUQ= =/vgG -----END PGP SIGNATURE----- Merge tag 'pxa-for-4.17' of https://github.com/rjarzmik/linux into next/soc Pull "This is the pxa changes for v4.17 cycle" from Robert Jarzmik: - minor changes for property API - clock API fix for ULPI driver warning It exceptionally contains a merge from the mtd tree from Boris to prevent any merge conflicts in the PXA tree. * tag 'pxa-for-4.17' of https://github.com/rjarzmik/linux: ARM: pxa/raumfeld: use PROPERTY_ENTRY_U32() directly ARM: pxa: ulpi: fix ulpi timeout and slowpath warn ARM: pxa: cm-x300: remove inline directive ARM: pxa: fix static checker warning in pxa3xx-ulpi MAINTAINERS: remove entry for deleted pxa3xx_nand driver arm: dts: pxa: use reworked NAND controller driver dt-bindings: mtd: remove pxa3xx NAND controller documentation mtd: nand: remove useless fields from pxa3xx NAND platform data mtd: nand: remove deprecated pxa3xx_nand driver mtd: nand: use Marvell reworked NAND controller driver with all platforms
This commit is contained in:
commit
fdda85f696
@ -1,50 +0,0 @@
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PXA3xx NAND DT bindings
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Required properties:
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- compatible: Should be set to one of the following:
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marvell,pxa3xx-nand
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marvell,armada370-nand
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marvell,armada-8k-nand
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- reg: The register base for the controller
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- interrupts: The interrupt to map
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- #address-cells: Set to <1> if the node includes partitions
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- marvell,system-controller: Set to retrieve the syscon node that handles
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NAND controller related registers (only required
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with marvell,armada-8k-nand compatible).
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Optional properties:
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- dmas: dma data channel, see dma.txt binding doc
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- marvell,nand-enable-arbiter: Set to enable the bus arbiter
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- marvell,nand-keep-config: Set to keep the NAND controller config as set
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by the bootloader
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- num-cs: Number of chipselect lines to use
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- nand-on-flash-bbt: boolean to enable on flash bbt option if
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not present false
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- nand-ecc-strength: number of bits to correct per ECC step
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- nand-ecc-step-size: number of data bytes covered by a single ECC step
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The following ECC strength and step size are currently supported:
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- nand-ecc-strength = <1>, nand-ecc-step-size = <512>
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- nand-ecc-strength = <4>, nand-ecc-step-size = <512>
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- nand-ecc-strength = <8>, nand-ecc-step-size = <512>
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Example:
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nand0: nand@43100000 {
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compatible = "marvell,pxa3xx-nand";
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reg = <0x43100000 90>;
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interrupts = <45>;
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dmas = <&pdma 97 0>;
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dma-names = "data";
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#address-cells = <1>;
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marvell,nand-enable-arbiter;
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marvell,nand-keep-config;
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num-cs = <1>;
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/* partitions (optional) */
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};
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@ -11365,12 +11365,6 @@ F: include/sound/pxa2xx-lib.h
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F: sound/arm/pxa*
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F: sound/soc/pxa/
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PXA3xx NAND FLASH DRIVER
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M: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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L: linux-mtd@lists.infradead.org
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S: Maintained
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F: drivers/mtd/nand/pxa3xx_nand.c
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QAT DRIVER
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M: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
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L: qat-linux@intel.com
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@ -117,15 +117,15 @@
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status = "disabled";
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};
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nand0: nand@43100000 {
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compatible = "marvell,pxa3xx-nand";
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nand_controller: nand-controller@43100000 {
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compatible = "marvell,pxa3xx-nand-controller";
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reg = <0x43100000 90>;
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interrupts = <45>;
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clocks = <&clks CLK_NAND>;
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dmas = <&pdma 97 3>;
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dma-names = "data";
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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@ -49,7 +49,7 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
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CONFIG_MTD=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_PXA3xx=y
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CONFIG_MTD_NAND_MARVELL=y
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CONFIG_MTD_UBI=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_RAM=y
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@ -32,8 +32,7 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
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CONFIG_MTD=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_PXA3xx=y
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CONFIG_MTD_NAND_PXA3xx_BUILTIN=y
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CONFIG_MTD_NAND_MARVELL=y
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CONFIG_MTD_ONENAND=y
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CONFIG_MTD_ONENAND_VERIFY_WRITE=y
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CONFIG_MTD_ONENAND_GENERIC=y
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|
@ -197,7 +197,7 @@ CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000
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CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y
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CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y
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CONFIG_MTD_NAND_SHARPSL=m
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CONFIG_MTD_NAND_PXA3xx=m
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CONFIG_MTD_NAND_MARVELL=m
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CONFIG_MTD_NAND_CM_X270=m
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CONFIG_MTD_NAND_TMIO=m
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CONFIG_MTD_NAND_BRCMNAND=m
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@ -33,7 +33,7 @@ CONFIG_NFTL=y
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CONFIG_NFTL_RW=y
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CONFIG_MTD_BLOCK2MTD=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_PXA3xx=y
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CONFIG_MTD_NAND_MARVELL=y
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CONFIG_MTD_UBI=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_ISL29003=y
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@ -172,10 +172,8 @@ static struct mtd_partition aspenite_nand_partitions[] = {
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};
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static struct pxa3xx_nand_platform_data aspenite_nand_info = {
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.enable_arbiter = 1,
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.num_cs = 1,
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.parts[0] = aspenite_nand_partitions,
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.nr_parts[0] = ARRAY_SIZE(aspenite_nand_partitions),
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.parts = aspenite_nand_partitions,
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.nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
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};
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static struct i2c_board_info aspenite_i2c_info[] __initdata = {
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@ -178,11 +178,8 @@ static struct mv_usb_platform_data ttc_usb_pdata = {
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#endif
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#endif
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#if IS_ENABLED(CONFIG_MTD_NAND_PXA3xx)
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static struct pxa3xx_nand_platform_data dkb_nand_info = {
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.enable_arbiter = 1,
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.num_cs = 1,
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};
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#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
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static struct pxa3xx_nand_platform_data dkb_nand_info = {};
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#endif
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#if IS_ENABLED(CONFIG_MMP_DISP)
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@ -275,7 +272,7 @@ static void __init ttc_dkb_init(void)
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/* on-chip devices */
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pxa910_add_uart(1);
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#if IS_ENABLED(CONFIG_MTD_NAND_PXA3xx)
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#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
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pxa910_add_nand(&dkb_nand_info);
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#endif
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@ -391,7 +391,7 @@ static void __init cm_x300_init_ac97(void)
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static inline void cm_x300_init_ac97(void) {}
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#endif
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#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
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#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
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static struct mtd_partition cm_x300_nand_partitions[] = {
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[0] = {
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.name = "OBM",
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@ -429,11 +429,9 @@ static struct mtd_partition cm_x300_nand_partitions[] = {
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};
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static struct pxa3xx_nand_platform_data cm_x300_nand_info = {
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.enable_arbiter = 1,
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.keep_config = 1,
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.num_cs = 1,
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.parts[0] = cm_x300_nand_partitions,
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.nr_parts[0] = ARRAY_SIZE(cm_x300_nand_partitions),
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.parts = cm_x300_nand_partitions,
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.nr_parts = ARRAY_SIZE(cm_x300_nand_partitions),
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};
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static void __init cm_x300_init_nand(void)
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@ -509,7 +507,7 @@ static int cm_x300_ulpi_phy_reset(void)
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return 0;
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}
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static inline int cm_x300_u2d_init(struct device *dev)
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static int cm_x300_u2d_init(struct device *dev)
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{
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int err = 0;
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@ -521,7 +519,7 @@ static inline int cm_x300_u2d_init(struct device *dev)
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pr_err("failed to get CLK_POUT: %d\n", err);
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return err;
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}
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clk_enable(pout_clk);
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clk_prepare_enable(pout_clk);
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err = cm_x300_ulpi_phy_reset();
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if (err) {
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@ -536,7 +534,7 @@ static inline int cm_x300_u2d_init(struct device *dev)
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static void cm_x300_u2d_exit(struct device *dev)
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{
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if (cpu_is_pxa310()) {
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clk_disable(pout_clk);
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clk_disable_unprepare(pout_clk);
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clk_put(pout_clk);
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}
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}
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@ -110,7 +110,7 @@ void __init colibri_pxa3xx_init_lcd(int bl_pin)
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}
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#endif
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#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
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#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
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static struct mtd_partition colibri_nand_partitions[] = {
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{
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.name = "bootloader",
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@ -138,11 +138,9 @@ static struct mtd_partition colibri_nand_partitions[] = {
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};
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static struct pxa3xx_nand_platform_data colibri_nand_info = {
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.enable_arbiter = 1,
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.keep_config = 1,
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.num_cs = 1,
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.parts[0] = colibri_nand_partitions,
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.nr_parts[0] = ARRAY_SIZE(colibri_nand_partitions),
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.parts = colibri_nand_partitions,
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.nr_parts = ARRAY_SIZE(colibri_nand_partitions),
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};
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void __init colibri_pxa3xx_init_nand(void)
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|
@ -46,7 +46,7 @@ static inline void colibri_pxa3xx_init_lcd(int bl_pin) {}
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extern void colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data);
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#endif
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#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
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#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
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extern void colibri_pxa3xx_init_nand(void);
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#else
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static inline void colibri_pxa3xx_init_nand(void) {}
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|
@ -291,7 +291,7 @@ static void __init littleton_init_mmc(void)
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static inline void littleton_init_mmc(void) {}
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#endif
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#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
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#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
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static struct mtd_partition littleton_nand_partitions[] = {
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[0] = {
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.name = "Bootloader",
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@ -329,10 +329,8 @@ static struct mtd_partition littleton_nand_partitions[] = {
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};
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static struct pxa3xx_nand_platform_data littleton_nand_info = {
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.enable_arbiter = 1,
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.num_cs = 1,
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.parts[0] = littleton_nand_partitions,
|
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.nr_parts[0] = ARRAY_SIZE(littleton_nand_partitions),
|
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.parts = littleton_nand_partitions,
|
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.nr_parts = ARRAY_SIZE(littleton_nand_partitions),
|
||||
};
|
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|
||||
static void __init littleton_init_nand(void)
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@ -341,7 +339,7 @@ static void __init littleton_init_nand(void)
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}
|
||||
#else
|
||||
static inline void littleton_init_nand(void) {}
|
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#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
|
||||
#endif /* IS_ENABLED(CONFIG_MTD_NAND_MARVELL) */
|
||||
|
||||
#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
|
||||
static struct led_info littleton_da9034_leds[] = {
|
||||
|
@ -359,7 +359,7 @@ void __init mxm_8x10_ac97_init(void)
|
||||
}
|
||||
|
||||
/* NAND flash Support */
|
||||
#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
|
||||
#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
|
||||
#define NAND_BLOCK_SIZE SZ_128K
|
||||
#define NB(x) (NAND_BLOCK_SIZE * (x))
|
||||
static struct mtd_partition mxm_8x10_nand_partitions[] = {
|
||||
@ -389,11 +389,9 @@ static struct mtd_partition mxm_8x10_nand_partitions[] = {
|
||||
};
|
||||
|
||||
static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = {
|
||||
.enable_arbiter = 1,
|
||||
.keep_config = 1,
|
||||
.num_cs = 1,
|
||||
.parts[0] = mxm_8x10_nand_partitions,
|
||||
.nr_parts[0] = ARRAY_SIZE(mxm_8x10_nand_partitions)
|
||||
.parts = mxm_8x10_nand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(mxm_8x10_nand_partitions)
|
||||
};
|
||||
|
||||
static void __init mxm_8x10_nand_init(void)
|
||||
@ -402,7 +400,7 @@ static void __init mxm_8x10_nand_init(void)
|
||||
}
|
||||
#else
|
||||
static inline void mxm_8x10_nand_init(void) {}
|
||||
#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
|
||||
#endif /* IS_ENABLED(CONFIG_MTD_NAND_MARVELL) */
|
||||
|
||||
/* Ethernet support: Davicom DM9000 */
|
||||
static struct resource dm9k_resources[] = {
|
||||
|
@ -256,7 +256,7 @@ int pxa3xx_u2d_start_hc(struct usb_bus *host)
|
||||
if (!u2d)
|
||||
return 0;
|
||||
|
||||
clk_enable(u2d->clk);
|
||||
clk_prepare_enable(u2d->clk);
|
||||
|
||||
if (cpu_is_pxa310()) {
|
||||
pxa310_u2d_setup_otg_hc();
|
||||
@ -276,7 +276,7 @@ void pxa3xx_u2d_stop_hc(struct usb_bus *host)
|
||||
if (cpu_is_pxa310())
|
||||
pxa310_stop_otg_hc();
|
||||
|
||||
clk_disable(u2d->clk);
|
||||
clk_disable_unprepare(u2d->clk);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa3xx_u2d_stop_hc);
|
||||
|
||||
@ -331,7 +331,7 @@ static int pxa3xx_u2d_probe(struct platform_device *pdev)
|
||||
goto err_free_plat;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, &u2d);
|
||||
platform_set_drvdata(pdev, u2d);
|
||||
|
||||
return 0;
|
||||
|
||||
|
@ -346,11 +346,9 @@ static struct mtd_partition raumfeld_nand_partitions[] = {
|
||||
};
|
||||
|
||||
static struct pxa3xx_nand_platform_data raumfeld_nand_info = {
|
||||
.enable_arbiter = 1,
|
||||
.keep_config = 1,
|
||||
.num_cs = 1,
|
||||
.parts[0] = raumfeld_nand_partitions,
|
||||
.nr_parts[0] = ARRAY_SIZE(raumfeld_nand_partitions),
|
||||
.parts = raumfeld_nand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(raumfeld_nand_partitions),
|
||||
};
|
||||
|
||||
/**
|
||||
@ -378,9 +376,9 @@ static struct gpiod_lookup_table raumfeld_rotary_gpios_table = {
|
||||
};
|
||||
|
||||
static const struct property_entry raumfeld_rotary_properties[] __initconst = {
|
||||
PROPERTY_ENTRY_INTEGER("rotary-encoder,steps-per-period", u32, 24),
|
||||
PROPERTY_ENTRY_INTEGER("linux,axis", u32, REL_X),
|
||||
PROPERTY_ENTRY_INTEGER("rotary-encoder,relative_axis", u32, 1),
|
||||
PROPERTY_ENTRY_U32("rotary-encoder,steps-per-period", 24),
|
||||
PROPERTY_ENTRY_U32("linux,axis", REL_X),
|
||||
PROPERTY_ENTRY_U32("rotary-encoder,relative_axis", 1),
|
||||
{ },
|
||||
};
|
||||
|
||||
|
@ -338,7 +338,7 @@ static void __init zylonite_init_keypad(void)
|
||||
static inline void zylonite_init_keypad(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
|
||||
#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
|
||||
static struct mtd_partition zylonite_nand_partitions[] = {
|
||||
[0] = {
|
||||
.name = "Bootloader",
|
||||
@ -376,10 +376,8 @@ static struct mtd_partition zylonite_nand_partitions[] = {
|
||||
};
|
||||
|
||||
static struct pxa3xx_nand_platform_data zylonite_nand_info = {
|
||||
.enable_arbiter = 1,
|
||||
.num_cs = 1,
|
||||
.parts[0] = zylonite_nand_partitions,
|
||||
.nr_parts[0] = ARRAY_SIZE(zylonite_nand_partitions),
|
||||
.parts = zylonite_nand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(zylonite_nand_partitions),
|
||||
};
|
||||
|
||||
static void __init zylonite_init_nand(void)
|
||||
@ -388,7 +386,7 @@ static void __init zylonite_init_nand(void)
|
||||
}
|
||||
#else
|
||||
static inline void zylonite_init_nand(void) {}
|
||||
#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
|
||||
#endif /* IS_ENABLED(CONFIG_MTD_NAND_MARVELL) */
|
||||
|
||||
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
|
||||
static struct pxaohci_platform_data zylonite_ohci_info = {
|
||||
|
@ -313,17 +313,6 @@ config MTD_NAND_ATMEL
|
||||
Enables support for NAND Flash / Smart Media Card interface
|
||||
on Atmel AT91 processors.
|
||||
|
||||
config MTD_NAND_PXA3xx
|
||||
tristate "NAND support on PXA3xx and Armada 370/XP"
|
||||
depends on !MTD_NAND_MARVELL
|
||||
depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU
|
||||
help
|
||||
|
||||
This enables the driver for the NAND flash device found on
|
||||
PXA3xx processors (NFCv1) and also on 32-bit Armada
|
||||
platforms (XP, 370, 375, 38x, 39x) and 64-bit Armada
|
||||
platforms (7K, 8K) (NFCv2).
|
||||
|
||||
config MTD_NAND_MARVELL
|
||||
tristate "NAND controller support on Marvell boards"
|
||||
depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \
|
||||
|
@ -31,7 +31,6 @@ omap2_nand-objs := omap2.o
|
||||
obj-$(CONFIG_MTD_NAND_OMAP2) += omap2_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_OMAP_BCH_BUILD) += omap_elm.o
|
||||
obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_MARVELL) += marvell_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
|
||||
|
@ -2520,8 +2520,7 @@ static int marvell_nand_chip_init(struct device *dev, struct marvell_nfc *nfc,
|
||||
|
||||
if (pdata)
|
||||
/* Legacy bindings support only one chip */
|
||||
ret = mtd_device_register(mtd, pdata->parts[0],
|
||||
pdata->nr_parts[0]);
|
||||
ret = mtd_device_register(mtd, pdata->parts, pdata->nr_parts);
|
||||
else
|
||||
ret = mtd_device_register(mtd, NULL, 0);
|
||||
if (ret) {
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -6,41 +6,22 @@
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
||||
/*
|
||||
* Current pxa3xx_nand controller has two chip select which
|
||||
* both be workable.
|
||||
*
|
||||
* Notice should be taken that:
|
||||
* When you want to use this feature, you should not enable the
|
||||
* keep configuration feature, for two chip select could be
|
||||
* attached with different nand chip. The different page size
|
||||
* and timing requirement make the keep configuration impossible.
|
||||
* Current pxa3xx_nand controller has two chip select which both be workable but
|
||||
* historically all platforms remaining on platform data used only one. Switch
|
||||
* to device tree if you need more.
|
||||
*/
|
||||
|
||||
/* The max num of chip select current support */
|
||||
#define NUM_CHIP_SELECT (2)
|
||||
struct pxa3xx_nand_platform_data {
|
||||
|
||||
/* the data flash bus is shared between the Static Memory
|
||||
* Controller and the Data Flash Controller, the arbiter
|
||||
* controls the ownership of the bus
|
||||
*/
|
||||
int enable_arbiter;
|
||||
|
||||
/* allow platform code to keep OBM/bootloader defined NFC config */
|
||||
int keep_config;
|
||||
|
||||
/* indicate how many chip selects will be used */
|
||||
int num_cs;
|
||||
|
||||
/* use an flash-based bad block table */
|
||||
bool flash_bbt;
|
||||
|
||||
/* requested ECC strength and ECC step size */
|
||||
/* Keep OBM/bootloader NFC timing configuration */
|
||||
bool keep_config;
|
||||
/* Use a flash-based bad block table */
|
||||
bool flash_bbt;
|
||||
/* Requested ECC strength and ECC step size */
|
||||
int ecc_strength, ecc_step_size;
|
||||
|
||||
const struct mtd_partition *parts[NUM_CHIP_SELECT];
|
||||
unsigned int nr_parts[NUM_CHIP_SELECT];
|
||||
/* Partitions */
|
||||
const struct mtd_partition *parts;
|
||||
unsigned int nr_parts;
|
||||
};
|
||||
|
||||
extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
|
||||
|
||||
#endif /* __ASM_ARCH_PXA3XX_NAND_H */
|
||||
|
Loading…
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Reference in New Issue
Block a user