drm/amd/display: fix type of variable
Currently, the maximum value that *counter* can reach is 255, and code at line 150: while (counter < 1000) { implies a bigger value could be expected. Fix this by changing the type of variable *counter* from uint8_t to uint16_t. Addresses-Coverity-ID: 1470030 ("Operands don't affect result") Fixes: 2b6199a1d1b7 ("drm/amd/display: replace msleep with udelay in fbc path") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -143,7 +143,7 @@ static void wait_for_fbc_state_changed(
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struct dce110_compressor *cp110,
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bool enabled)
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{
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uint8_t counter = 0;
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uint16_t counter = 0;
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uint32_t addr = mmFBC_STATUS;
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uint32_t value;
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