arm64: dts: imx8mm-kontron: Fix reset delays for ethernet PHY
[ Upstream commit 315e7b884190a6c9c28e95ad3b724dde9e922b99 ] According to the datasheet the VSC8531 PHY expects a reset pulse of 100 ns and a delay of 15 ms after the reset has been deasserted. Set the matching values in the devicetree. Reported-by: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -123,8 +123,8 @@
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ethphy: ethernet-phy@0 {
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reg = <0>;
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reset-assert-us = <100>;
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reset-deassert-us = <100>;
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reset-assert-us = <1>;
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reset-deassert-us = <15000>;
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reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
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};
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};
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