Nuvoton device tree updates for 5.18
* Additions to wpcm450 following the upstremaing of the pinctrl/gpio
driver for this platform
* Match more of the platform in MAINTAINERS
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Merge tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt
Nuvoton device tree updates for 5.18
* Additions to wpcm450 following the upstremaing of the pinctrl/gpio
driver for this platform
* Match more of the platform in MAINTAINERS
* tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
MAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki
ARM: dts: wpcm450: Add pinmux information to UART0
ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons
ARM: dts: wpcm450: Add pin functions
ARM: dts: wpcm450: Add pinctrl and GPIO nodes
ARM: dts: wpcm450: Add global control registers (GCR) node
MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture
dt-bindings: arm/npcm: Add binding for global control registers (GCR)
Link: https://lore.kernel.org/r/CACPK8XdjF6dG04hR+iMpUP8=LSJi5x-hRivgCGDaY7o_461eJw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
fee1601dc2
48
Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml
Normal file
48
Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml
Normal file
@ -0,0 +1,48 @@
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||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Global Control Registers block in Nuvoton SoCs
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maintainers:
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- Jonathan Neuschäfer <j.neuschaefer@gmx.net>
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description:
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The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs
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||||
that expose misc functionality such as chip model and version information or
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pinmux settings.
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properties:
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compatible:
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items:
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- enum:
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- nuvoton,wpcm450-gcr
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- nuvoton,npcm750-gcr
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- const: syscon
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- const: simple-mfd
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reg:
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||||
maxItems: 1
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||||
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||||
required:
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- compatible
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- reg
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||||
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||||
additionalProperties:
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||||
type: object
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||||
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examples:
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- |
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gcr: syscon@800000 {
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compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
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reg = <0x800000 0x1000>;
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mux-controller {
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compatible = "mmio-mux";
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#mux-control-cells = <1>;
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||||
mux-reg-masks = <0x38 0x07>;
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idle-states = <2>;
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};
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};
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@ -2364,6 +2364,7 @@ L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
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S: Supported
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F: Documentation/devicetree/bindings/*/*/*npcm*
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F: Documentation/devicetree/bindings/*/*npcm*
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F: Documentation/devicetree/bindings/arm/npcm/*
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F: arch/arm/boot/dts/nuvoton-npcm*
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F: arch/arm/mach-npcm/
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F: drivers/*/*npcm*
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@ -2374,6 +2375,7 @@ ARM/NUVOTON WPCM450 ARCHITECTURE
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M: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
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L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
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S: Maintained
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W: https://github.com/neuschaefer/wpcm450/wiki
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F: Documentation/devicetree/bindings/*/*wpcm*
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F: arch/arm/boot/dts/nuvoton-wpcm450*
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F: arch/arm/mach-npcm/wpcm450.c
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@ -8,6 +8,9 @@
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#include "nuvoton-wpcm450.dtsi"
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Supermicro X9SCi-LN4F BMC";
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compatible = "supermicro,x9sci-ln4f-bmc", "nuvoton,wpcm450";
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@ -20,6 +23,46 @@
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device_type = "memory";
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reg = <0 0x08000000>; /* 128 MiB */
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&key_pins>;
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uid {
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label = "UID button";
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linux,code = <KEY_HOME>;
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gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pins>;
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uid {
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label = "UID";
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gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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};
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heartbeat {
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label = "heartbeat";
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gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
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};
|
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};
|
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};
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|
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&pinctrl {
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key_pins: mux-keys {
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groups = "gspi", "sspi";
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function = "gpio";
|
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};
|
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|
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led_pins: mux-leds {
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groups = "hg3", "hg0", "pwm4";
|
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function = "gpio";
|
||||
};
|
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};
|
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|
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&serial0 {
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@ -8,6 +8,17 @@
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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gpio3 = &gpio3;
|
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gpio4 = &gpio4;
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gpio5 = &gpio5;
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gpio6 = &gpio6;
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gpio7 = &gpio7;
|
||||
};
|
||||
|
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cpus {
|
||||
#address-cells = <1>;
|
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#size-cells = <0>;
|
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@ -33,12 +44,19 @@
|
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interrupt-parent = <&aic>;
|
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ranges;
|
||||
|
||||
gcr: syscon@b0000000 {
|
||||
compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
|
||||
reg = <0xb0000000 0x200>;
|
||||
};
|
||||
|
||||
serial0: serial@b8000000 {
|
||||
compatible = "nuvoton,wpcm450-uart";
|
||||
reg = <0xb8000000 0x20>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk24m>;
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&bsp_pins>;
|
||||
status = "disabled";
|
||||
};
|
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|
||||
@ -72,5 +90,371 @@
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pinctrl: pinctrl@b8003000 {
|
||||
compatible = "nuvoton,wpcm450-pinctrl";
|
||||
reg = <0xb8003000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio0: gpio@0 {
|
||||
reg = <0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
gpio1: gpio@1 {
|
||||
reg = <1>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
gpio2: gpio@2 {
|
||||
reg = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
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gpio3: gpio@3 {
|
||||
reg = <3>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpio4: gpio@4 {
|
||||
reg = <4>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpio5: gpio@5 {
|
||||
reg = <5>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpio6: gpio@6 {
|
||||
reg = <6>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpio7: gpio@7 {
|
||||
reg = <7>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
smb3_pins: mux-smb3 {
|
||||
groups = "smb3";
|
||||
function = "smb3";
|
||||
};
|
||||
|
||||
smb4_pins: mux-smb4 {
|
||||
groups = "smb4";
|
||||
function = "smb4";
|
||||
};
|
||||
|
||||
smb5_pins: mux-smb5 {
|
||||
groups = "smb5";
|
||||
function = "smb5";
|
||||
};
|
||||
|
||||
scs1_pins: mux-scs1 {
|
||||
groups = "scs1";
|
||||
function = "scs1";
|
||||
};
|
||||
|
||||
scs2_pins: mux-scs2 {
|
||||
groups = "scs2";
|
||||
function = "scs2";
|
||||
};
|
||||
|
||||
scs3_pins: mux-scs3 {
|
||||
groups = "scs3";
|
||||
function = "scs3";
|
||||
};
|
||||
|
||||
smb0_pins: mux-smb0 {
|
||||
groups = "smb0";
|
||||
function = "smb0";
|
||||
};
|
||||
|
||||
smb1_pins: mux-smb1 {
|
||||
groups = "smb1";
|
||||
function = "smb1";
|
||||
};
|
||||
|
||||
smb2_pins: mux-smb2 {
|
||||
groups = "smb2";
|
||||
function = "smb2";
|
||||
};
|
||||
|
||||
bsp_pins: mux-bsp {
|
||||
groups = "bsp";
|
||||
function = "bsp";
|
||||
};
|
||||
|
||||
hsp1_pins: mux-hsp1 {
|
||||
groups = "hsp1";
|
||||
function = "hsp1";
|
||||
};
|
||||
|
||||
hsp2_pins: mux-hsp2 {
|
||||
groups = "hsp2";
|
||||
function = "hsp2";
|
||||
};
|
||||
|
||||
r1err_pins: mux-r1err {
|
||||
groups = "r1err";
|
||||
function = "r1err";
|
||||
};
|
||||
|
||||
r1md_pins: mux-r1md {
|
||||
groups = "r1md";
|
||||
function = "r1md";
|
||||
};
|
||||
|
||||
rmii2_pins: mux-rmii2 {
|
||||
groups = "rmii2";
|
||||
function = "rmii2";
|
||||
};
|
||||
|
||||
r2err_pins: mux-r2err {
|
||||
groups = "r2err";
|
||||
function = "r2err";
|
||||
};
|
||||
|
||||
r2md_pins: mux-r2md {
|
||||
groups = "r2md";
|
||||
function = "r2md";
|
||||
};
|
||||
|
||||
kbcc_pins: mux-kbcc {
|
||||
groups = "kbcc";
|
||||
function = "kbcc";
|
||||
};
|
||||
|
||||
dvo0_pins: mux-dvo0 {
|
||||
groups = "dvo";
|
||||
function = "dvo0";
|
||||
};
|
||||
|
||||
dvo3_pins: mux-dvo3 {
|
||||
groups = "dvo";
|
||||
function = "dvo3";
|
||||
};
|
||||
|
||||
clko_pins: mux-clko {
|
||||
groups = "clko";
|
||||
function = "clko";
|
||||
};
|
||||
|
||||
smi_pins: mux-smi {
|
||||
groups = "smi";
|
||||
function = "smi";
|
||||
};
|
||||
|
||||
uinc_pins: mux-uinc {
|
||||
groups = "uinc";
|
||||
function = "uinc";
|
||||
};
|
||||
|
||||
gspi_pins: mux-gspi {
|
||||
groups = "gspi";
|
||||
function = "gspi";
|
||||
};
|
||||
|
||||
mben_pins: mux-mben {
|
||||
groups = "mben";
|
||||
function = "mben";
|
||||
};
|
||||
|
||||
xcs2_pins: mux-xcs2 {
|
||||
groups = "xcs2";
|
||||
function = "xcs2";
|
||||
};
|
||||
|
||||
xcs1_pins: mux-xcs1 {
|
||||
groups = "xcs1";
|
||||
function = "xcs1";
|
||||
};
|
||||
|
||||
sdio_pins: mux-sdio {
|
||||
groups = "sdio";
|
||||
function = "sdio";
|
||||
};
|
||||
|
||||
sspi_pins: mux-sspi {
|
||||
groups = "sspi";
|
||||
function = "sspi";
|
||||
};
|
||||
|
||||
fi0_pins: mux-fi0 {
|
||||
groups = "fi0";
|
||||
function = "fi0";
|
||||
};
|
||||
|
||||
fi1_pins: mux-fi1 {
|
||||
groups = "fi1";
|
||||
function = "fi1";
|
||||
};
|
||||
|
||||
fi2_pins: mux-fi2 {
|
||||
groups = "fi2";
|
||||
function = "fi2";
|
||||
};
|
||||
|
||||
fi3_pins: mux-fi3 {
|
||||
groups = "fi3";
|
||||
function = "fi3";
|
||||
};
|
||||
|
||||
fi4_pins: mux-fi4 {
|
||||
groups = "fi4";
|
||||
function = "fi4";
|
||||
};
|
||||
|
||||
fi5_pins: mux-fi5 {
|
||||
groups = "fi5";
|
||||
function = "fi5";
|
||||
};
|
||||
|
||||
fi6_pins: mux-fi6 {
|
||||
groups = "fi6";
|
||||
function = "fi6";
|
||||
};
|
||||
|
||||
fi7_pins: mux-fi7 {
|
||||
groups = "fi7";
|
||||
function = "fi7";
|
||||
};
|
||||
|
||||
fi8_pins: mux-fi8 {
|
||||
groups = "fi8";
|
||||
function = "fi8";
|
||||
};
|
||||
|
||||
fi9_pins: mux-fi9 {
|
||||
groups = "fi9";
|
||||
function = "fi9";
|
||||
};
|
||||
|
||||
fi10_pins: mux-fi10 {
|
||||
groups = "fi10";
|
||||
function = "fi10";
|
||||
};
|
||||
|
||||
fi11_pins: mux-fi11 {
|
||||
groups = "fi11";
|
||||
function = "fi11";
|
||||
};
|
||||
|
||||
fi12_pins: mux-fi12 {
|
||||
groups = "fi12";
|
||||
function = "fi12";
|
||||
};
|
||||
|
||||
fi13_pins: mux-fi13 {
|
||||
groups = "fi13";
|
||||
function = "fi13";
|
||||
};
|
||||
|
||||
fi14_pins: mux-fi14 {
|
||||
groups = "fi14";
|
||||
function = "fi14";
|
||||
};
|
||||
|
||||
fi15_pins: mux-fi15 {
|
||||
groups = "fi15";
|
||||
function = "fi15";
|
||||
};
|
||||
|
||||
pwm0_pins: mux-pwm0 {
|
||||
groups = "pwm0";
|
||||
function = "pwm0";
|
||||
};
|
||||
|
||||
pwm1_pins: mux-pwm1 {
|
||||
groups = "pwm1";
|
||||
function = "pwm1";
|
||||
};
|
||||
|
||||
pwm2_pins: mux-pwm2 {
|
||||
groups = "pwm2";
|
||||
function = "pwm2";
|
||||
};
|
||||
|
||||
pwm3_pins: mux-pwm3 {
|
||||
groups = "pwm3";
|
||||
function = "pwm3";
|
||||
};
|
||||
|
||||
pwm4_pins: mux-pwm4 {
|
||||
groups = "pwm4";
|
||||
function = "pwm4";
|
||||
};
|
||||
|
||||
pwm5_pins: mux-pwm5 {
|
||||
groups = "pwm5";
|
||||
function = "pwm5";
|
||||
};
|
||||
|
||||
pwm6_pins: mux-pwm6 {
|
||||
groups = "pwm6";
|
||||
function = "pwm6";
|
||||
};
|
||||
|
||||
pwm7_pins: mux-pwm7 {
|
||||
groups = "pwm7";
|
||||
function = "pwm7";
|
||||
};
|
||||
|
||||
hg0_pins: mux-hg0 {
|
||||
groups = "hg0";
|
||||
function = "hg0";
|
||||
};
|
||||
|
||||
hg1_pins: mux-hg1 {
|
||||
groups = "hg1";
|
||||
function = "hg1";
|
||||
};
|
||||
|
||||
hg2_pins: mux-hg2 {
|
||||
groups = "hg2";
|
||||
function = "hg2";
|
||||
};
|
||||
|
||||
hg3_pins: mux-hg3 {
|
||||
groups = "hg3";
|
||||
function = "hg3";
|
||||
};
|
||||
|
||||
hg4_pins: mux-hg4 {
|
||||
groups = "hg4";
|
||||
function = "hg4";
|
||||
};
|
||||
|
||||
hg5_pins: mux-hg5 {
|
||||
groups = "hg5";
|
||||
function = "hg5";
|
||||
};
|
||||
|
||||
hg6_pins: mux-hg6 {
|
||||
groups = "hg6";
|
||||
function = "hg6";
|
||||
};
|
||||
|
||||
hg7_pins: mux-hg7 {
|
||||
groups = "hg7";
|
||||
function = "hg7";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user