rtw89: 8852c: add mac_ctrl_path and mac_cfg_gnt APIs
The BT-coexistence uses these function to control antenna and TDMA, so implement the variant type to support all chips. Signed-off-by: Chia-Yuan Li <leo.li@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220317055543.40514-10-pkshih@realtek.com
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@ -1478,7 +1478,7 @@ static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
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}
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}
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rtw89_mac_cfg_gnt(rtwdev, &dm->gnt);
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rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
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}
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#define BTC_TDMA_WLROLE_MAX 2
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@ -2233,7 +2233,7 @@ static void _set_gnt_bt(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
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}
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}
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rtw89_mac_cfg_gnt(rtwdev, &dm->gnt);
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rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
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}
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static void _set_bt_plut(struct rtw89_dev *rtwdev, u8 phy_map,
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@ -2300,7 +2300,7 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec,
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switch (type) {
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case BTC_ANT_WPOWERON:
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rtw89_mac_cfg_ctrl_path(rtwdev, false);
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rtw89_chip_cfg_ctrl_path(rtwdev, false);
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break;
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case BTC_ANT_WINIT:
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if (bt->enable.now) {
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@ -2310,21 +2310,21 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec,
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
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}
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rtw89_mac_cfg_ctrl_path(rtwdev, true);
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_BT, BTC_PLT_BT);
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break;
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case BTC_ANT_WONLY:
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
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rtw89_mac_cfg_ctrl_path(rtwdev, true);
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_WOFF:
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rtw89_mac_cfg_ctrl_path(rtwdev, false);
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rtw89_chip_cfg_ctrl_path(rtwdev, false);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_W2G:
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rtw89_mac_cfg_ctrl_path(rtwdev, true);
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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if (rtwdev->dbcc_en) {
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for (i = 0; i < RTW89_PHY_MAX; i++) {
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b2g = (wl_dinfo->real_band[i] == RTW89_BAND_2G);
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@ -2352,32 +2352,32 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec,
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}
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break;
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case BTC_ANT_W5G:
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rtw89_mac_cfg_ctrl_path(rtwdev, true);
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_W25G:
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rtw89_mac_cfg_ctrl_path(rtwdev, true);
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_HW);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
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_set_bt_plut(rtwdev, BTC_PHY_ALL,
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BTC_PLT_GNT_WL, BTC_PLT_GNT_WL);
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break;
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case BTC_ANT_FREERUN:
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rtw89_mac_cfg_ctrl_path(rtwdev, true);
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_WRFK:
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rtw89_mac_cfg_ctrl_path(rtwdev, true);
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
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_set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_BRFK:
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rtw89_mac_cfg_ctrl_path(rtwdev, false);
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rtw89_chip_cfg_ctrl_path(rtwdev, false);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_LO);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE);
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@ -2068,6 +2068,9 @@ struct rtw89_chip_ops {
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s8 pw_ofst, enum rtw89_mac_idx mac_idx);
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int (*pwr_on_func)(struct rtw89_dev *rtwdev);
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int (*pwr_off_func)(struct rtw89_dev *rtwdev);
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int (*cfg_ctrl_path)(struct rtw89_dev *rtwdev, bool wl);
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int (*mac_cfg_gnt)(struct rtw89_dev *rtwdev,
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const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
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void (*btc_set_rfe)(struct rtw89_dev *rtwdev);
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void (*btc_init_cfg)(struct rtw89_dev *rtwdev);
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@ -3467,6 +3470,22 @@ static inline void rtw89_ctrl_btg(struct rtw89_dev *rtwdev, bool btg)
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chip->ops->ctrl_btg(rtwdev, btg);
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}
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static inline
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void rtw89_chip_mac_cfg_gnt(struct rtw89_dev *rtwdev,
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const struct rtw89_mac_ax_coex_gnt *gnt_cfg)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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chip->ops->mac_cfg_gnt(rtwdev, gnt_cfg);
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}
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static inline void rtw89_chip_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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chip->ops->cfg_ctrl_path(rtwdev, wl);
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}
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static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr)
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{
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__le16 fc = hdr->frame_control;
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@ -3652,6 +3652,54 @@ int rtw89_mac_cfg_gnt(struct rtw89_dev *rtwdev,
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return 0;
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}
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EXPORT_SYMBOL(rtw89_mac_cfg_gnt);
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int rtw89_mac_cfg_gnt_v1(struct rtw89_dev *rtwdev,
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const struct rtw89_mac_ax_coex_gnt *gnt_cfg)
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{
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u32 val = 0;
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if (gnt_cfg->band[0].gnt_bt)
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val |= B_AX_GNT_BT_RFC_S0_VAL | B_AX_GNT_BT_RX_VAL |
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B_AX_GNT_BT_TX_VAL;
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else
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val |= B_AX_WL_ACT_VAL;
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if (gnt_cfg->band[0].gnt_bt_sw_en)
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val |= B_AX_GNT_BT_RFC_S0_SWCTRL | B_AX_GNT_BT_RX_SWCTRL |
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B_AX_GNT_BT_TX_SWCTRL | B_AX_WL_ACT_SWCTRL;
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if (gnt_cfg->band[0].gnt_wl)
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val |= B_AX_GNT_WL_RFC_S0_VAL | B_AX_GNT_WL_RX_VAL |
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B_AX_GNT_WL_TX_VAL | B_AX_GNT_WL_BB_VAL;
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if (gnt_cfg->band[0].gnt_wl_sw_en)
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val |= B_AX_GNT_WL_RFC_S0_SWCTRL | B_AX_GNT_WL_RX_SWCTRL |
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B_AX_GNT_WL_TX_SWCTRL | B_AX_GNT_WL_BB_SWCTRL;
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if (gnt_cfg->band[1].gnt_bt)
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val |= B_AX_GNT_BT_RFC_S1_VAL | B_AX_GNT_BT_RX_VAL |
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B_AX_GNT_BT_TX_VAL;
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else
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val |= B_AX_WL_ACT_VAL;
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if (gnt_cfg->band[1].gnt_bt_sw_en)
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val |= B_AX_GNT_BT_RFC_S1_SWCTRL | B_AX_GNT_BT_RX_SWCTRL |
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B_AX_GNT_BT_TX_SWCTRL | B_AX_WL_ACT_SWCTRL;
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if (gnt_cfg->band[1].gnt_wl)
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val |= B_AX_GNT_WL_RFC_S1_VAL | B_AX_GNT_WL_RX_VAL |
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B_AX_GNT_WL_TX_VAL | B_AX_GNT_WL_BB_VAL;
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if (gnt_cfg->band[1].gnt_wl_sw_en)
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val |= B_AX_GNT_WL_RFC_S1_SWCTRL | B_AX_GNT_WL_RX_SWCTRL |
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B_AX_GNT_WL_TX_SWCTRL | B_AX_GNT_WL_BB_SWCTRL;
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rtw89_write32(rtwdev, R_AX_GNT_SW_CTRL, val);
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return 0;
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}
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EXPORT_SYMBOL(rtw89_mac_cfg_gnt_v1);
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int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt)
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{
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@ -3711,6 +3759,28 @@ int rtw89_mac_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl)
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return 0;
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}
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EXPORT_SYMBOL(rtw89_mac_cfg_ctrl_path);
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int rtw89_mac_cfg_ctrl_path_v1(struct rtw89_dev *rtwdev, bool wl)
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{
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struct rtw89_btc *btc = &rtwdev->btc;
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struct rtw89_btc_dm *dm = &btc->dm;
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struct rtw89_mac_ax_gnt *g = dm->gnt.band;
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int i;
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if (wl)
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return 0;
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for (i = 0; i < RTW89_PHY_MAX; i++) {
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g[i].gnt_bt_sw_en = 1;
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g[i].gnt_bt = 1;
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g[i].gnt_wl_sw_en = 1;
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g[i].gnt_wl = 0;
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}
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return rtw89_mac_cfg_gnt_v1(rtwdev, &dm->gnt);
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}
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EXPORT_SYMBOL(rtw89_mac_cfg_ctrl_path_v1);
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bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev)
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{
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@ -799,12 +799,15 @@ void rtw89_mac_flush_txq(struct rtw89_dev *rtwdev, u32 queues, bool drop);
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int rtw89_mac_coex_init(struct rtw89_dev *rtwdev, const struct rtw89_mac_ax_coex *coex);
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int rtw89_mac_cfg_gnt(struct rtw89_dev *rtwdev,
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const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
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int rtw89_mac_cfg_gnt_v1(struct rtw89_dev *rtwdev,
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const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
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int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt);
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u16 rtw89_mac_get_plt_cnt(struct rtw89_dev *rtwdev, u8 band);
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void rtw89_mac_cfg_sb(struct rtw89_dev *rtwdev, u32 val);
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u32 rtw89_mac_get_sb(struct rtw89_dev *rtwdev);
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bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev);
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int rtw89_mac_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl);
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int rtw89_mac_cfg_ctrl_path_v1(struct rtw89_dev *rtwdev, bool wl);
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bool rtw89_mac_get_txpwr_cr(struct rtw89_dev *rtwdev,
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enum rtw89_phy_idx phy_idx,
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u32 reg_base, u32 *cr);
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@ -1620,6 +1620,31 @@
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#define B_AX_STATIS_BT_LO_TX_1_MASK GENMASK(15, 0)
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#define B_AX_STATIS_BT_LO_RX_1_MASK GENMASK(31, 16)
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#define R_AX_GNT_SW_CTRL 0xDA48
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#define R_AX_GNT_SW_CTRL_C1 0xFA48
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#define B_AX_WL_ACT2_VAL BIT(21)
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#define B_AX_WL_ACT2_SWCTRL BIT(20)
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#define B_AX_WL_ACT_VAL BIT(19)
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#define B_AX_WL_ACT_SWCTRL BIT(18)
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#define B_AX_GNT_BT_RX_VAL BIT(17)
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#define B_AX_GNT_BT_RX_SWCTRL BIT(16)
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#define B_AX_GNT_BT_TX_VAL BIT(15)
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#define B_AX_GNT_BT_TX_SWCTRL BIT(14)
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#define B_AX_GNT_WL_RX_VAL BIT(13)
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#define B_AX_GNT_WL_RX_SWCTRL BIT(12)
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#define B_AX_GNT_WL_TX_VAL BIT(11)
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#define B_AX_GNT_WL_TX_SWCTRL BIT(10)
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#define B_AX_GNT_BT_RFC_S1_VAL BIT(9)
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#define B_AX_GNT_BT_RFC_S1_SWCTRL BIT(8)
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#define B_AX_GNT_WL_RFC_S1_VAL BIT(7)
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#define B_AX_GNT_WL_RFC_S1_SWCTRL BIT(6)
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#define B_AX_GNT_BT_RFC_S0_VAL BIT(5)
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#define B_AX_GNT_BT_RFC_S0_SWCTRL BIT(4)
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#define B_AX_GNT_WL_RFC_S0_VAL BIT(3)
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#define B_AX_GNT_WL_RFC_S0_SWCTRL BIT(2)
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#define B_AX_GNT_WL_BB_VAL BIT(1)
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#define B_AX_GNT_WL_BB_SWCTRL BIT(0)
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#define R_AX_TDMA_MODE 0xDA4C
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#define R_AX_TDMA_MODE_C1 0xFA4C
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#define B_AX_R_BT_CMD_RPT_MASK GENMASK(31, 16)
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@ -2019,6 +2019,8 @@ static const struct rtw89_chip_ops rtw8852a_chip_ops = {
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.set_txpwr_ul_tb_offset = rtw8852a_set_txpwr_ul_tb_offset,
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.pwr_on_func = NULL,
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.pwr_off_func = NULL,
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.cfg_ctrl_path = rtw89_mac_cfg_ctrl_path,
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.mac_cfg_gnt = rtw89_mac_cfg_gnt,
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.btc_set_rfe = rtw8852a_btc_set_rfe,
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.btc_init_cfg = rtw8852a_btc_init_cfg,
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@ -490,6 +490,8 @@ static const struct rtw89_chip_ops rtw8852c_chip_ops = {
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.set_txpwr_ul_tb_offset = rtw8852c_set_txpwr_ul_tb_offset,
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.pwr_on_func = rtw8852c_pwr_on_func,
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.pwr_off_func = rtw8852c_pwr_off_func,
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.cfg_ctrl_path = rtw89_mac_cfg_ctrl_path_v1,
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.mac_cfg_gnt = rtw89_mac_cfg_gnt_v1,
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};
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const struct rtw89_chip_info rtw8852c_chip_info = {
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