x86/process: Consolidate and simplify switch_to_xtra() code
Move the conditional invocation of __switch_to_xtra() into an inline function so the logic can be shared between 32 and 64 bit. Remove the handthrough of the TSS pointer and retrieve the pointer directly in the bitmap handling function. Use this_cpu_ptr() instead of the per_cpu() indirection. This is a preparatory change so integration of conditional indirect branch speculation optimization happens only in one place. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: David Woodhouse <dwmw@amazon.co.uk> Cc: Tim Chen <tim.c.chen@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Casey Schaufler <casey.schaufler@intel.com> Cc: Asit Mallick <asit.k.mallick@intel.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Jon Masters <jcm@redhat.com> Cc: Waiman Long <longman9394@gmail.com> Cc: Greg KH <gregkh@linuxfoundation.org> Cc: Dave Stewart <david.c.stewart@intel.com> Cc: Kees Cook <keescook@chromium.org> Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20181125185005.280855518@linutronix.de
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@ -11,9 +11,6 @@ struct task_struct *__switch_to_asm(struct task_struct *prev,
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__visible struct task_struct *__switch_to(struct task_struct *prev,
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struct task_struct *next);
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struct tss_struct;
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void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
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struct tss_struct *tss);
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/* This runs runs on the previous thread's stack. */
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static inline void prepare_switch_to(struct task_struct *next)
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@ -40,6 +40,8 @@
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#include <asm/prctl.h>
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#include <asm/spec-ctrl.h>
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#include "process.h"
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/*
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* per-CPU TSS segments. Threads are completely 'soft' on Linux,
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* no more per-task TSS's. The TSS size is kept cacheline-aligned
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@ -252,11 +254,12 @@ void arch_setup_new_exec(void)
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enable_cpuid();
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}
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static inline void switch_to_bitmap(struct tss_struct *tss,
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struct thread_struct *prev,
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static inline void switch_to_bitmap(struct thread_struct *prev,
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struct thread_struct *next,
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unsigned long tifp, unsigned long tifn)
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{
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struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw);
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if (tifn & _TIF_IO_BITMAP) {
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/*
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* Copy the relevant range of the IO bitmap.
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@ -448,8 +451,7 @@ void speculation_ctrl_update(unsigned long tif)
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preempt_enable();
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}
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void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
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struct tss_struct *tss)
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void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p)
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{
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struct thread_struct *prev, *next;
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unsigned long tifp, tifn;
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@ -459,7 +461,7 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
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tifn = READ_ONCE(task_thread_info(next_p)->flags);
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tifp = READ_ONCE(task_thread_info(prev_p)->flags);
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switch_to_bitmap(tss, prev, next, tifp, tifn);
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switch_to_bitmap(prev, next, tifp, tifn);
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propagate_user_return_notify(prev_p, next_p);
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24
arch/x86/kernel/process.h
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24
arch/x86/kernel/process.h
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@ -0,0 +1,24 @@
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// SPDX-License-Identifier: GPL-2.0
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//
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// Code shared between 32 and 64 bit
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void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p);
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/*
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* This needs to be inline to optimize for the common case where no extra
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* work needs to be done.
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*/
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static inline void switch_to_extra(struct task_struct *prev,
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struct task_struct *next)
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{
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unsigned long next_tif = task_thread_info(next)->flags;
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unsigned long prev_tif = task_thread_info(prev)->flags;
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/*
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* __switch_to_xtra() handles debug registers, i/o bitmaps,
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* speculation mitigations etc.
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*/
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if (unlikely(next_tif & _TIF_WORK_CTXSW_NEXT ||
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prev_tif & _TIF_WORK_CTXSW_PREV))
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__switch_to_xtra(prev, next);
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}
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@ -59,6 +59,8 @@
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#include <asm/intel_rdt_sched.h>
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#include <asm/proto.h>
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#include "process.h"
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void __show_regs(struct pt_regs *regs, enum show_regs_mode mode)
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{
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unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
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@ -232,7 +234,6 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
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struct fpu *prev_fpu = &prev->fpu;
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struct fpu *next_fpu = &next->fpu;
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int cpu = smp_processor_id();
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struct tss_struct *tss = &per_cpu(cpu_tss_rw, cpu);
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/* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
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@ -264,12 +265,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
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if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl))
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set_iopl_mask(next->iopl);
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/*
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* Now maybe handle debug registers and/or IO bitmaps
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*/
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if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV ||
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task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT))
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__switch_to_xtra(prev_p, next_p, tss);
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switch_to_extra(prev_p, next_p);
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/*
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* Leave lazy mode, flushing any hypercalls made here.
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@ -60,6 +60,8 @@
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#include <asm/unistd_32_ia32.h>
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#endif
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#include "process.h"
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/* Prints also some state that isn't saved in the pt_regs */
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void __show_regs(struct pt_regs *regs, enum show_regs_mode mode)
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{
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@ -553,7 +555,6 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
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struct fpu *prev_fpu = &prev->fpu;
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struct fpu *next_fpu = &next->fpu;
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int cpu = smp_processor_id();
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struct tss_struct *tss = &per_cpu(cpu_tss_rw, cpu);
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WARN_ON_ONCE(IS_ENABLED(CONFIG_DEBUG_ENTRY) &&
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this_cpu_read(irq_count) != -1);
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@ -617,12 +618,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
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/* Reload sp0. */
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update_task_stack(next_p);
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/*
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* Now maybe reload the debug registers and handle I/O bitmaps
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*/
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if (unlikely(task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT ||
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task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV))
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__switch_to_xtra(prev_p, next_p, tss);
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switch_to_extra(prev_p, next_p);
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#ifdef CONFIG_XEN_PV
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/*
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