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drm/bridge: analogix-anx78xx: Avoid drm_dp_link helpers

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During the discussion of patches that enhance the drm_dp_link helpers it
was concluded that these helpers aren't very useful to begin with. Start
pushing the equivalent code into individual drivers to ultimately remove
them.

v4: use bulk DPCD writes if possible (Daniel Vetter)

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20191022145211.2258525-1-thierry.reding@gmail.com
This commit is contained in:
Thierry Reding 2019-10-22 16:52:11 +02:00
parent 79465e0ffe
commit ff1e8fb68e
1 changed files with 39 additions and 17 deletions
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56
drivers/gpu/drm/bridge/analogix-anx78xx.c
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@ -71,7 +71,6 @@ struct anx78xx {
struct i2c_client *client; struct i2c_client *client;
struct edid *edid; struct edid *edid;
struct drm_connector connector; struct drm_connector connector;
struct drm_dp_link link;
struct anx78xx_platform_data pdata; struct anx78xx_platform_data pdata;
struct mutex lock; struct mutex lock;
@ -748,7 +747,7 @@ static int anx78xx_init_pdata(struct anx78xx *anx78xx)
static int anx78xx_dp_link_training(struct anx78xx *anx78xx) static int anx78xx_dp_link_training(struct anx78xx *anx78xx)
{ {
u8 dp_bw, value; u8 dp_bw, dpcd[2];
int err; int err;
err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG, err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG,
@ -801,18 +800,34 @@ static int anx78xx_dp_link_training(struct anx78xx *anx78xx)
if (err) if (err)
return err; return err;
/* Check link capabilities */ /*
err = drm_dp_link_probe(&anx78xx->aux, &anx78xx->link); * Power up the sink (DP_SET_POWER register is only available on DPCD
if (err < 0) { * v1.1 and later).
DRM_ERROR("Failed to probe link capabilities: %d\n", err); */
return err; if (anx78xx->dpcd[DP_DPCD_REV] >= 0x11) {
} err = drm_dp_dpcd_readb(&anx78xx->aux, DP_SET_POWER, &dpcd[0]);
if (err < 0) {
DRM_ERROR("Failed to read DP_SET_POWER register: %d\n",
err);
return err;
}
/* Power up the sink */ dpcd[0] &= ~DP_SET_POWER_MASK;
err = drm_dp_link_power_up(&anx78xx->aux, &anx78xx->link); dpcd[0] |= DP_SET_POWER_D0;
if (err < 0) {
DRM_ERROR("Failed to power up DisplayPort link: %d\n", err); err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_SET_POWER, dpcd[0]);
return err; if (err < 0) {
DRM_ERROR("Failed to power up DisplayPort link: %d\n",
err);
return err;
}
/*
* According to the DP 1.1 specification, a "Sink Device must
* exit the power saving state within 1 ms" (Section 2.5.3.1,
* Table 5-52, "Sink Control Field" (register 0x600).
*/
usleep_range(1000, 2000);
} }
/* Possibly enable downspread on the sink */ /* Possibly enable downspread on the sink */
@ -851,15 +866,22 @@ static int anx78xx_dp_link_training(struct anx78xx *anx78xx)
if (err) if (err)
return err; return err;
value = drm_dp_link_rate_to_bw_code(anx78xx->link.rate); dpcd[0] = drm_dp_max_link_rate(anx78xx->dpcd);
dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
SP_DP_MAIN_LINK_BW_SET_REG, value); SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
if (err) if (err)
return err; return err;
err = drm_dp_link_configure(&anx78xx->aux, &anx78xx->link); dpcd[1] = drm_dp_max_lane_count(anx78xx->dpcd);
if (drm_dp_enhanced_frame_cap(anx78xx->dpcd))
dpcd[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
err = drm_dp_dpcd_write(&anx78xx->aux, DP_LINK_BW_SET, dpcd,
sizeof(dpcd));
if (err < 0) { if (err < 0) {
DRM_ERROR("Failed to configure DisplayPort link: %d\n", err); DRM_ERROR("Failed to configure link: %d\n", err);
return err; return err;
} }