gpio: Rewrite IXP4xx GPIO bindings in schema

This rewrites the IXP4xx GPIO bindings to use YAML schema,
and adds two new properties to enable fixed clock output on
pins 14 and 15.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
Linus Walleij 2023-09-23 18:02:28 +02:00 committed by Bartosz Golaszewski
parent a512635da9
commit ff2cbd758d
3 changed files with 74 additions and 39 deletions

View File

@ -1,38 +0,0 @@
Intel IXP4xx XScale Networking Processors GPIO
This GPIO controller is found in the Intel IXP4xx processors.
It supports 16 GPIO lines.
The interrupt portions of the GPIO controller is hierarchical:
the synchronous edge detector is part of the GPIO block, but the
actual enabling/disabling of the interrupt line is done in the
main IXP4xx interrupt controller which has a 1:1 mapping for
the first 12 GPIO lines to 12 system interrupts.
The remaining 4 GPIO lines can not be used for receiving
interrupts.
The interrupt parent of this GPIO controller must be the
IXP4xx interrupt controller.
Required properties:
- compatible : Should be
"intel,ixp4xx-gpio"
- reg : Should contain registers location and length
- gpio-controller : marks this as a GPIO controller
- #gpio-cells : Should be 2, see gpio/gpio.txt
- interrupt-controller : marks this as an interrupt controller
- #interrupt-cells : a standard two-cell interrupt, see
interrupt-controller/interrupts.txt
Example:
gpio0: gpio@c8004000 {
compatible = "intel,ixp4xx-gpio";
reg = <0xc8004000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};

View File

@ -0,0 +1,73 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/intel,ixp4xx-gpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel IXP4xx XScale Networking Processors GPIO Controller
description: |
This GPIO controller is found in the Intel IXP4xx
processors. It supports 16 GPIO lines.
The interrupt portions of the GPIO controller is hierarchical.
The synchronous edge detector is part of the GPIO block, but the
actual enabling/disabling of the interrupt line is done in the
main IXP4xx interrupt controller which has a 1-to-1 mapping for
the first 12 GPIO lines to 12 system interrupts.
The remaining 4 GPIO lines can not be used for receiving
interrupts.
The interrupt parent of this GPIO controller must be the
IXP4xx interrupt controller.
GPIO 14 and 15 can be used as clock outputs rather than GPIO,
and this can be enabled by a special flag.
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
properties:
compatible:
const: intel,ixp4xx-gpio
reg:
maxItems: 1
gpio-controller: true
"#gpio-cells":
const: 2
interrupt-controller: true
"#interrupt-cells":
const: 2
intel,ixp4xx-gpio14-clkout:
description: If defined, enables clock output on GPIO 14
instead of GPIO.
type: boolean
intel,ixp4xx-gpio15-clkout:
description: If defined, enables clock output on GPIO 15
instead of GPIO.
type: boolean
required:
- compatible
- reg
- "#gpio-cells"
- interrupt-controller
- "#interrupt-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
gpio@c8004000 {
compatible = "intel,ixp4xx-gpio";
reg = <0xc8004000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};

View File

@ -2215,7 +2215,7 @@ M: Krzysztof Halasa <khalasa@piap.pl>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml
F: Documentation/devicetree/bindings/gpio/intel,ixp4xx-gpio.txt
F: Documentation/devicetree/bindings/gpio/intel,ixp4xx-gpio.yaml
F: Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml
F: Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion*
F: Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml