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pinctrl: Add Intel Keem Bay pinctrl driver

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About Intel Keem Bay:
-------------------
Intel Keem Bay is a computer vision AI accelerator SoC based on ARM CPU.
Documentation of Keem Bay: Documentation/vpu/vpu-stack-overview.rst.

Pinctrl IP:
----------
The SoC has a customised pinmux controller IP which controls pin
multiplexing and configuration.

Keem Bay pinctrl IP is not based on and have nothing in common with the
existing pinctrl drivers. The registers used are incompatible with the
existing drivers, so it requires a new driver.

Add pinctrl driver to enable pin control support in the Intel Keem Bay SoC.

Co-developed-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
Signed-off-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
Co-developed-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com>
Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com>
Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
Reviewed-by: Mark Gross <mgross@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210806142527.29113-3-lakshmi.sowjanya.d@intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Lakshmi Sowjanya D 2021-08-06 19:55:27 +05:30 committed by Linus Walleij
parent d2083893e4
commit ffd4e73935
3 changed files with 1751 additions and 0 deletions
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19
drivers/pinctrl/Kconfig
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@ -407,6 +407,25 @@ config PINCTRL_K210
Add support for the Canaan Kendryte K210 RISC-V SOC Field
Programmable IO Array (FPIOA) controller.
config PINCTRL_KEEMBAY
tristate "Pinctrl driver for Intel Keem Bay SoC"
depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST)
depends on HAS_IOMEM
select PINMUX
select PINCONF
select GENERIC_PINCONF
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GPIOLIB
select GPIOLIB_IRQCHIP
select GPIO_GENERIC
help
This selects pin control driver for the Intel Keembay SoC.
It provides pin config functions such as pullup, pulldown,
interrupt, drive strength, sec lock, schmitt trigger, slew
rate control and direction control. This module will be
called as pinctrl-keembay.
source "drivers/pinctrl/actions/Kconfig"
source "drivers/pinctrl/aspeed/Kconfig"
source "drivers/pinctrl/bcm/Kconfig"

1
drivers/pinctrl/Makefile
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@ -47,6 +47,7 @@ obj-$(CONFIG_PINCTRL_OCELOT) += pinctrl-ocelot.o
obj-$(CONFIG_PINCTRL_MICROCHIP_SGPIO) += pinctrl-microchip-sgpio.o
obj-$(CONFIG_PINCTRL_EQUILIBRIUM) += pinctrl-equilibrium.o
obj-$(CONFIG_PINCTRL_K210) += pinctrl-k210.o
obj-$(CONFIG_PINCTRL_KEEMBAY) += pinctrl-keembay.o
obj-y += actions/
obj-$(CONFIG_ARCH_ASPEED) += aspeed/

1731
drivers/pinctrl/pinctrl-keembay.c Normal file
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