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53 Commits

Author SHA1 Message Date
Sunil Goutham
1054a6227c octeontx2-af: Gather RVU blocks HW info 
This patch gathers NPA/NIX/SSO/SSOW/TIM/CPT RVU blocks's
HW info like number of LFs. Important register offsets
saved for later use to avoid code duplication for each block.
A bitmap is allocated for each of the blocks which later
on will be used to allocate a LF for a RVU PF/VF.

Also added RVU NIX/NPA block registers and few registers
of other blocks.

Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
 2018-10-10 10:06:01 -07:00
Sunil Goutham
54d557815e octeontx2-af: Reset all RVU blocks 
Go through all BLKADDRs and check which ones are implemented
on this silicon and do a HW reset of each implemented block.
Also added all RVU AF and PF register offsets.

Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
 2018-10-10 10:06:01 -07:00
Sunil Goutham
54494aa5d1 octeontx2-af: Add Marvell OcteonTX2 RVU AF driver 
This patch adds basic template for Marvell OcteonTX2's
resource virtualization unit (RVU) admin function (AF)
driver. Just the driver registration and probe.

Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
 2018-10-10 10:06:01 -07:00