4 Commits

Author	SHA1	Message	Date
Dan Murphy	00f553660a	net: phy: DP83TC811: Fix SGMII enable/disable ... If SGMII was selected in the DT then the device should write the SGMII enable bit. If SGMII is not selected in the DT then the SGMII bit should be disabled. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>	2018-07-03 11:38:07 +09:00
Dan Murphy	4203638359	net: phy: DP83TC811: Add INT_STAT3 ... Add INT_STAT3 interrupt setting and clearing support. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>	2018-07-03 11:38:07 +09:00
Dan Murphy	713b4a3352	net: phy: DP83TC811: Fix disabling interrupts ... Fix a bug where INT_STAT1 was written twice and INT_STAT2 was ignored when disabling interrupts. Fixes: b753a9faaf9a ("net: phy: DP83TC811: Introduce support for the DP83TC811 phy") Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>	2018-06-30 21:13:01 +09:00
Dan Murphy	b753a9faaf	net: phy: DP83TC811: Introduce support for the DP83TC811 phy ... Add support for the DP83811 phy. The DP83811 supports both rgmii and sgmii interfaces. There are 2 part numbers for this the DP83TC811R does not reliably support the SGMII interface but the DP83TC811S will. There is not a way to differentiate these parts from the hardware or register set. So this is controlled via the DT to indicate which phy mode is required. Or the part can be strapped to a certain interface. Data sheet can be found here: http://www.ti.com/product/DP83TC811S-Q1/description http://www.ti.com/product/DP83TC811R-Q1/description Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>	2018-05-11 16:36:04 -04:00