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Author	SHA1	Message	Date
Richard Fitzgerald	b558c6fd08	ASoC: cs42l42: Add SOFT_RESET_REBOOT register The SOFT_RESET_REBOOT register is needed to recover CS42L42 state after a Soundwire bus reset. This is required to be set whenever there is severe/hard bus reset. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20230127165111.3010960-3-sbinding@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>	2023-01-31 12:10:46 +00:00
Martin Povišer	94d5f62a91	ASoC: cs42l83: Extend CS42L42 support to new part The CS42L83 part is a headphone jack codec found in recent Apple machines. It is a publicly undocumented part but as far as can be told it is identical to CS42L42 except for two points: * The chip ID is different. * Of those registers for which we have a default value in the existing CS42L42 kernel driver, one register (MCLK_CTL) differs in its reset value on CS42L83. To address those two points (and only those), add to the CS42L42 driver a separate CS42L83 front. Signed-off-by: Martin Povišer <povik+lin@cutebit.org> Link: https://lore.kernel.org/r/20220915094444.11434-10-povik+lin@cutebit.org Signed-off-by: Mark Brown <broonie@kernel.org>	2022-09-19 18:05:35 +01:00
Stefan Binding	7b43e6d795	ASoC: cs42l42: Move CS42L42 register descriptions to general include This is to allow the hda driver to have access to the register names, for improved maintainability. Also ensure new header is aligned to 100 columns. Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20220504161236.2490532-2-sbinding@opensource.cirrus.com Signed-off-by: Takashi Iwai <tiwai@suse.de>	2022-05-09 10:44:50 +02:00

Author

SHA1

Message

Date

Richard Fitzgerald

b558c6fd08

ASoC: cs42l42: Add SOFT_RESET_REBOOT register

The SOFT_RESET_REBOOT register is needed to recover CS42L42 state after
a Soundwire bus reset.

This is required to be set whenever there is severe/hard bus reset.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20230127165111.3010960-3-sbinding@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>

2023-01-31 12:10:46 +00:00

Martin Povišer

94d5f62a91

ASoC: cs42l83: Extend CS42L42 support to new part

The CS42L83 part is a headphone jack codec found in recent Apple
machines. It is a publicly undocumented part but as far as can be told
it is identical to CS42L42 except for two points:

 * The chip ID is different.

 * Of those registers for which we have a default value in the existing
   CS42L42 kernel driver, one register (MCLK_CTL) differs in its reset
   value on CS42L83.

To address those two points (and only those), add to the CS42L42 driver
a separate CS42L83 front.

Signed-off-by: Martin Povišer <povik+lin@cutebit.org>
Link: https://lore.kernel.org/r/20220915094444.11434-10-povik+lin@cutebit.org
Signed-off-by: Mark Brown <broonie@kernel.org>

2022-09-19 18:05:35 +01:00

Stefan Binding

7b43e6d795

ASoC: cs42l42: Move CS42L42 register descriptions to general include

This is to allow the hda driver to have access to the register names,
for improved maintainability.
Also ensure new header is aligned to 100 columns.

Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com>
Acked-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220504161236.2490532-2-sbinding@opensource.cirrus.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>

2022-05-09 10:44:50 +02:00

3 Commits