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Some people need flow control on their ports, so now boards can support
that via any GPIOs.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
We cannot let a 32-bit RX FIFO read be interrupted otherwise a fake RX
underflow error might be generated.
URL: http://blackfin.uclinux.org/gf/tracker/5145
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Fit blackfin uart over sport driver into common uart inftrastructure. It
is based on the early platform interfaces to get the platform data early
when the console is initilized.
1. Enable sport uart driver to change uart baud, data bit, stop bit at
runtime. Bind the index of uart device nodes to physical index of
sports.
2. Move all platform data into arch specific board files. Register
and probe platform device data in both early and normal stages.
3. Console is registered in sport uart driver as well.
4. Remove 500 us block waiting in sport tx stop code by putting a
dummy data into tx fifo to make sure the sport tx stops when all bytes
are shifted out except for the dummy data.
5. clean up a bit and fix up coding style.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
