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Remove the duplicated code and use the cpuidle common code for initialization.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Remove the duplicated code and use the cpuidle common code for initialization.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The en_core_tk_irqen flag is set in all the cpuidle driver which
means it is not necessary to specify this flag.
Remove the flag and the code related to it.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org> # for mach-omap2/*
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Remove the majority of cache flushing calls from the individual platform
files. This is now handled by the core code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The tegra cpu_disable() function is the same as the generic version
in arch/arm/kernel/smp.c. Therefore, it can be removed.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When building the kernel with CONFIG_THUMB2_KERNEL enabled, older
assemblers may emit the following error:
reset-handler.S:78: Error: invalid immediate for address calculation (value = 0x00000004)
Using an explicit adr.w instruction will solve this. Newer assemblers do
this automatically. Use the W() macro to do this under Thumb mode only.
Inspired-by: Joseph Lo <josephl@nvidia.com>
Suggested-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This fixes the building error when the PM_SLEEP is disabled. The fucntional
defintion of "tegra_pm_validate_suspend_mode" without "static inline"
would become a multiple definition error.
Reported-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The conditional branch instruction in Thumb2 only available to short range.
The linker will fail when the conditional branch over the range. Then
resulting in link error when generating kernel image. e.g.:
arch/arm/mach-tegra/reset-handler.S:47:(.text+0xf8e):
relocation truncated to fit: R_ARM_THM_JUMP19 against symbol
`cpu_resume' defined in .data section in arch/arm/kernel/built-in.o
This patch using a Thumb2 instruction IT (if-then) to have a longer branch
range.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fix the build failure when CONFIG_THUBM2_KERNEL enabled. You
clould see the error message below:
arch/arm/mach-tegra/sleep-tegra30.S:69: Error: shift must be constant --
`orr r12,r12,r4,lsl r3'
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The tegra assembly files are written for ARMv7 and are not compatible
with ARMv6, which leads to build warnings when compiling a dual
ARMv6/v7 kernel. Since this code is only ever run on Tegra ARMv7
hardware, we can tell the assembler which architecture level to
use.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The TWD and SCU configs are selected by default as long as
MSM_SCORPIONMP is false and/or MCT is false. Implementing the
logic this way certainly saves lines in the Kconfig but it
precludes those machines which select MSM_SCORPIONMP or MCT from
participating in the single zImage effort because when those
machines are combined with other SMP capable machines the TWD and
SCU are no longer selected by default.
Push the select out to the machine entries so that we can compile
these machines together and still select the appropriate configs.
Cc: Barry Song <baohua.song@csr.com>
Acked-by: David Brown <davidb@codeaurora.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Simon Horman <horms@verge.net.au>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Viresh Kumar <viresh.linux@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch contains most fixes and enhancements to the Tegra common
clock driver. The main new feature is a driver for Tegra114, which
coupled with later device tree changes enables many devices on that
chip, such as MMC, I2C, etc.
This branch depends on a patch in:
git://git.linaro.org/people/mturquette/linux.git clk-for-3.10
Mike has stated that this branch is stable, and is aware of this
dependency and merge.
Mike's branch is based on v3.9-rc3, which includes a USB change which
causes problems on Tegra. That problem was fixed in v3.9-rc4. Hence,
this branch pulls in v3.9-rc4 to ensure bisectability as much as
possible.
This branch is based on v3.9-rc4, followed by a merge of previous Tegra
"soc" pull request, followed by a merge of clk-for-3.10.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRXv21AAoJEMzrak5tbycxRAsQAK0U+y5RWQJVR1wQYAuw2AhP
wX/5BcpDWhH4HrFKUGp0NrVvASHv706bbvnbSsUFeKtMGqRFaiOW756B80R0mnIG
xjILt64A7kXCMRJeUoXhdJtXQfzNbgGqKUsBJknVHHBw72OhYBXop5ihMWqI9Kk6
yEsr+/CB9VlV7ZbiLaAXelKuh7oSdaG8ada6qFeRCJhpVVdrFP4aGYkt0iipOBAU
GBnoISkmp/ocExXlC2n5nIEE0rukJ+KyPwR1bY4+Yj2ZFXL24Nczh8cEZFrV2yz8
Sa+/6qrowGTw/wPUK+R8+vCvfzKdCYG6rrnyWwwb9UbsP6LAcYz/WB+q0puPZeuZ
2T82osvbFxjGMYWnR2Uc4CRTid1ophxGWRh810fg1UGMIK4HRMmCxrV6D5Af3FPz
rXNEf3CCd4iKJQBBYXZAR1TNn5vSX/USeqXvb0810qwe2jwJsiZP5FhZH5Ogfvod
W825UpmS1zmEz4MI65/CE3fxZ8SsM9Khdp4tl25YfTJ5RMjShzRdsl4BATa8nXpr
nDfBb8pE2s6hyUWXbnNHw+k4jmQMreEHp+guE6LWYmqBcVlrJpq5joIHqwRl4dyD
iri9unSvbOAN+fJMXti0uW8zruitfbZgfzwRwwFy1TP0DPQBWVWwN7AABFlItD6M
pWI9Uf3VL5wAHZmWe6Gq
=Hasc
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.10-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/drivers
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: clock driver development
This branch contains most fixes and enhancements to the Tegra common
clock driver. The main new feature is a driver for Tegra114, which
coupled with later device tree changes enables many devices on that
chip, such as MMC, I2C, etc.
This branch depends on a patch in:
git://git.linaro.org/people/mturquette/linux.git clk-for-3.10
Mike has stated that this branch is stable, and is aware of this
dependency and merge.
Mike's branch is based on v3.9-rc3, which includes a USB change which
causes problems on Tegra. That problem was fixed in v3.9-rc4. Hence,
this branch pulls in v3.9-rc4 to ensure bisectability as much as
possible.
This branch is based on v3.9-rc4, followed by a merge of previous Tegra
"soc" pull request, followed by a merge of clk-for-3.10.
* tag 'tegra-for-3.10-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
clk: tegra: fix enum tegra114_clk to match binding
clk: tegra: Remove forced clk_enable of uartd
ARM: dt: Add references to tegra_car clocks
clk: tegra: devicetree match for nvidia,tegra114-car
clk: tegra: Implement clocks for Tegra114
ARM: tegra: Define Tegra114 CAR binding
clk: tegra: Workaround for Tegra114 MSENC problem
clk: tegra: Add flags to tegra_clk_periph()
clk: tegra: Add new fields and PLL types for Tegra114
clk: tegra: move from a lock bit idx to a lock mask
clk: tegra: Add PLL post divider table
clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE
clk: tegra: Add TEGRA_PLL_BYPASS flag
clk: tegra: Refactor PLL programming code
clk: tegra: provide dummy cpu car ops
clk: tegra: defer application of init table
clk: tegra: Fix cdev1 and cdev2 IDs
clk: tegra: Make gr2d and gr3d clocks children of pll_c
clk: tegra: Export peripheral reset functions
clk: tegra: Fix periph_clk_to_bit macro
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch converts Tegra to support multi-platform/single-zImage.
One header is made accessible to drivers. The earlyprintk implementation
is moved to the multi-platform location. Some Kconfig changes are made
to enable multi-platform. Some dead files are deleted.
The APIs exposed in the now-global tegra-powergate.h should be replaced
with standard reset and power domain APIs in the future.
This branch is based on (part of) the previous soc pull request.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRXv+xAAoJEMzrak5tbycxjscP/iw1p3mtm0/8levUUOty5vHB
a4/5P5nFZDCxDW8eWbf4cN6lg4dWLDaWo9SLF1pRZXc5opliyAai8/qVJYz++2T1
6FsJOg+PqMks0UKBXS5yR+P84cdTB55B71NQpaGe2oCwyIjuNnAZ5rTp4+/1RO4S
aXdshQA+1aWVrfGe3nvigrpyPSM2Mmul/Lf0dtyaoFVWknGJT+CWu6upgzwIAWiu
C8oolkkqmrsU/m9m+PJtmdtn0aD8oGQOPSuCcz/ExAy7GhTgcuTRdiUjmrcBgr7t
d4phwXQ2gKLdSHxToBKLxZbnRqM69I1h0Ybcxakz9ICsaQ3yE6J6qq4tYlqoezYZ
l9TH5VmdfnWdU/1ZBqyX/8+EyzUu2fI6uR4d78FYkmVfcEoAe/YvOx7A/CFUI5zN
kYvrLjaLTRCRsgM4WuRMLGR4TN3Zq6ciC/QECD83xMfyWjwZGWfi9+2DIdQv2ge4
DJoJhNTHCHq1fPWsadnYgL93DjXCF5+w+d3nVz0vxNHfVz6DEYJyepkfmX0poEu0
RJg32cnW8rwDcqM97vnzUnV3ZSU1VZUA3Upf7uZALPwjxV4m7fQbytQU9pd0YU5B
ZNRRb6MY9xjU/Z5lK5lGNttbwfuIbKobNDiVY0lJKTrSTJLAOO9MHs8HQ+lMzYXa
1jO31FETA5RpCKrPHvSi
=6+gD
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/multiplatform
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: multi-platform conversion
This branch converts Tegra to support multi-platform/single-zImage.
One header is made accessible to drivers. The earlyprintk implementation
is moved to the multi-platform location. Some Kconfig changes are made
to enable multi-platform. Some dead files are deleted.
The APIs exposed in the now-global tegra-powergate.h should be replaced
with standard reset and power domain APIs in the future.
This branch is based on (part of) the previous soc pull request.
* tag 'tegra-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: convert to multi-platform
ARM: tegra: move <mach/powergate.h> to <linux/tegra-powergate.h>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch includes major development on the core Tegra SoC support code
in the mach-tegra directory:
* SMP support for Tegra114.
* Exposes SoC chip ID and revision through standard sysfs files.
* System-level suspend/resume for Tegra20/30. At present, this only
supports "LP2" mode (CPU power-down), but provides the basis to
implement "LP0"/"LP1" (various levels of core/chip power-down) in the
hopefully near future.
* A minor cleanup of a duplicate include, which was introduced in this
branch.
This branch is based on the previous cleanup pull request.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRXvvtAAoJEMzrak5tbycxwdAP/ioto6+ekXniT3/Iqx9CmqG4
kDwS6LKn8Y91ePH6R8i23U98PjLwo/HgRWSTLjfwLMAi3AOEgsJ+bUnCmPAszxkY
Ayyv+SLbgYaR817ezACXKH0tJHF1yo07bwk76jXQwo9/d71wg8sLweQwuEA1p/u8
ZlMniF731p7oZCNcoK680eFsurTO850GTfCrBowmOiGcPgpbllTEifwRthzQNhD7
b0Yw55rTqz9gbhgYCN33Va6CzwD9CMaxKN28J6qPJ+j7JCXO5Qp2QCuQ5PxLTbGq
g1n65h2p5eXQwJwnf70jGuvF9xjdPO0zNTbQVP/hkrRMpB9VA0Z6zw0s12c1H70l
Hs/7Hn7IBzCf5jdn802knc0K0b3Q7MhUjfTU6Gmj2KWJ+SfjMQtfqRdTWKsmPXXU
3MVxlJnqHNCjttWXXkxN0lKSgdi5HN431RwD6P9i0NPIq9RKZutw4jFeNLclVuGa
xZMBtdDZ/U2KwL0aITkleacMHcb5/pK1z626//rB2CWRSRtVLGgye14FyEBi1U+I
EdA16bu9U6MiwlqT0I849pXFb3l0di0+FTVadE+D3aJGjk/IWond0Fk1VayaSCX0
X8SNUByRPtwhJRQH+oX+HDZXWW6gc2cixpYSoDmgdSXSJLBuLlAD+KPAXi2hvTUf
REyjYXwVXVyMY/XTz5fP
=1KXE
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: core SoC support development
This branch includes major development on the core Tegra SoC support code
in the mach-tegra directory:
* SMP support for Tegra114.
* Exposes SoC chip ID and revision through standard sysfs files.
* System-level suspend/resume for Tegra20/30. At present, this only
supports "LP2" mode (CPU power-down), but provides the basis to
implement "LP0"/"LP1" (various levels of core/chip power-down) in the
hopefully near future.
* A minor cleanup of a duplicate include, which was introduced in this
branch.
This branch is based on the previous cleanup pull request.
* tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: pm: remove duplicated include from pm.c
ARM: tegra: cpuidle: remove redundant parameters for powered-down mode
ARM: tegra: pm: add platform suspend support
ARM: dt: tegra: add bindings of power management configurations for PMC
ARM: tegra: irq: add wake up handling
gpio: tegra: add gpio wakeup source handling
ARM: tegra: moving the CPU power timer function to PMC driver
ARM: tegra: add clock source of PMC to device trees
ARM: tegra: add speedo-based process id for Tegra114
ARM: tegra: expose chip ID and revision
ARM: tegra: bring up secondary CPU for Tegra114
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch includes various cleanup of the core Tegra support.
* Unification of the separate board-dt-tegra*.c files into a single
tegra.c, now that everything is DT-driven and basically identical.
* Use of_clk_get() in the Tegra clocksource driver so that clocks are
described in DT rather than hard-coding clock names.
* Some cleanup of the PMC-related code, with the aim that the PMC
"driver" contains more of the code that touches PMC registers, rather
than spreading PMC register accesses through other files.
* Conversion of the "PMC" driver to acquire resources describe in device
tree rather than hard-coding them.
* Use of common code for the CPU sleep TLB invalidation.
This branch is based on the previous fixes pull request.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRXvqoAAoJEMzrak5tbycx4C0P/R6urrFPiYsPgith5+dpP6zv
duAIAt0+chtEjva0veewQsBneRtTVNU115FQ/QZaMjSszAuIjC7nRa2iBa88FX1+
pzQYmRUrIupjeQ1WxxKYOILDXrMJNejbgoLu7kcHzWDEGsJmnwNh8kmiklvIJpa8
UDpz7RWhr6aWzrmiwj1cPF1/NJBl1nbx/TZCUo1u8yq46C9oVUi3DCdAnDVEsAzA
vJaNSVWxeBOytd0jlLOiDAYtlrCtysCt/x7YjnN+9x7r99pzXHd0FOPOkKWBrOAN
TOk+bhyXMFkucEk229A8xRYxhRynYecqYl48kF6Wt7HssrUJptk4qXZTZeDIyvZS
33YCRDjCJSrCkHjgDIVddtiz4+iZs6D7f/p9lZ+ikLfTyNXf0a+Wo5zRRyrrYJ2J
Is4ZW0U3lvF4XmbNQRW3RhIGINSRhEY4POqygjO5h4fw7uAESAV3Pd3z/e59tMQi
Dh3A1f+yIXDwYQmyN/nFVTjFcFPlCD6BW9G/u+R/5YkPSmGqw8cUUw4BlO244wHL
NVF7VQBjtkELYPPsHnp6Pp+aJ0uxmmGcSNM56RHZERiMZlz1lv5CwT6b/6PqFEu6
IpXsAhV5SRvX+6Ky5mtb8A6JdNA6EuwVol3nmaNqFlbqHcR1HHyAsgCiTDkwkGYE
Ggk40fKiWRcras9gRJI+
=3GM9
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: cleanup
This branch includes various cleanup of the core Tegra support.
* Unification of the separate board-dt-tegra*.c files into a single
tegra.c, now that everything is DT-driven and basically identical.
* Use of_clk_get() in the Tegra clocksource driver so that clocks are
described in DT rather than hard-coding clock names.
* Some cleanup of the PMC-related code, with the aim that the PMC
"driver" contains more of the code that touches PMC registers, rather
than spreading PMC register accesses through other files.
* Conversion of the "PMC" driver to acquire resources describe in device
tree rather than hard-coding them.
* Use of common code for the CPU sleep TLB invalidation.
This branch is based on the previous fixes pull request.
* tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: use setup_mm_for_reboot rather than explicit pgd switch
ARM: tegra: replace the CPU power on function with PMC call
ARM: tegra: pmc: add power on function for secondary CPUs
ARM: tegra: pmc: convert PMC driver to support DT only
ARM: tegra: fix the PMC compatible string in DT
ARM: tegra: pmc: add specific compatible DT string for Tegra30 and Tegra114
ARM: tegra: refactor tegra{20,30}_boot_secondary
clocksource: tegra: move to of_clk_get
ARM: tegra: Unify Device tree board files
ARM: tegra: Rename board-dt-tegra20.c to tegra.c
ARM: tegra: Unify tegra{20,30,114}_init_early()
Conflicts:
drivers/clocksource/tegra20_timer.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
dev->state_count is initialized automatically by
cpuidle_register_device().
When drv->state_count is equal to dev->state_count, no need to init
this field, so removing it.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Initialize the idle states directly in the driver structure.
That prevents extra structure declaration and memcpy at init time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This patch moves cpufreq driver of ARM based tegra platform to drivers/cpufreq.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The Tegra clock driver is initialized during the ARM machine descriptor's
.init_irq() hook. It can't be initialized earlier, since dynamic memory
usage is required. It can't be initialized later, since the .init_timer()
hook needs the clocks initialized. However, at this time, udelay()
doesn't work.
The Tegra clock initialization table may enable some PLLs. Enabling a PLL
may require usage of udelay(). Hence, this can't happen right when the
clock driver is initialized.
To solve this, separate the clock driver initialization from the clock
table processing, so they can execute at separate times.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
After the patch series for system suspending support, tegra_idle_lp2_last()
no longer uses its parameters cpu_on_time or cpu_off_time, so remove them.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Adding suspend to RAM support for Tegra platform. There are three suspend
mode for Tegra. The difference were below.
* LP2: CPU voltage off
* LP1: CPU voltage off, DRAM in self-refresh
* LP0: CPU + Core voltage off, DRAM in self-refresh
After this patch, the LP2 suspend mode will be supported.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The PMC mostly controls the entry and exit of the system from different
sleep modes. Different platform or system may have different configurations.
The power management configurations of PMC is represented as some properties.
The system needs to define the properties when the system supports deep sleep
mode (i.e. suspend).
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the wake up handling for legacy irq controller, and using
IRQCHIP_MASK_ON_SUSPEND for wake irq handling.
Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The CPU power timer set up function was related to PMC register. Now moving
it to PMC driver. And it also help to clean up the PM related code later.
The timer was calculated based on the input clock of PMC. In this patch, we
also get the clock from DT.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
policy->cpus contains all online cpus that have single shared clock line. And
their frequencies are always updated together.
Many SMP system's cpufreq drivers take care of this in individual drivers but
the best place for this code is in cpufreq core.
This patch modifies cpufreq_notify_transition() to notify frequency change for
all cpus in policy->cpus and hence updates all users of this API.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This allows Tegra be included in a kernel build that supports multiple
SoCs at once, which is useful for distro kernels.
This change:
* Moves Tegra's Kconfig into its own directory, as seems typical for
multi-platform conversions.
* Stops selecting some ARM errata that are incompatible with multi-
platform. This requires that you use a bootloader that enables the
workaround!
* Deletes some headers and Makefile.boot that aren't needed now that we
support multi-platform.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This is required so that code such as Tegra's PCIe and clock drivers
can still access this header file once Tegra is converted to
multiplatform, and <mach/> no longer exists.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Don't treat it as an error if a partition is already in the same power
state when a user wants to power it on or off. This allows code to
proceed if no state change is required.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This function can be used by drivers to enable power to the hardware
blocks that they drive. Most of the drivers can be built as a module
and therefore require this function to be exported.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch changes the Tegra PM code to use the setup_mm_for_reboot
helper rather than call cpu_switch_mm directly. This keeps things like
TLB invalidation in one place.
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
All the calls to gic_secondary_init() pass 0 as the first argument.
Since this function is called on each CPU when starting, it can be done
in a platform-independent way via a CPU notifier registered by the GIC
code.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Tested-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Barry Song <baohua.song@csr.com>
Tegra only supports, and always enables, device tree. Remove all ifdefs
and runtime checks for DT support from the driver. Platform data is
therefore no longer required. Delete the header that defines it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
USB_ULPI and USB_ULPI_VIEWPORT shouldn't really
be selected directly by anyone, but since Tegra
still needs some time before turning ulpi viewport
into a proper PHY driver, we need to keep the
selects in place.
This patch just fixes the conditional select
so that it will continue to build after merging
the latest PHY layer changes.
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Add speedo-based process identification for Tegra114.
Based on the work by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Danny Huang <dahuang@nvidia.com>
[swarren: added include of bug.h]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Expose Tegra chip ID and revision in /sys/devices/soc for user mode
usage
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The secondary CPU can be brought up by toggling the power in PMC. Then
the flow controller will release CPU to go by clearing the reset and
clamp signal automatically.
Based on the work by:
Bo Yan <byan@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Using the CPU power on function in PMC driver to bring up secondary CPUs,
because we are going to re-factor powergate driver to support generic
power domain. It will be removed later and added the generic power domain
support in PMC driver.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Adding the power on function for secondary CPUs in PMC driver, this can
help us to remove legacy powergate driver and add generic power domain
support later.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The Tegra kernel only support boot from DT now. Clean up the PMC driver
to support DT only, that includes:
* remove the ifdef of CONFIG_OF
* replace the static mapping of PMC addr to map from DT
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The PMC HW is not 100% compatible across all Tegra series. We need to
specify each of them in the DT match table.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
"tegra_boot_secondary()" has many condition branches for some Tegra
SoC generations in a single function so that it's not easy to compile
a kernel only for a single SoC if one wants with some reason, debug
purpose(?). This patch provides SoC specific version of
boot_secondary(), tegra{20,30}_boot_secondary(). This could allow
any combination of SoC to be built. Those boot_secondary functions can
be preparation when we ntroduce chip specific function pointers in the
future without having chip dependent branches around.
Also removed unused definition/prototpye.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[josephl: remove the Tegra114 part of the original patch]
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This is the preparation to unify "board-dt-tegra{20,30,114}.c" to a
single file "tegra.c".
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Refactored tegra{20,30,114}_init_early() so that we have the unified
tegra_init_early().
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This fixes:
arch/arm/mach-tegra/board-harmony-pcie.c: In function ‘harmony_pcie_init’:
arch/arm/mach-tegra/board-harmony-pcie.c:65:18: warning: ignoring return
value of ‘regulator_enable’, declared with attribute
warn_unused_result [-Wunused-result]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The warm boot sequence of Tegra30 secondary CPUs should wait for the
power ready then removing the clamps.
This did not fix any known or unknown issue, but nice to have this fix.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
