79860 Commits

Author SHA1 Message Date
Jani Nikula
1358139bde drm/i915/mst: abstract handling of link status in DP MST
We'll want to expand on this, so abstract it to a separate function
first. Improve debug logging while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-4-jani.nikula@intel.com
2022-01-21 12:55:37 +02:00
Jani Nikula
34ed3e8347 drm/i915/mst: debug log 4 bytes of ESI right after reading
For whatever reason, the ESI link service irq vector was missing from
the debug output. Add the missing byte, clean up the debug message, and
do the logging right after reading the data.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-3-jani.nikula@intel.com
2022-01-21 12:55:28 +02:00
Jani Nikula
603801d0f2 drm/i915/mst: abstract intel_dp_ack_sink_irq_esi()
Smaller functions make the thing easier to read. Debug log failures to
ack.

Note: Looks like we have the retry loop simply because of hysterical
raisins, dating back to the original DP MST enabling. Keep it, though I
have no idea why we have it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-2-jani.nikula@intel.com
2022-01-21 12:55:17 +02:00
Jani Nikula
26950f2968 drm/i915/mst: fix intel_dp_mst_hpd_irq() indentation
Remove extra indentation.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-1-jani.nikula@intel.com
2022-01-21 12:55:00 +02:00
Jani Nikula
198bca9340 drm/i915: split out i915_reg_read_ioctl() to i915_ioctl.[ch]
Add new files i915_ioctl.[ch] to hold small ioctls that are out of place
everywhere else, and not big enough to warrant a file of their own. For
starters, it's just for i915_reg_read_ioctl() that's a bit high level
for a low level implementation that intel_uncore.[ch] is.

Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220120113346.3214745-1-jani.nikula@intel.com
2022-01-21 09:59:22 +02:00
Madhumitha Tolakanahalli Pradeep
5de6a3de99 drm/i915/dmc: Eliminate remnant GEN<n> references
Replace GEN<n> with DISPLAY_VER<n>, in line with the naming convention
followed in the i915 driver code.

Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211217034141.198033-1-madhumitha.tolakanahalli.pradeep@intel.com
2022-01-20 11:06:46 -08:00
Ville Syrjälä
27535f1d94 drm/i915: Clean up vlv/chv sprite plane registers
Use REG_BIT() & co. to polish the vlv/chv sprite plane registers.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-10-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-20 19:35:01 +02:00
Ville Syrjälä
c26962803d drm/i915/hdmi: Ignore DP++ TMDS clock limit for native HDMI ports
Lots of machines these days seem to have a crappy type1 DP dual
mode adaptor chip slapped onto the motherboard. Based on the
DP dual mode spec we currently limit those to 165MHz max TMDS
clock.

Windows OTOH ignores DP dual mode adaptors when the VBT
indicates that the port is not actually DP++, so we can
perhaps assume that the vendors did intend that the 165MHz
clock limit doesn't apply here. Though it would be much
nicer if they actually declared an explicit limit through
VBT, but that doesn't seem to be happening either.

So in order to match Windows behaviour let's ignore the
DP dual mode adaptor's TMDS clock limit for ports that
don't look like DP++ in VBT.

Unfortunately many older VBTs misdelcare their DP++ ports
as just HDMI (eg. ILK Dell Latitude E5410) or DP (eg. SNB
Lenovo ThinkPad X220). So we can't really do this universally
without risking black screens. I suppose a sensible cutoff
is HSW+ since that's when 4k became a thing and one might
assume that the machines have been tested to work with higher
TMDS clock rates.

v2: s/IS_BROADWELL/IS_HASWELL/

Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211222161738.12478-1-ville.syrjala@linux.intel.com
2022-01-20 00:07:53 +02:00
Ville Syrjälä
044cbc7a74 drm/i915/bios: Nuke DEVICE_TYPE_DP_DUAL_MODE_BITS
Replace the DEVICE_TYPE_DP_DUAL_MODE_BITS stuff with just
a DP+HDMI check. The rest of the bits shouldn't really
matter anyway.

The slight change in behaviour here is that now we do look at
the DEVICE_TYPE_NOT_HDMI_OUTPUT bit (via
intel_bios_encoder_supports_hdmi()) when we previously ignored it.
The one platform we know that has problems with that bit is VLV.
But IIRC the problem was always that buggy VBTs basically never
set that bit. So that should be OK since all it would do is make
all DVI ports look like HDMI ports instead. Also can't imagine
there are many VLV machines with actual DVI ports in existence.

We still keep the rest of the dvo_port/aux_ch checks as we
can't trust that DP+HDMI device type equals DP++ due to
buggy VBTs.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211217155403.31477-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-20 00:07:53 +02:00
Ville Syrjälä
a868a1e57e drm/i915/bios: Throw out the !has_ddi_port_info() codepaths
Now that we parse the DDI port info from the VBT on all g4x+ platforms
we can throw out all the old codepaths in intel_bios_is_port_present(),
intel_bios_is_port_edp() and intel_bios_is_port_dp_dual_mode(). None
of these should be called on pre-g4x platforms.

For good measure throw in a WARN into intel_bios_is_port_present()
should someone get the urge to call it on older platforms. The
other two functions are specific to HDMI and DP so should not need
any protection as those encoder types don't even exist on older
platforms.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211217155403.31477-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-20 00:07:53 +02:00
Ville Syrjälä
594c504d33 drm/i915/bios: Use i915->vbt.ports[] for all g4x+
Extend the vbt.ports[] stuff for all g4x+ platforms. We do need
to drop the version check as some elk/ctg machines may have VBTs
older than that. The oldest I know is an elk with version 142.
But the child device stuff has had the correct size since at
least version 125 (observed on my sdg), so from that angle this
should be totally safe.

This does couple of things:
- Start using the aux_ch/ddc_pin from VBT instead of just the
  hardcoded defaults. Hopefully there are no VBTs with entirely
  bogus information here.
- Start using i915->vbt.ports[] for intel_bios_is_port_dp_dual_mode().
  Should be fine as the logic doesn't actually change.
- Start using i915->vbt.ports[] for intel_bios_is_port_edp().
  The old codepath only looks at the DP DVO ports, the new codepath
  looks at both DP and HDMI DVO ports. In principle that should not
  matter. We also stop looking at some of the other device type bits
  (eg. LVDS,MIPI,ANALOG,etc.). Hopefully no VBT is broken enough that
  it sets up totally conflicting device type bits (eg. LVDS+eDP at the
  same time). We also lose the "g4x->no eDP ever" hardcoding (shouldn't
  be hard to re-introduce that into eg. sanitize_device_type() if needed).

Lightly smoke tested on a set of machines (one of ctg,ilk,snb,ivb each)
with both DP and HDMI (DP++). Everything still worked as it should.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211217155403.31477-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-20 00:06:51 +02:00
Ville Syrjälä
eb9fcf6385 drm/i915/bios: Use i915->vbt.ports[] on CHV
CHV is currently straddling the divide by using parse_ddi_ports() stuff
for aux_ch/ddc_pin but going through all old codepaths for the rest
(intel_bios_is_port_present(), intel_bios_is_port_edp(),
intel_bios_is_port_dp_dual_mode()). Let's switch over full and use
i915->vbt.ports[] for the rest of the stuff.

dvo_port_to_port() doesn't know about DSI so we won't get into
any kind of "is port B HDMI or DSI or both?" conundrum, which
could otherwise happen on VLV/CHV due to DSI ports living in a
separate world from the other digital ports.

Including Jani's detailed analysis here for posterity:
"We stop checking for port A for CHV in intel_bios_is_port_present(), but
 it's a warn and I don't recall any bug reports, so probably fine. We
 could add a check in parse_ddi_port(), but meh.

 Ditto for intel_bios_is_port_dp_dual_mode(), except it doesn't have a
 warn.

 The eDP check in intel_bios_is_port_edp() becomes slightly more
 relaxed. Both the old and new check require these to be set:

 - DEVICE_TYPE_DISPLAYPORT_OUTPUT
 - DEVICE_TYPE_INTERNAL_CONNECTOR.

 The old code also required these to be unset:

 - DEVICE_TYPE_MIPI_OUTPUT
 - DEVICE_TYPE_COMPOSITE_OUTPUT
 - DEVICE_TYPE_DUAL_CHANNEL
 - DEVICE_TYPE_LVDS_SIGNALING
 - DEVICE_TYPE_TMDS_DVI_SIGNALING
 - DEVICE_TYPE_VIDEO_SIGNALING
 - DEVICE_TYPE_ANALOG_OUTPUT

 It's possible we've added these just as a sanity check for broken VBTs
 more than anything. I guess I'd see if actual problems arise.

 Bottom line, I think the functional changes matter only for VBTs with
 bogus data."

I agree that it should work assuming the VBT isn't totally insane.
Modern windows drivers also don't seem to check any of those
additional device type bits, which may or may not matter for older
devices (no idea what some old driver versions are checking).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211217155403.31477-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-19 22:32:20 +02:00
Ville Syrjälä
b90b6e4137 drm/i915/bios: Introduce has_ddi_port_info()
Pull the "do we want to use i915->vbt.ports[]?" check into
a central place.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211217155403.31477-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-19 22:31:26 +02:00
Ville Syrjälä
8172375ea9 drm/i915: Remove zombie async flip vt-d w/a
This async flip vt-d w/a was moved to a different place in
commit 7d396cacaea6 ("drm/i195: Make the async flip VT-d workaround
dynamic") but the drm-intel-fixes cherry-pick commit b2d73debfdc1
("drm/i915: Extend the async flip VT-d w/a to skl/bxt") resurrected
the original code as well. So now we have this w/a in two places.
Remove the resurrected zombie code.

Not done as a revert to hopefully prevent any kind of
automagic stable backport.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211208150050.17230-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-19 18:27:21 +02:00
Jani Nikula
d39bc5c5e1 drm/i915/dpll: make intel_shared_dpll_funcs internal to intel_dpll_mgr.c
Move struct intel_shared_dpll_funcs to intel_dpll_mgr.c, as no other
place needs to have access to it. We also don't need to have kernel-doc
documentation for file internal structures, so drop them while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220119110528.2377899-1-jani.nikula@intel.com
2022-01-19 15:03:50 +02:00
Ville Syrjälä
fee076019d drm/i915: Nuke pointless middle men for skl+ plane programming
There is no real point in having this two stage
skl_program_plane*() vs. skl_plane_update*() wrapper stuff.
All we need to do is determine the correct color plane and
we're done.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-15-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-18 04:05:44 +02:00
Ville Syrjälä
4682a6d996 drm/i915: Declutter color key register stuff
Add a few small helpers to calculate the color key register
values. Cleans up skl_program_plane_arm() a bit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-14-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-18 04:04:54 +02:00
Ville Syrjälä
366714b088 drm/i915: Extract skl_plane_aux_dist()
Extract the PLANE_AUX_DIST stuff into a small helper to
dclutter skl_program_plane_arm() a bit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-13-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-18 04:04:16 +02:00
Ville Syrjälä
348abd4cf3 drm/i915: Clean up cursor registers
Use REG_BIT() & co. to polish the cursor plane registers.

v2: deal with gvt

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-12-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-18 04:03:27 +02:00
Ville Syrjälä
f6bb74e077 drm/i915: Clean up g4x+ sprite plane registers
Use REG_BIT() & co. to polish the g4x+ sprite plane registers.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-11-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-18 03:54:42 +02:00
Ville Syrjälä
2f609faf5b drm/i915: Clean up ivb+ sprite plane registers
Use REG_BIT() & co. to polish the ivb+ sprite plane registers.

v2: deal with gvt

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-9-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-18 03:51:16 +02:00
Ville Syrjälä
12d7d858e6 drm/i915: Use REG_BIT() & co. for universal plane bits
Polish the skl+ universal plane register defines by
using REG_BIT() & co.

The defines are also currently spread around in some
semi-random fashion. Collect them up into one place.

v2: deal with gvt

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-7-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-18 03:46:59 +02:00
Ville Syrjälä
71b59439aa drm/i915: Sipmplify PLANE_STRIDE masking
There's no need to have separate masks for the stride bitfield
in PLANE_STRIDE for different platforms. All the extra bits
are hardcoded to zero anyway.

Also the masks we're using now don't even match the actual hardware
since the bitfield was only 10 bits on skl/derivatives, only getting
bumped to 11 bits on glk.

So let's just use a 12 bit mask for everything.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-5-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-18 03:40:55 +02:00
Jani Nikula
b0641cb8a1 drm/i915/psr: remove unused lines_to_wait vbt info
The lines_to_wait info from VBT is never used. Remove.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220112112715.1234366-1-jani.nikula@intel.com
2022-01-17 11:24:18 +02:00
Juston Li
a8cf6073d2 drm/i915/pxp: Hold RPM wakelock during PXP unbind
Similar to commit b8d8436840ca ("drm/i915/gt: Hold RPM wakelock during
PXP suspend") but to fix the same warning for unbind during shutdown:

------------[ cut here ]------------
RPM wakelock ref not held during HW access
WARNING: CPU: 0 PID: 4139 at drivers/gpu/drm/i915/intel_runtime_pm.h:115
gen12_fwtable_write32+0x1b7/0
Modules linked in: 8021q ccm rfcomm cmac algif_hash algif_skcipher
af_alg uinput snd_hda_codec_hdmi vf industrialio iwl7000_mac80211
cros_ec_sensorhub lzo_rle lzo_compress zram iwlwifi cfg80211 joydev
CPU: 0 PID: 4139 Comm: halt Tainted: G     U  W
5.10.84 #13 344e11e079c4a03940d949e537eab645f6
RIP: 0010:gen12_fwtable_write32+0x1b7/0x200
Code: 48 c7 c7 fc b3 b5 89 31 c0 e8 2c f3 ad ff 0f 0b e9 04 ff ff ff c6
05 71 e9 1d 01 01 48 c7 c7 d67
RSP: 0018:ffffa09ec0bb3bb0 EFLAGS: 00010246
RAX: 12dde97bbd260300 RBX: 00000000000320f0 RCX: ffffffff89e60ea0
RDX: 0000000000000000 RSI: 00000000ffffdfff RDI: ffffffff89e60e70
RBP: ffffa09ec0bb3bd8 R08: 0000000000000000 R09: ffffa09ec0bb3950
R10: 00000000ffffdfff R11: ffffffff89e91160 R12: 0000000000000000
R13: 0000000028121969 R14: ffff9515c32f0990 R15: 0000000040000000
FS:  0000790dcf225740(0000) GS:ffff951737800000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 000058b25efae147 CR3: 0000000133ea6001 CR4: 0000000000770ef0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000ffff07f0 DR7: 0000000000000400
PKRU: 55555554
Call Trace:
 intel_pxp_fini_hw+0x2f/0x39
 i915_pxp_tee_component_unbind+0x1c/0x42
 component_unbind+0x32/0x48
 component_unbind_all+0x80/0x9d
 take_down_master+0x24/0x36
 component_master_del+0x56/0x70
 mei_pxp_remove+0x2c/0x68
 mei_cl_device_remove+0x35/0x68
 device_release_driver_internal+0x100/0x1a1
 mei_cl_bus_remove_device+0x21/0x79
 mei_cl_bus_remove_devices+0x3b/0x51
 mei_stop+0x3b/0xae
 mei_me_shutdown+0x23/0x58
 device_shutdown+0x144/0x1d3
 kernel_power_off+0x13/0x4c
 __se_sys_reboot+0x1d4/0x1e9
 do_syscall_64+0x43/0x55
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x790dcf316273
Code: 64 89 01 48 83 c8 ff c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44 00
00 89 fa be 69 19 12 28 bf ad8
RSP: 002b:00007ffca0df9198 EFLAGS: 00000202 ORIG_RAX: 00000000000000a9
RAX: ffffffffffffffda RBX: 000000004321fedc RCX: 0000790dcf316273
RDX: 000000004321fedc RSI: 0000000028121969 RDI: 00000000fee1dead
RBP: 00007ffca0df9200 R08: 0000000000000007 R09: 0000563ce8cd8970
R10: 0000000000000000 R11: 0000000000000202 R12: 00007ffca0df9308
R13: 0000000000000001 R14: 0000000000000000 R15: 0000000000000003
---[ end trace 2f501b01b348f114 ]---
ACPI: Preparing to enter system sleep state S5
reboot: Power down

Changes since v1:
 - Rebase to latest drm-tip

Fixes: 0cfab4cb3c4e ("drm/i915/pxp: Enable PXP power management")
Suggested-by: Lee Shawn C <shawn.c.lee@intel.com>
Signed-off-by: Juston Li <juston.li@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220106200236.489656-2-juston.li@intel.com
2022-01-13 15:31:10 -05:00
José Roberto de Souza
5ff59dddac drm/i915/display/adlp: Implement new step in the TC voltage swing prog sequence
TC voltage swing programming sequence was updated with a new step.

BSpec: 54956
Cc: stable@vger.kernel.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220113174826.50272-1-jose.souza@intel.com
2022-01-13 12:08:03 -08:00
José Roberto de Souza
5ec7baef52 drm/i915/display/ehl: Update voltage swing table
EHL table was recently updated with some minor fixes.

BSpec: 21257
Cc: stable@vger.kernel.org
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220113160437.49059-1-jose.souza@intel.com
2022-01-13 12:03:53 -08:00
Jani Nikula
6650ebcbea drm/i915/pcode: rename sandybridge_pcode_* to snb_pcode_*
Prefer acronym-based naming to be in line with the rest of the driver.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220112111740.1208374-1-jani.nikula@intel.com
2022-01-13 15:20:57 +02:00
Jani Nikula
2616be2eac drm/i915/dp: make intel_dp_pack_aux() static again
The last user of intel_dp_pack_aux() outside intel_dp_aux.c got removed
in commit ad26451a7902 ("drm/i915/display: Drop PSR support from HSW and
BDW"). Make the function static again.

Rename the pack/unpack functions to follow the usual naming conventions
while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220112105703.1151391-1-jani.nikula@intel.com
2022-01-13 15:20:48 +02:00
Rodrigo Vivi
cd6e4c2fbb Merge tag 'gvt-next-2022-01-12' of https://github.com/intel/gvt-linux into drm-intel-next
gvt-next-2022-01-12

- Constify some pointers. (Rikard Falkeborn)
- Use list_entry to access list members. (Guenter Roeck)
- Fix cmd parser error for Passmark9. (Zhenyu Wang)

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
From: "Wang, Zhi A" <zhi.a.wang@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f3076d7e-ff71-4882-8d72-fcc577a882cb@intel.com
2022-01-12 12:06:52 -05:00
Rikard Falkeborn
3f8bd465a6 drm/i915/gvt: Constify vgpu_types
It is never modified, so make it const to allow the compiler to put it
in read-only memory. While at it, make name a const char*.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-10-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Rikard Falkeborn
38bd13a0b1 drm/i915/gvt: Constify gtt_type_table_entry
It is never modified, so make it const to allow the compiler to put it
in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-9-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Rikard Falkeborn
b17639c7f7 drm/i915/gvt: Constify formats
These are never modified, so make them const to allow the compiler to
put them in read-only memory. WHile at it, make the description const
char* since it is never modified.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-8-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Rikard Falkeborn
0b782e6692 drm/i915/gvt: Constify cmd_interrupt_events
It is never modified, so make it const to allow the compiler to put it
in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-7-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Rikard Falkeborn
ca1777797a drm/i915/gvt: Constify gvt_mmio_block
These are never modified, so make them const to allow the compiler to
put it in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-6-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Rikard Falkeborn
4642077775 drm/i915/gvt: Constify intel_gvt_sched_policy_ops
These are never modified, so make them const to allow the compiler to
put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-5-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Rikard Falkeborn
1b277c8929 drm/i915/gvt: Constify intel_gvt_irq_ops
These are never modified, so make them const to allow the compiler to
put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-4-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Rikard Falkeborn
5512445c9b drm/i915/gvt: Constify intel_gvt_gtt_pte_ops
These are never modified, so make them const to allow the compiler to
put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-3-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Rikard Falkeborn
c41aadd264 drm/i915/gvt: Constify intel_gvt_gtt_gma_ops
These are never modified, so make them const to allow the compiler to
put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-2-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Zhenyu Wang
3e1f4c4915 drm/i915/gvt: Fix cmd parser error for Passmark9
This is to add one new register required for windows guest driver
update when running Passmark9, otherwise cmd parser would complain
and fail guest workload.

Cc: Terrence Xu <terrence.xu@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211011043329.3519093-1-zhenyuw@linux.intel.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:37 -05:00
Guenter Roeck
919606f5e7 drm/i915/gvt: Use list_entry to access list members
Use list_entry() instead of container_of() to access list members.
Also drop unnecessary and misleading NULL checks on the result of
list_entry().

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210523172304.3033229-1-linux@roeck-us.net
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12 02:52:27 -05:00
Matt Roper
43571e15c0 drm/i915: Drop unused _PORT3 and _PORT4 TC phy register offsets
All MG/DKL PHY register regions are evenly spaced offset-wise (0x168000,
0x169000, 0x16A000, 0x16B000) so the _MMIO_PORT() macro we use to access
their registers only needs the first two offsets.  We can drop the
_PORT3 and _PORT4 offsets which are never directly referenced.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-12-matthew.d.roper@intel.com
2022-01-11 14:03:26 -08:00
Matt Roper
24ce4d6d2c drm/i915: Move TC PHY registers to their own header
Registers representing the MG/DKL TC PHYs (including the TC DPLLs which
exist inside the PHY) are only needed in a couple files and on specific
platforms; let's keep them separate from the general register pool.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-11-matthew.d.roper@intel.com
2022-01-11 14:03:25 -08:00
Matt Roper
d0864ee4f8 drm/i915: Move combo PHY registers to their own header
These registers are only needed in a couple files and on specific
platforms; let's keep them separate from the general register pool.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-10-matthew.d.roper@intel.com
2022-01-11 14:03:25 -08:00
Matt Roper
aa1d6068a4 drm/i915: Move SNPS PHY registers to their own header
These registers are only needed in a couple files and on specific
platforms; let's keep them separate from the general register pool.

v2:
 - Don't forget to include i915_reg_defs.h (Jani)
 - Ensure include guard matches header name (Jani)

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-9-matthew.d.roper@intel.com
2022-01-11 14:03:25 -08:00
Matt Roper
202b1f4c12 drm/i915/gt: Move engine registers to their own header
Let's continue breaking up and cleaning up the massive i915_reg.h file
by moving all registers that are defined in relation to an engine base
to their own header.

There are probably a bunch of other "engine registers" that we haven't
moved yet (especially those that belong to the render engine in the
0x2??? range), but this is a relatively straightforward first step.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-8-matthew.d.roper@intel.com
2022-01-11 14:03:25 -08:00
Matt Roper
2b25a93bf0 drm/i915: Introduce i915_reg_defs.h
We'd like to start splitting i915_reg.h into various domain-specific
register files and cleaning them up.  Let's move the basic macros and
type definitions to their own header file that can be including in each
of the new split headers.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-7-matthew.d.roper@intel.com
2022-01-11 14:03:21 -08:00
Matt Roper
ab076d8d79 drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7
It's preferable to use parameterized register macros where possible.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-6-matthew.d.roper@intel.com
2022-01-11 13:45:40 -08:00
Matt Roper
3e5cbecb9a drm/i915: Use RING_PSMI_CTL rather than per-engine macros
We have a parameterized macro for RING_PSMI_CTL; let's use that instead
of the per-engine definitions where possible.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-5-matthew.d.roper@intel.com
2022-01-11 13:45:39 -08:00
Matt Roper
e0d47fcff1 drm/i915: Parameterize ECOSKPD
Combine the separate render and blitter register definitions into a
single definition.  We already know we have some workarounds on an
upcoming platform that will need to update the ECOSKPD register for
other engines too, so this helps pave the way for that.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-4-matthew.d.roper@intel.com
2022-01-11 13:45:39 -08:00