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166 Commits

Author SHA1 Message Date
Alex Deucher
19cc89dcb9 drm/amdgpu/swsmu: drop smu i2c bus on navi1x 
Stop registering the SMU i2c bus on navi1x.  This leads to instability
issues when userspace processes mess with the bus and also seems to
cause display stability issues in some cases.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1314
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1341
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:01:40 -04:00
Evan Quan
b1878847ac drm/amd/pm: drop redundant display setting 
As this is already performed in smu7_set_power_state_tasks().

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:52 -04:00
Evan Quan
62ff83a4f6 drm/amd/pm: reconfigure smc on display vbitimeout setting change 
Reconfigure smc display settings on vbitimeout change.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:47 -04:00
Evan Quan
d49873c93f drm/amd/pm: correct the mclk switching setting 
Correct the mclk switching setting for multiple displays.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:41 -04:00
Evan Quan
b03fd3e7e6 drm/amd/pm: enable Polaris watermark table setting 
Enable watermark table setting for Polaris.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:34 -04:00
Evan Quan
690cdc2635 drm/amd/pm: fulfill the Polaris implementation for get_clock_by_type_with_latency() 
Fulfill Polaris get_clock_by_type_with_latency().

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:28 -04:00
Evan Quan
db6f5c7f95 drm/amd/pm: correct vddc_dep_on_dal_pwrl setup 
Correct Polaris10 setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:21 -04:00
Evan Quan
9182fefcb8 drm/amd/pm: correct SMC sclk/mclk boot level setup 
Correct Polaris smc boot level setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:15 -04:00
Evan Quan
8f97e221d6 drm/amd/pm: correct pcie spc cap setup 
Correct Polaris10 pcie spc cap setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:09 -04:00
Evan Quan
ba4601feba drm/amd/pm: correct clk/voltage dependence setup 
Correct Polaris10 clk/voltage dependence setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:03 -04:00
Evan Quan
be56f22b62 drm/amd/pm: correct the way to get the highest vddc 
Populate the correct highest vddc setting on Polaris.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:57 -04:00
Evan Quan
d765129a71 drm/amd/pm: correct sclk/mclk dpm enablement 
Correct Polaris10 sclk/mclk dpm enablement.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:51 -04:00
Evan Quan
baa495f764 drm/amd/pm: correct smc voltage controller setup 
Correct Polaris10 smc voltage controller setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:45 -04:00
Evan Quan
326d0ff7aa drm/amd/pm: correct platformcaps setup 
Correct Polaris10 platformcaps setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:39 -04:00
Evan Quan
55411d1623 drm/amd/pm: correct VRconfig setting 
Correct Polaris VRconfig setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:34 -04:00
Evan Quan
a6d8a6eb3e drm/amd/pm: correct vddc phase control setting 
Correct Polaris10 vddc phase control.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:28 -04:00
Evan Quan
b23dbd603b drm/amd/pm: correct avfs fuse settings 
Correct Polaris10 avfs fuse setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:22 -04:00
Evan Quan
dba1953168 drm/amd/pm: correct Polaris DIDT configurations 
Correct Polaris DIDT enablement.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:16 -04:00
Evan Quan
d8b61d5a0d drm/amd/pm: correct Polaris powertune table setup 
Correct powertune table setup for Polaris.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:10 -04:00
Evan Quan
f6638d0e6f drm/amd/pm: correct the checks for sclk/mclk SS support 
Correct sclk/mclk SS support checks.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:03 -04:00
Evan Quan
a8588b8bb3 drm/amd/pm: correct VR shared rail info 
Add VR shared rail info.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:57 -04:00
Evan Quan
5f92b48cf6 drm/amd/pm: add mc register table initialization 
Add mc register table initialization.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:51 -04:00
Evan Quan
8f0804c6b7 drm/amd/pm: add edc leakage controller setting 
Enable edc controller table setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:45 -04:00
Evan Quan
9610a3bfde drm/amd/pm: setup zero rpm parameters for polaris10 
Only if the ZeroRPM feature is supported.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:39 -04:00
Evan Quan
c420418f1d drm/amd/pm: correct polaris10 clock stretcher data table setting 
By using the saved copy of ro_range_maximum and ro_range_minimum.
Correct the setting for "LdoRefSel".

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:33 -04:00
Evan Quan
a90e6fbe47 drm/amd/pm: correct the settings for ro range minimum and maximum 
Make the settings more precise.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:27 -04:00
Evan Quan
029479acca drm/amd/pm: drop redundant efuse mask calculations 
By moving that in atomfw_read_efuse().

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:21 -04:00
Evan Quan
555440822b drm/amd/pm: optimize AC timing programming 
Programming AC Timing Parameters is only dependent on MCLK.
No need to nest loop for each SCLK DPM level.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:15 -04:00
Evan Quan
18973c6ec4 drm/amd/powerplay: separate Polaris fan table setup from Tonga 
Instead of sharing the fan table setup with Tonga, Polaris has
its own fan table setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:08 -04:00
Evan Quan
8c23cc29d5 drm/amd/pm: add PWR_CKS_CNTL setting 
This is for some special Polaris10 ASICs.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:01 -04:00
Evan Quan
7f95a2e01c drm/amd/pm: drop arb table first byte workaround 
As this is not needed for polaris.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:48 -04:00
Evan Quan
e9016fc2ad drm/amd/pm: add pptable VRHotLevel setting 
Add missing VRHotLevel setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:42 -04:00
Evan Quan
3a9f6bb21d drm/amd/pm: correct the BootLinkLevel setup 
Set the BootLinkLevel as the max level.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:36 -04:00
Evan Quan
a193d97741 drm/amd/pm: correct the ACPI table setup V2 
Correct the setting for "ActivityLevel".

V2: rich the comment

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:28 -04:00
Evan Quan
0232af1cea drm/amd/pm: correct mclk table setup 
Correct the settings for "StutterEnable" and "EnabledForActivity".

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:21 -04:00
Evan Quan
374b0781a0 drm/amd/pm: correct sclk table setup 
Correct Polaris10 sclk table setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:15 -04:00
Evan Quan
8849fe64f6 drm/amd/pm: correct vddci table setup 
Make sure the settings are applied only when voltage
controlled by gpio.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:09 -04:00
Evan Quan
3df9931b06 drm/amd/pm: populate smc samu table 
Add missing smc samu table setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:03 -04:00
Evan Quan
10efb75b58 drm/amd/pm: populate smc vddc table 
Add missing vddc table setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:56:57 -04:00
Tao Zhou
34c0631bbd drm/amd/pm: update driver if version for dimgrey_cavefish 
Per PMFW 59.9.0.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-26 13:27:08 -04:00
Kenneth Feng
891bacb835 drm/amd/pm: remove the average clock value in sysfs 
if it's fine-grained clock dpm, remove the average clock value and
reflects the real clock.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-23 15:30:49 -04:00
Kenneth Feng
4e2b3e23b2 drm/amd/pm: fix pp_dpm_fclk 
fclk value is missing in pp_dpm_fclk. add this to correctly show the current value.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-21 16:16:54 -04:00
Kenneth Feng
1eeb03c883 drm/amd/pm: fix the wrong fan speed in fan1_input 
fix the wrong fan speed in fan1_input when the fan control mode is manual.
the fan speed value is not correct when we set manual mode to fan1_enalbe - 1.
since the fan speed in the metrics table always reflects the real fan speed,we
can fetch the fan speed for both auto and manual mode.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-21 16:15:19 -04:00
Likun Gao
1dc3c5a95b drm/amd/pm: update driver if file for sienna cichlid 
Update driver if file for sienna cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-21 16:14:40 -04:00
Likun Gao
f20c52f40a drm/amd/pm: fix pcie information for sienna cichlid 
Fix the function used for sienna cichlid to get correct PCIE information
by pp_dpm_pcie.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-21 16:14:33 -04:00
Kevin Wang
7aeef2aacc drm/amd/swsmu: correct wrong feature bit mapping 
1. when smc feature bit isn't mapped,
the feature state isn't showed on sysfs node of pp_features.
2. add pp_features table title

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-21 16:13:57 -04:00
Jiansong Chen
15d67827b0 drm/amd/pm: drop navy_flounder hardcode of using soft pptable 
Drop navy_flounder hardcode of using soft pptable, so that it
can use pptable from vbios when available.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-16 14:45:04 -04:00
Kevin Wang
e9073b4362 drm/amd/swsmu: add missing feature map for sienna_cichlid 
it will cause smu sysfs node of "pp_features" show error.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-16 14:44:44 -04:00
Evan Quan
76c71f00d7 drm/amd/pm: properly setting GPO feature on UMD pstate entering/exiting 
Disable/enable the GPO feature on UMD pstate entering/exiting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-15 12:21:17 -04:00
Evan Quan
f2b75bc24d drm/amd/pm: correct gfx and pcie settings on umd pstate switching(V2) 
For entering UMD stable Pstate, the operations to enter rlc_safe
mode, disable mgcg_perfmon and disable PCIE aspm are needed. And
the opposite operations should be performed on UMD stable Pstate
exiting.

V2: take those ASICs(CI/SI/VI) which may not support this into
    consideration

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-15 12:20:46 -04:00