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Xilinx ZYNQMP logicoreIP Init driver is based on the new
LogiCoreIP design created. This driver provides the processing system
and programmable logic isolation. Set the frequency based on the clock
information get from the logicoreIP register set.
Signed-off-by: Dhaval Shah <dshah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
- Update i.MX GPC driver to support PCI power domain of i.MX6SX SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJaTCqGAAoJEFBXWFqHsHzOavcH/1g0k3tN4MaOvf44lSDm5uCZ
WqCKLN01f8T02YegdcgVVc59wirJB6xKIYD86dQIiVC8gEfMOhvfEuv6qkPRHQOM
WVYJTIFFisEeypnXEHjD2SwN6/SskSGPMUDpfj0hveb0srLnCQou+5Ty8zpvmAdl
XEAP9mjK7s6ovfomfuxEY4iWxGRKbDXtwXqtvYTI3tpXwn/c6LXgdrg02xC/KAXp
sKXbS0NbYjBDHBd8hPcVVwujugw3UZHr/saYYf0rmC7WKr7074WylSWW08aKQ89u
Elv5fNeoAYrlnwpeoqzLqcgrvhCJcpx0HTVnYjmNIVLYRLAktYu6glR7icAdpb8=
=kB/f
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
Pull "i.MX drivers update for 4.16" from Shawn Guo:
- Update i.MX GPC driver to support PCI power domain of i.MX6SX SoC.
* tag 'imx-drivers-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpc: Add i.MX6SX PCI power domain
* rcar-sysc: Keep wakeup sources active during system suspend
Geert Uytterhoeven says "If an R-Car SYSC slave device is part of the
CPG/MSTP or CPG/MSSR Clock Domain and to be used as a wakeup source, it
must be kept active during system suspend.
Currently this is handled in device-specific drivers by explicitly
increasing the use count of the module clock when the device is
configured as a wakeup source. However, the proper way to prevent the
device from being stopped is to inform this requirement to the genpd
core, by setting the GENPD_FLAG_ACTIVE_WAKEUP flag.
Note that this will only affect devices configured as wakeup sources."
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlo81TEACgkQ189kaWo3
T76Lrw/+LccDaaNJppUYzGUSPQ0P6BYgmac8fv5A3qk63CzdemirAqhA3LdXNNEn
RW1VpVBeLPv1GMYdxvuS0HqvfBPk92hFFJXMyRsjS5PF4pSupHubBM2g34u7qcGg
7D6MxyZYlPxFPMyb3DIqNDKHbt+PMxeidtoMylNURBPJS3ERLo+RUeAco1SBTW2Q
hojrDBB7P5CGSNkfJ+VjYExYgZgfCfyzVyozMHmWUuPul3ZdfKfXf/ZhAp2BVAEN
ZTiccpZpSo6dZyYnMTEQ9Pd4eOlrBl3EfHdZcbeH+VzXou50KvzQ+6cWdHKMsc6w
bUvKxXy/uEiqq6Bs83AdUAb9UvCKM9bK8jLZXScmPHQUZWt+K2WemlrRPgtekKR1
VEGmABFwKEtcEzwXzkcG4fe1SxrJdPrBljwFk89KpqSAn4+TElqBAmo/F5V/ALj7
l2AuqcGMzazuSnGSVk6ha/BXqdP0IKbk6mq/UqO/ORNsOjaajtXcjuKHDowBzPN9
aHTLMPXRPWSvHGQEuxOggNHm0Cehjwni8t0pku3ndG8TNx2DsaG8L/rUTNUU/J2m
ynWuFBbzReB0epHBuXJMvWPd9AWX+kL12KouDvFbp0a4b5L1KSTka3oXlC88oXkl
CMKXS6VQJ8nda9Dev9Za19BnUQrgeHq0anD5Q9wVeWwauh8Uueg=
=0tvJ
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc2-for-v4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Second Round of Renesas ARM Based SoC Updates for v4.16
* rcar-sysc: Keep wakeup sources active during system suspend
Geert Uytterhoeven says "If an R-Car SYSC slave device is part of the
CPG/MSTP or CPG/MSSR Clock Domain and to be used as a wakeup source, it
must be kept active during system suspend.
Currently this is handled in device-specific drivers by explicitly
increasing the use count of the module clock when the device is
configured as a wakeup source. However, the proper way to prevent the
device from being stopped is to inform this requirement to the genpd
core, by setting the GENPD_FLAG_ACTIVE_WAKEUP flag.
Note that this will only affect devices configured as wakeup sources."
* tag 'renesas-soc2-for-v4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: Keep wakeup sources active during system suspend
Signed-off-by: Olof Johansson <olof@lixom.net>
The SPS power domain driver is extended for S700 SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJaPNqqAAoJEPou0S0+fgE/IVYP/i0VYqTyCSz6yDJJU4N02lvN
wp4k7QSLKgX2GcNScYEu7hwfooourZGW0xk+A5lk9sBwspYxw+uWcd0kFmlwkBbp
Dk7f0YjsjnC2ipWMv327RClC6BrgEigydbkDyaH7jAF/FXlgo0VJWkjI+ZcayU6j
ZchrqyGm20ASlkm6HD6cPY0GPu918cKr6XhOON2xE2lPuXRUVQd9XHkJAXXQFCQ2
oomavKzTtT0kH/4uEZnKGB0xyx9v8LzDTEVUkfZhXiOnN5Elh0Spmev0JlEnWTtn
6J9hSnxNcQov4klbg3oRDk9kXpD1yTXtpwy8mNvMGtKq9Y93WMsH2S+GwyElEtDM
EqxpOaREXnVOeJ04uMwZgXeLyQMn73qw+FFF02QU6VRU+j5gz7MTsif4BWx2gBAw
CygX6I+zq86VpIl7beVaSVEI49QYUF5ygJB1zT31IN6jZX1D1g5D7GBmzq1sPieE
uzzI6EH3LgrNJrVXe39PqCwzQIDtQHDYNo3je3sexDvTB6mUpSEMzZuJgpWnA7jS
TjrjNGwmUpL/FaMPRdBr4VUhgd1uQmYcC5lzAo5wOl40QzABsMObXPcf6uE/Myau
f+ZbI3HgmivLzOkoQct8bRpjzsXCFoXGW76kkxdmptY7PkeE6orjHwFMEPb6VUES
FBVr27/EoQc9dIf12c3V
=u1IY
-----END PGP SIGNATURE-----
Merge tag 'actions-drivers-for-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/drivers
Actions Semi SoC drivers for v4.16
The SPS power domain driver is extended for S700 SoC.
* tag 'actions-drivers-for-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
soc: actions: sps: Add S700
Signed-off-by: Olof Johansson <olof@lixom.net>
4.16, please pull the following:
- Arnd provides an update to the Raspberry Pi firmware interface and uses time64_t to
print the time to make it more future proof
- Florian provides a set of updates to make the Broadcom STB Bus Interface Unit code
work on newer ARM64-based chips, as well as perform the correct interface tuning
for these chips to reach the expected performance
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJaPE0dAAoJEIfQlpxEBwcEk/oQALjUzNWkipO31Ahx35r7kblW
4RC39ebaU31fR6yMOlKWQGh/uklHopcDuRQHAGR7IHg2MSr/uQ/xb7rgz4Qa1ZTD
gRPcT9rI2mNctiWLFoB3EaYmA0J3EOMJI1GMIvHPGc3WZ5Y4FHKICW3qK7mvGndc
obmiAU4mFyK31SKKm8k+TX6bzPsr1ZEm2tW9kRkWKfGk05DVD+KsKa5Xvn0USlS4
0jiXo+naHv5KtYXSuSc+Kg0qcCB3K2SFJVAOPgjTMzo498Vcv6mWLQPfGg3vDmCt
3rEiDhPoJJ6soAuG2OmHQCykTr0uwRZNhOc385JCKf8TP8CjV8aK71lJe0oFQgtg
nC67z+uVLJ3tXoI1Y0V0DQXCTNLKgsbU19p14S+rDM2MQ41yGzWoVdT9ZhEDEbyj
sDeC+d9DVQTuXqImqe16M3oZSsCWuMCRz0LG2uDhoTHMNmegU//nY6VhVR7ia0Ia
BIDCsbNf1KEDEUi1v5nPJSNC2Oyk/mVOPzl8xwMdw3VV4eYggC9aqljmwDWWCxV5
GNCGbP/0UgKG6iUadqK2HM+0syRWA5E3ypWg8VPtU6g+lZKYqnh6g23F4lJklE1U
WhKKK52OCRZ0w/ut2TWJmhpmn+CfR7VcVv9IS9zElBbyU/fg27Mkpu/Ty7bBx0my
kmCDHOGHZyl4jrKhwxGg
=RHHM
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.16/drivers' of http://github.com/Broadcom/stblinux into next/drivers
This pull request contains Broadcom ARM/ARM64 based SoCs drivers changes for
4.16, please pull the following:
- Arnd provides an update to the Raspberry Pi firmware interface and uses time64_t to
print the time to make it more future proof
- Florian provides a set of updates to make the Broadcom STB Bus Interface Unit code
work on newer ARM64-based chips, as well as perform the correct interface tuning
for these chips to reach the expected performance
* tag 'arm-soc/for-4.16/drivers' of http://github.com/Broadcom/stblinux:
soc: brcmstb: biuctrl: Move to early_initcall
soc: brcmstb: Split initialization
soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings
soc: brcmstb: biuctrl: Wire-up new registers
soc: brcmstb: biuctrl: Prepare for saving/restoring other registers
soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs
soc: brcmstb: Make CPU credit offset more parameterized
dt-bindings: arm: brcmstb: Correct BIUCTRL node documentation
dt-bindings: arm: Add entry for Broadcom Brahma-B53
firmware: raspberrypi: print time using time64_t
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds an SoC driver for the Gemini. Currently there
is only one thing not fitting into any other framework,
and that is the bus arbitration setting.
All Gemini vendor trees seem to be setting this register to
exactly the same arbitration so we just add a small code
snippet to do this at subsys_init() time before any other
drivers kick in.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add a jump target so that a specific error message is stored only once
at the end of this function implementation.
* Replace two calls of the function "dev_err" by goto statements.
* Adjust two condition checks.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
i.MX6SX has a PCI power domain in PGC. Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- add support for mt2701 scpsys driver
binding documentation
extend driver to allow the bus protection to overwrite the register
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlo7nMIXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00MF/Q/9GOX4n+FAPR8OXQcSn8X5L6Ep
RvUr3np4IFfLBXBReM6nR479+LOE5VLIk/eAad0Avsnbv3TZw38+nXN4vU3skLkr
byuri9SRaTXAs7/pxDDRredkm1Woo8H4Zo+LiNjTOv1ydlBV7NqJfqIMDyVgOpZN
1msE3Ug3w5FjnZiRZcCdDreXnk4FYlV4rbJFRQTG1zCENH7GARreyI5xWR59QUzB
PnGMHLqUE1FU2KyGoNwxNfnBHdYUHohV7DIC9NI6ucXjbmmbON3PCFPeuUn6jvdu
8qNGGfY6Wv+Vwyg1VKahI/dpI0Vy+n/8AA5lbSb+8Qe6ha+6xSDedN2Y6YNF4J1v
iuVFzG8GvUChMFuVYw8F0vsoR1r02uoErxzi9Qgav6uUGAMYOitPnjd2FJ21l2n+
+P46e6yd9Eq5z6ikmAvbF0qhK2XOWCjVzah2Cjv7frlqLsonVYOD52RMgIKndR/x
WTZCbPQhMR5LutiQMryIrtLsLe1i4AZP4zaeLnupfdijiXwo6dD7/k98CnqUJtQT
1HWrLQb2gdc8aWhqNsn5sg5Lss3hQWvPq6tgLxk/+HshR1/DoqIE4K8bqvaceI5r
meFT8R9y1XBwFu167I1uJIQyvQulrLs0B/VKg6unJM8AHpw326PckYEqHo0TOJUF
XWHFH4MdN1TwpGi9mww=
=5u17
-----END PGP SIGNATURE-----
Merge tag 'v4.15-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/soc
Pull "arm: Updates for soc driver for v4.15-next" from Matthias Brugger:
- change kconfig entry for armv7 SoCs to be more generic
- add support for mt2701 scpsys driver
binding documentation
extend driver to allow the bus protection to overwrite the register
* tag 'v4.15-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: add MT2712 scpsys support
soc: mediatek: add dependent clock jpgdec/audio for scpsys
soc: mediatek: extend bus protection API
dt-bindings: soc: add MT2712 power dt-bindings
ARM: mediatek: use more generic prompts for SoCs with ARMv7
Fuse and chip ID support for Tegra186 is added in this set of changes,
followed by some unification work for the PMC driver in order to avoid
code duplication between Tegra186 and prior chips.
This also contains a couple of fixes for reading fuses on Tegra20.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlo73FITHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoXFYD/9LdBMkXZdG8ftCyKhIrdmT8HoGCVMc
Hq1H4oY1DEwkUGf+98dP+E5M9OqH/s7VzCqzb5OSzkroVplvTVe6x40ZGdAVP6AN
SEsHIJSZ1gssuQdJVqh4mZcz4YdT33qlQ8Y64ur4m7GPwwz8nwWDLcDVufNlPpra
RrcqG+hDj85D61wP/QKmeUgow3eTLfW1rxV6Vu7mj9LrrKXt92qE6JAlGRmRfxxH
XmUa9GoXfHxBu2jGJHotL7TGwUTkSEGk7F78b1g8n9s38cohYNTbOjxdw1468nZY
Y5wwJUNZqY1bJJB6mCEDOqcufsKCZr6yGSvoHZUWC2NeXsOHSzqSZQD6bR9jDygH
TMaCSlYVOw4Rbj5WJPLvbFj5kyhuDx1ATR9xoVBkleX3npu+KtwzQaK8rRtUP81/
yXcSxt4BKAfLAMloR1ycw13yMXAzu7jZhZYCOT61GBsQ45AgCMy5XBwV9TBitIdN
+ScsZ+QZd31Lt6Sq4KEZZHqaKMWqFXezW9GeqmvOE+uVzfA8TLtO8ud5OeP5c6bU
c5oe4Oy3HmjG8HzQErdjr/eBAlONwEBKFw3o4GVNb0R9x20SysqlP91wKDfgBM9k
32ZWTF10QXxebY92WneEjLImJeU/U0iHkmNS4tpQC1Egi7tvqkGGh6HnXVt11hk9
cr4ElWaSu1cuaQ==
=3l9M
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.16-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
Pull "soc/tegra: Changes for v4.16-rc1" from Thierry Reding:
Fuse and chip ID support for Tegra186 is added in this set of changes,
followed by some unification work for the PMC driver in order to avoid
code duplication between Tegra186 and prior chips.
This also contains a couple of fixes for reading fuses on Tegra20.
* tag 'tegra-for-4.16-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: fuse: Explicitly request DMA channel from APB DMA driver
soc/tegra: fuse: Fix reading registers using DMA on Tegra20
soc/tegra: pmc: Consolidate Tegra186 support
soc/tegra: pmc: Parameterize driver
soc/tegra: fuse: Add Tegra186 chip ID support
soc/tegra: fuse: Warn if accessing unmapped registers
soc/tegra: fuse: Move register mapping check
soc/tegra: fuse: Add Tegra186 support
dt-bindings: misc: Add Tegra186 MISC registers bindings
Currently fuse driver requests DMA channel from an arbitrary DMA device,
it is not a problem since there is only one DMA provider for Tegra20 yet,
but it may become troublesome if another provider will appear.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
FUSE driver doesn't configure DMA channel properly, because of it DMA
transfer is never issued and tegra20_fuse_read() always return 0x0.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
* Identify R-Car M3-W ES1.1
Geert Uytterhoeven says "The Product Register of R-Car M3-W ES1.1
incorrectly identifies the SoC revision as ES2.0. Add a workaround to
fix this."
It is my understanding that this is likely to be forwards-compatibile.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlonu8cACgkQ189kaWo3
T76hcw//bUQJZvzI1VMIcfdu1KY47lu8GPGgPMyb2ULfuLcpRXG3AzFCzT5HJjBe
BBPoCISEhuh4M6bpWyDs0AVkvJUjrTmiy6FPS1mqllh8rp6xx6v5OM9OP3cPyNzS
ECY8TmPgij4oBbp5e0JvA+SnRp0biR750TXwIHytUtNe0o1R0kpyqo+OUtR79lTe
rQyX4CRrNQozmUTsCiTuWf972jHJW4IInbrEr6PU89MB/WrdAiS6TnKxtDprGMqe
5TzKGxd6UxuX/X7ZGte0+mTW5ur/Jgg2C4mQx6UD3Wp7iJn3geXsdxnwTA9dWi+0
iz8l10/EY2bPBYm3UbiclDuv68uxFy3h+2pTYbguIvHvRqIwwpQzt0/iIwpkoNGN
XDC6g4l4+B97opV+uoNJub2b64ev4gJQ3ugxfZMgQOKWA6FNjABmIpvlQKQzWylp
B5R5fXz/eyhbqtzGcb7Y/7kS+ezO+8pz8WdwGRAQKQ0B/cGHeS3aoA6JaOZXIeN1
nzVmKpeZfCiKGF16v8Ds6cz0QJcQWDHU/WMsPKS2KnHwd0ipp8DtR/F9PX+KNomv
LZiUyJ5ER9g1bVEPm1K2zyQ0LbIfpQsw0xHAD05BEKflep+eleYOFhja/iX4hs+9
n1wbz4GnhKFEG40lwq6Z0kwiKSupJrv9Wzbtb/Yv9SDOVD5Zj9M=
=eL6d
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc-for-v4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Updates for v4.16" from Simon Horman:
* Identify R-Car M3-W ES1.1
Geert Uytterhoeven says "The Product Register of R-Car M3-W ES1.1
incorrectly identifies the SoC revision as ES2.0. Add a workaround to
fix this."
It is my understanding that this is likely to be forwards-compatibile.
* tag 'renesas-soc-for-v4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: Identify R-Car M3-W ES1.1
There are dependent clock jpgdec/audio in scpsys on MT2712,
and will exist three dependent clocks on MT2712 VDEC.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT2712 add "set/clear" bus control register to each control register set
instead of providing only one "enable" control register, we could avoid
the read-modify-write racing by declaring "bus_prot_reg_update" as "false"
in scp_soc_data or declaring as "true" to use the legacy update method.
By improving the mtk-infracfg bus protection implementation to
support set/clear bus protection control method by IC configuration.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Being called during early_initcall() is early enough that it occurs
before SMP initialization, which is all we care about for the Bus
Interface Unit configuration.
This solves lack of BIU initialization on ARM64 platforms where we do
not have an anchor where to put the BIU initialization (since there are
no machine descriptors).
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
We may need access to family_id and product_id fairly early on boot for
other parts of the code (e.g: biuctrl.c), so split the initialization
between an early_init() and an arch_initcall() which allows us to do
that.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
In order to achieve expected MCP bus throughput on 3 particular chips:
7268, 7271 and 7278, do the appropriate programming of the MCP
interface: increase number of MCP write credits, turn on write-back
throttling when present.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add definitions for B53 systems register: CPU_MCP_FLOW_REG and
CPU_WRITEBACK_CTRL_REG. These register will be saved and restored
accordingly.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
In preparation for saving/restoring additional registers required on
some newer platforms (7268, 7271, 7278), migrate the code to use enums
and helper functions to access registers.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
On Broadcom Brahma-B53 CPUs, the CPU_CREDIT_REG offset got moved to
0x0b0 instead of 0x184, correct this such that we correcty
enable/disable write-pairing for these chips.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
In preparation for fixing and changing values in the CPU_CREDIT_REG
register for B53-based systems, make the offset parameterized.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Drivers that needs to communicate with a remote QMI service all has to
perform the operations of discovering the service, encoding and decoding
the messages and operate the socket. This introduces an abstraction for
these common operations, reducing most of the duplication in such cases.
Acked-by: Chris Lew <clew@codeaurora.org>
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the helper library for encoding and decoding QMI encoded messages.
The implementation is taken from lib/qmi_encdec.c of the Qualcomm kernel
(msm-3.18).
Modifications has been made to the public API, source buffers has been
made const and the debug-logging part was omitted, for now.
Acked-by: Chris Lew <clew@codeaurora.org>
Tested-by: Chris Lew <clew@codeaurora.org>
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Attempt to acquire the APCS IPC through the mailbox framework and fall
back to the old syscon based approach, to allow us to move away from
using the syscon.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This change resolves a new compile-time warning
when built as a loadable module:
WARNING: modpost: missing MODULE_LICENSE() in drivers/soc/qcom/rmtfs_mem.o
see include/linux/module.h for more information
This adds the license as "GPL v2", which matches the header of the file.
MODULE_DESCRIPTION and MODULE_AUTHOR are also added.
Signed-off-by: Jesse Chan <jc@linux.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Fix child-node lookup during probe, which ended up searching the whole
device tree depth-first starting at the parent rather than just matching
on its children.
Note that the original premature free of the parent node has already
been fixed separately.
Also note that this pattern of looking up the first child node with a
given property is rare enough that a generic helper is probably not
warranted.
Fixes: c97c4090ff72 ("soc: qcom: smsm: Add driver for Qualcomm SMSM")
Fixes: 3e8b55411468 ("soc: qcom: smsm: fix of_node refcnting problem")
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
If an R-Car SYSC slave device is part of the CPG/MSTP or CPG/MSSR Clock
Domain and to be used as a wakeup source, it must be kept active during
system suspend.
Currently this is handled in device-specific drivers by explicitly
increasing the use count of the module clock when the device is
configured as a wakeup source. However, the proper way to prevent the
device from being stopped is to inform this requirement to the genpd
core, by setting the GENPD_FLAG_ACTIVE_WAKEUP flag.
Note that this will only affect devices configured as wakeup sources.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
If source string longer than max, kstrndup will alloc max+1 space.
So, we should make sure the result will not over limit.
Signed-off-by: Ma Shimiao <mashimiao.fnst@cn.fujitsu.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Move Tegra186 support to the consolidated PMC driver to reduce some of
the duplication and also gain I/O pad functionality on the new SoC as a
side-effect.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Parameterize some aspects of the driver in preparation for Tegra186 PMC
support. Initially the Tegra186 driver had been split off into an extra
driver, but it turns out the backwards-compatibility break isn't as bad
as originally assumed, so with a little parameterization the same code
can be used to keep supporting all SoC generations.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The register region containing chip ID information has been relocated in
Tegra186 and changed in backwards-incompatible ways. Add a compatible
string to allow the driver to make the distinction.
Signed-off-by: Thierry Reding <treding@nvidia.com>
If the FUSE registers are accessed but the region is not mapped, warn
and return 0. This potentially catches hard to diagnose bugs because the
accesses happen before any kernel log output.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The tegra_read_chipid() function can be called from places other than
tegra_get_chip_id(), so the check for a valid mapping of the MISC
registers needs to be moved to tegra_read_chipid() to catch all
potential accesses.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 and Tegra186 are mostly compatible from a fuses point of view.
However, speedo support is implemented in the BPMP firmware, hence the
implementation needs to be skipped in the fuses driver.
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
[treding@nvidia.com: reword commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch is to add compatible strings "fsl,ls1021a-dcfg" and
"fsl,ls1043a-dcfg" into device match table of GUTS driver.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
I've noticed the following message while booting a S905X based board:
soc soc0: Amlogic Meson GXL (S905D) Revision 21:82 (b:2) Detected
The S905D string is obviously wrong. The vendor code does:
...
ver = (readl(assist_hw_rev) >> 8) & 0xff;
meson_cpu_version[MESON_CPU_VERSION_LVL_MINOR] = ver;
ver = (readl(assist_hw_rev) >> 16) & 0xff;
meson_cpu_version[MESON_CPU_VERSION_LVL_PACK] = ver;
...
while the current code does:
...
...
This means that the current mainline code has package id and minor
version reversed.
Fixes: a9daaba2965e8 ("soc: Add Amlogic SoC Information driver")
Signed-off-by: Arnaud Patard <apatard@hupstream.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Product Register of R-Car M3-W ES1.1 incorrectly identifies the SoC
revision as ES2.0. Add a workaround to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This branch contains platform-related driver updates for ARM and ARM64,
these are the areas that bring the changes:
New drivers:
- Driver support for Renesas R-Car V3M (R8A77970)
- Power management support for Amlogic GX
- A new driver for the Tegra BPMP thermal sensor
- A new bus driver for Technologic Systems NBUS
Changes for subsystems that prefer to merge through arm-soc:
- The usual updates for reset controller drivers from Philipp Zabel,
with five added drivers for SoCs in the arc, meson, socfpa, uniphier
and mediatek families.
- Updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
Heiner Kallweit and Lorenzo Pieralisi.
Changes specific to some ARM-based SoC
- The Freescale/NXP DPAA QBMan drivers from PowerPC can now work
on ARM as well.
- Several changes for power management on Broadcom SoCs
- Various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek
- Minor Cleanups for Samsung, TI OMAP SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaDggbAAoJEGCrR//JCVInIeQQAN1MDyO1UaWiFYnbkVOgzFcj
dqbFOc41DBE/90JoBWE8kR/rjyF83OqztiaYpx9viu2qMMBZVcOwxhCUthWK59c/
IujYdw4zGevLscF+jdrLbXgk97nfaWebsHyTAF307WAdZVJxiVGGzQEcgm71d6Zp
CXjLiUii4winHUMK9FLRY2st0HKAevXhuvZJVV432+sTg3p7fGVilYeGOL5G62WO
zQfCisqzC5q677kGGyUlPRGlHWMPkllsTTnfXcmV/FUiGyVa3lUWY5sEu+wCl96O
U1ffPENeNj/A/4fa1dbErtbiNnC2z/+jf+Dg7Cn8w/dPk4Suf0ppjP8RqIGyxmDl
Wm/UxbwDClxaeF4GSaYh2yKgGRJMH5N87bJnZRINE5ccGiol8Ww/34bFG0xNnfyh
jSAFAc318AFG62WD4lvqWc7LSpzOYxp/MNqIFXKN692St/MJLkx8/q0nTwY1qPY0
3SELz9II3hz+3MfDRqtRi7hZpkgHgQ+UG7S5+Xhmqrl309GOEldCjPVJhhXxWoxK
ZPtZOuyYvGhIC+YAnHaN6lUjADIdNJZHwbuXFImx85oKHVofoxHbcni5vk8Uu7z1
sQNYOtdDGaPG/2u9RJdJlPg/jIgLKxxt/Xm9TYVawpZ5hFANhBTtIq5ExCRAil68
j9sMOrpZ1DzCQyR7zN2v
=qDhq
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"This branch contains platform-related driver updates for ARM and
ARM64, these are the areas that bring the changes:
New drivers:
- driver support for Renesas R-Car V3M (R8A77970)
- power management support for Amlogic GX
- a new driver for the Tegra BPMP thermal sensor
- a new bus driver for Technologic Systems NBUS
Changes for subsystems that prefer to merge through arm-soc:
- the usual updates for reset controller drivers from Philipp Zabel,
with five added drivers for SoCs in the arc, meson, socfpa,
uniphier and mediatek families
- updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
Heiner Kallweit and Lorenzo Pieralisi
Changes specific to some ARM-based SoC
- the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on
ARM as well
- several changes for power management on Broadcom SoCs
- various improvements on Qualcomm, Broadcom, Amlogic, Atmel,
Mediatek
- minor Cleanups for Samsung, TI OMAP SoCs"
[ NOTE! This doesn't work without the previous ARM SoC device-tree pull,
because the R8A77970 driver is missing a header file that came from
that pull.
The fact that this got merged afterwards only fixes it at this point,
and bisection of that driver will fail if/when you walk into the
history of that driver. - Linus ]
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits)
soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader
bus: add driver for the Technologic Systems NBUS
memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg()
soc: qcom: remove unused label
soc: amlogic: gx pm domain: add PM and OF dependencies
drivers/firmware: psci_checker: Add missing destroy_timer_on_stack()
dt-bindings: power: add amlogic meson power domain bindings
soc: amlogic: add Meson GX VPU Domains driver
soc: qcom: Remote filesystem memory driver
dt-binding: soc: qcom: Add binding for rmtfs memory
of: reserved_mem: Accessor for acquiring reserved_mem
of/platform: Generalize /reserved-memory handling
soc: mediatek: pwrap: fix fatal compiler error
soc: mediatek: pwrap: fix compiler errors
arm64: mediatek: cleanup message for platform selection
soc: Allow test-building of MediaTek drivers
soc: mediatek: place Kconfig for all SoC drivers under menu
soc: mediatek: pwrap: add support for MT7622 SoC
soc: mediatek: pwrap: add common way for setup CS timing extenstion
soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
..
Here is the big set of USB and PHY driver updates for 4.15-rc1.
There is the usual amount of gadget and xhci driver updates, along with
phy and chipidea enhancements. There's also a lot of SPDX tags and
license boilerplate cleanups as well, which provide some churn in the
diffstat.
Other major thing is the typec code that moved out of staging and into
the "real" part of the drivers/usb/ tree, which was nice to see happen.
All of these have been in linux-next with no reported issues for a
while.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWgm/Vw8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+yktXwCdGgpInfOEvOGFd83EPDL7a1ncyc4AoM5wI8yl
1CeLipqVIN3IsMMJptvb
=zvDI
-----END PGP SIGNATURE-----
Merge tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/PHY updates from Greg KH:
"Here is the big set of USB and PHY driver updates for 4.15-rc1.
There is the usual amount of gadget and xhci driver updates, along
with phy and chipidea enhancements. There's also a lot of SPDX tags
and license boilerplate cleanups as well, which provide some churn in
the diffstat.
Other major thing is the typec code that moved out of staging and into
the "real" part of the drivers/usb/ tree, which was nice to see
happen.
All of these have been in linux-next with no reported issues for a
while"
* tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (263 commits)
usb: gadget: f_fs: Fix use-after-free in ffs_free_inst
USB: usbfs: compute urb->actual_length for isochronous
usb: core: message: remember to reset 'ret' to 0 when necessary
USB: typec: Remove remaining redundant license text
USB: typec: add SPDX identifiers to some files
USB: renesas_usbhs: rcar?.h: add SPDX tags
USB: chipidea: ci_hdrc_tegra.c: add SPDX line
USB: host: xhci-debugfs: add SPDX lines
USB: add SPDX identifiers to all remaining Makefiles
usb: host: isp1362-hcd: remove a couple of redundant assignments
USB: adutux: remove redundant variable minor
usb: core: add a new usb_get_ptm_status() helper
usb: core: add a 'type' parameter to usb_get_status()
usb: core: introduce a new usb_get_std_status() helper
usb: core: rename usb_get_status() 'type' argument to 'recip'
usb: core: add Status Type definitions
USB: gadget: Remove redundant license text
USB: gadget: function: Remove redundant license text
USB: gadget: udc: Remove redundant license text
USB: gadget: legacy: Remove redundant license text
...
* pm-domains:
PM / Domains: Fix genpd to deal with drivers returning 1 from ->prepare()
PM / domains: Rework governor code to be more consistent
PM / Domains: Remove gpd_dev_ops.active_wakeup() callback
soc: rockchip: power-domain: Use GENPD_FLAG_ACTIVE_WAKEUP
soc: mediatek: Use GENPD_FLAG_ACTIVE_WAKEUP
ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ACTIVE_WAKEUP
PM / Domains: Allow genpd users to specify default active wakeup behavior
PM / Domains: Add support to select performance-state of domains
PM / Domains: Rename genpd internals from pm_genpd_* to genpd_*
In the case the VPU power domain has been powered on by the bootloader
and no driver are attached to this power domain, the genpd will power it
off after a certain amount of time, but the clocks hasn't been enabled
by the kernel itself and the power-off will trigger some faults.
This patch enable the clocks to have a coherent state for an eventual
poweroff and switches to the pm_domain_always_on_gov governor.
Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to
remove the driver's own flag-based callback.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to
remove the driver's own flag-based callback.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
