58527 Commits

Author SHA1 Message Date
Linus Torvalds
0a51b08fb3 Three fixes for ARM this time around:
- A fix for update_sections_early() to cope with NULL ->mm pointers.
 - A correction to the backtrace code to allow proper backtraces.
 - Reinforcement of pfn_valid() with PFNs >= 4GiB.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAXWljsvTnkBvkraxkAQKsqxAApF0asWjoPHZaA2rS7h0GWVV5290bluy1
 LcT9MyKPNc8K0AyOAhj6m9OnBlzbYOlERklDNrV5uHEprJYjzI5Mp9t5cmwqBOne
 hzD9rrFAdhkGP4A0WXeTIPREDIzxMZUgurTwt/zVdm2V5UcwOdrybj4+F7gQGxFl
 A1URkGFV3ZqOpSl02t9gV5hyqtzry95qRWgL0JQAlSHnbKcDpoiUvoC7ayAKXKRR
 VT9lD/KfuGFSaxi436L8p/TcPlluY+zpTzs+Eambd7Z13kkRB/NlVEBEpvNMnelu
 ORZMNSmQp7mnWMfSlJoYV1wCVSIIyf+BNZ4keTTecppOTawph41keDqF6YCTT+sB
 yqtKbWgP50ElRZhalHcH2K8jPrQASwZBkQJ0xtT0NecrFJA9AMegege1Jt+54RyZ
 X7yfIVt+/T/cYsCJDiPQVgqS/994kz9ifShl8nmQEE9Qg61zh6hFEOkL5/eMt82s
 KxSM+jyoPJYrSuuTi7jIQvWLnz+gJ4bo3FpHH+vkvWUDrImi9J4hzhvvakCxAV0U
 tudCRLSM3J/gM/zIEJFvMxM1ejC08EbJZWToZ/0/MwvejVSDAgVXEB1/27TTnM6q
 6pru83LjQpsKODO3pHQjrwoGByisNeZ0oyaWCL4T0FgwuZ4IXSidgWB4VXpXZnO+
 MuK9qjwvYac=
 =ec12
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:
 "Three fixes for ARM this time around:

   - A fix for update_sections_early() to cope with NULL ->mm pointers.

   - A correction to the backtrace code to allow proper backtraces.

   - Reinforcement of pfn_valid() with PFNs >= 4GiB"

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8901/1: add a criteria for pfn_valid of arm
  ARM: 8897/1: check stmfd instruction using right shift
  ARM: 8874/1: mm: only adjust sections of valid mm structures
2019-08-30 11:58:02 -07:00
Linus Torvalds
e8d6766f3c ARM: SoC fixes
The majority of the fixes this time are for OMAP hardware,
 here is a breakdown of the significant changes:
 
 Various device tree bug fixes:
 - TI am57xx boards need a voltage level fix to avoid damaging SD cards
 - vf610-bk4 fails to detect its flash due to an incorrect description
 - meson-g12a USB phy configuration fails
 - meson-g12b reboot should not power off the SD card
 - Some corrections for apparently harmless differences from the
   documentation.
 
 Regression fixes:
 - ams-delta FIQ interrupts broke in 5.3
 - TI am3/am4 mmc controllers broke in 5.2
 
 The logic_pio driver (used on some Huawei ARM servers) needs a few
 bug fixes for reliability.
 
 A couple of compile-time warning fixes
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJdaUf1AAoJEJpsee/mABjZ+7YQALOXvCCfmYKkOSflNKEVXuiZ
 tL7uj5PT2E136JoAoyEs8pqXLSpFnC/PxZ7GuN3+ZD0lqVz8PbIn5MhJ9KRrRzSF
 lazjW++VQcFt1KR77l2umVi9/KiYD7UXU1HHmWN8+D/PX6EM+Gv1j65Ve8oTRn76
 kfsq58y2YC6Rqv9dkiK91mteQ2bdA9b4O33V5M+Idq3aBwyNr5KKihDsNKPSvKl9
 ibGmfGnukVcrVtU2reaUxNp2G1OsIKswq2bB0VwUlFMipPxML6rv94dJxDblb2Ns
 nq3LeG+1TF9mbAxya2sWaF6fIBpxdEU5llFYRoIknSS+F9qM/nSVsi5WsyJJnCxk
 mEvJLhhtt4gH2TZmPvZ6sPWFSVBHDnr8V3F4c0//aTRCN+tV7BCYbf8f3rv/CRNq
 MLRsw8gHVPZyUUK9M4afeR3PqEx4/hbU9mpCtduAsiudnA1gtDBfQp8ODMop8aJ1
 tCCdbFPoZIKKU/yhUm0OAbykPLVGb9zWGBNwYWuNs6IZFkyksGoFg1AspzKGvrcD
 Knywz9dSmiDxRi3qDjVEd/9Rr/CtvUHmbaGq8RlTHmbB7WYoW84UPSD419V4j9vd
 eIn4ScejKJCZUDACQsQXh7nnbg+QtnMq+3ODzvjsax2FAEKd8xtaZElSs8OA0U6b
 xdqEuHPNY8VWBFXwAfdp
 =mV+7
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "The majority of the fixes this time are for OMAP hardware, here is a
  breakdown of the significant changes:

  Various device tree bug fixes:
   - TI am57xx boards need a voltage level fix to avoid damaging SD
     cards
   - vf610-bk4 fails to detect its flash due to an incorrect description
   - meson-g12a USB phy configuration fails
   - meson-g12b reboot should not power off the SD card
   - Some corrections for apparently harmless differences from the
     documentation.

  Regression fixes:
   - ams-delta FIQ interrupts broke in 5.3
   - TI am3/am4 mmc controllers broke in 5.2

  The logic_pio driver (used on some Huawei ARM servers) got a few bug
  fixes for reliability.

  And a couple of compile-time warning fixes"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (26 commits)
  soc: ixp4xx: Protect IXP4xx SoC drivers by ARCH_IXP4XX || COMPILE_TEST
  soc: ti: pm33xx: Make two symbols static
  soc: ti: pm33xx: Fix static checker warnings
  ARM: OMAP: dma: Mark expected switch fall-throughs
  ARM: dts: Fix incomplete dts data for am3 and am4 mmc
  bus: ti-sysc: Simplify cleanup upon failures in sysc_probe()
  ARM: OMAP1: ams-delta-fiq: Fix missing irq_ack
  ARM: dts: dra74x: Fix iodelay configuration for mmc3
  ARM: dts: am335x: Fix UARTs length
  ARM: OMAP2+: Fix omap4 errata warning on other SoCs
  bus: hisi_lpc: Add .remove method to avoid driver unbind crash
  bus: hisi_lpc: Unregister logical PIO range to avoid potential use-after-free
  lib: logic_pio: Add logic_pio_unregister_range()
  lib: logic_pio: Avoid possible overlap for unregistering regions
  lib: logic_pio: Fix RCU usage
  arm64: dts: amlogic: odroid-n2: keep SD card regulator always on
  arm64: dts: meson-g12a-sei510: enable IR controller
  arm64: dts: meson-g12a: add missing dwc2 phy-names
  ARM: dts: vf610-bk4: Fix qspi node description
  ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7
  ...
2019-08-30 10:53:12 -07:00
Andres Salomon
9e8e8912b0 irqchip/mmp: Mask off interrupts from other cores
On mmp3, there's an extra set of ICU registers (ICU2) that handle
interrupts on the extra cores.  When masking off interrupts on MP1,
these should be masked as well.

We add a new interrupt controller via device tree to identify when we're
looking at an mmp3 machine via compatible field of "marvell,mmp3-intc".

[lkundrak@v3.sk: Changed "mrvl,mmp3-intc" compatible strings to
"marvell,mmp3-intc". Tidied up the subject line a bit.]

Signed-off-by: Andres Salomon <dilinger@queued.net>
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20190822092643.593488-9-lkundrak@v3.sk
--
Changes since v1:
- Moved mmp3-specific mmp_icu2_base initialization from mmp_init_bases() to
  mmp3_of_init() so that we don't have to check for marvell,mmp3-intc
  compatibility twice.
- Drop an superfluous call to irq_set_default_host()

 arch/arm/mach-mmp/regs-icu.h |  3 +++
 drivers/irqchip/irq-mmp.c    | 48 ++++++++++++++++++++++++++++++++++++
 2 files changed, 51 insertions(+)

Signed-off-by: Andres Salomon <dilinger@queued.net>
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20190822092643.593488-9-lkundrak@v3.sk
2019-08-30 15:23:30 +01:00
Christoph Hellwig
419e2f1838 dma-mapping: remove arch_dma_mmap_pgprot
arch_dma_mmap_pgprot is used for two things:

 1) to override the "normal" uncached page attributes for mapping
    memory coherent to devices that can't snoop the CPU caches
 2) to provide the special DMA_ATTR_WRITE_COMBINE semantics on older
    arm systems and some mips platforms

Replace one with the pgprot_dmacoherent macro that is already provided
by arm and much simpler to use, and lift the DMA_ATTR_WRITE_COMBINE
handling to common code with an explicit arch opt-in.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>	# m68k
Acked-by: Paul Burton <paul.burton@mips.com>		# mips
2019-08-29 16:43:22 +02:00
Chris Packham
c8abbd6f9d ARM: 8890/1: l2x0: add marvell,ecc-enable property for aurora
The aurora cache on the Marvell Armada-XP SoC supports ECC protection
for the L2 data arrays. Add a "marvell,ecc-enable" device tree property
which can be used to enable this.

[jlu@pengutronix.de: use aurora specific define AURORA_ACR_ECC_EN]

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-08-29 07:58:01 +01:00
Chris Packham
fd3bbde717 ARM: 8886/1: l2x0: support parity-enable/disable on aurora
The aurora cache on the Marvell Armada-XP SoC supports the same tag
parity features as the other l2x0 cache implementations.

[jlu@pengutronix.de: use aurora specific define AURORA_ACR_PARITY_EN]

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-08-29 07:58:01 +01:00
Jan Luebbe
0770bc9214 ARM: 8885/1: aurora-l2: add defines for parity and ECC registers
These defines will be used by subsequent patches to add support for the
parity check and error correction functionality in the Aurora L2 cache
controller.

Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-08-29 07:58:01 +01:00
Jan Luebbe
1a85cb4b0d ARM: 8887/1: aurora-l2: add prefix to MAX_RANGE_SIZE
The macro name is too generic, so add a AURORA_ prefix.

Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-08-29 07:58:01 +01:00
Jan Luebbe
921a3fe5be ARM: 8902/1: l2c: move cache-aurora-l2.h to asm/hardware
This include file will be used by the AURORA EDAC code.

Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-08-29 07:58:01 +01:00
Nathan Huckleberry
6dc5fd93b2 ARM: 8900/1: UNWINDER_FRAME_POINTER implementation for Clang
The stackframe setup when compiled with clang is different.
Since the stack unwinder expects the gcc stackframe setup it
fails to print backtraces. This patch adds support for the
clang stackframe setup.

Link: https://github.com/ClangBuiltLinux/linux/issues/35

Cc: clang-built-linux@googlegroups.com
Suggested-by: Tri Vo <trong@google.com>
Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-08-29 07:58:01 +01:00
zhaoyang
5b3efa4f14 ARM: 8901/1: add a criteria for pfn_valid of arm
pfn_valid can be wrong when parsing a invalid pfn whose phys address
exceeds BITS_PER_LONG as the MSB will be trimed when shifted.

The issue originally arise from bellowing call stack, which corresponding to
an access of the /proc/kpageflags from userspace with a invalid pfn parameter
and leads to kernel panic.

[46886.723249] c7 [<c031ff98>] (stable_page_flags) from [<c03203f8>]
[46886.723264] c7 [<c0320368>] (kpageflags_read) from [<c0312030>]
[46886.723280] c7 [<c0311fb0>] (proc_reg_read) from [<c02a6e6c>]
[46886.723290] c7 [<c02a6e24>] (__vfs_read) from [<c02a7018>]
[46886.723301] c7 [<c02a6f74>] (vfs_read) from [<c02a778c>]
[46886.723315] c7 [<c02a770c>] (SyS_pread64) from [<c0108620>]
(ret_fast_syscall+0x0/0x28)

Signed-off-by: Zhaoyang Huang <zhaoyang.huang@unisoc.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-08-28 23:30:21 +01:00
Linus Walleij
b786a05f6c ARM: dts: ux500: Update thermal zone
After moving the DB8500 thermal driver to use device tree
we define the default thermal zone for the Ux500 in the
device tree replacing the oldstyle hardcoded trigger
points.

This default thermal zone utilizes the cpufreq driver
(using the generic OF cpufreq back-end) as a passive
cooling device, and defines a critical trip point when
the temperature goes above 85 degrees celsius which will
(hopefully) make the system shut down if the temperature
cannot be controlled.

This default policy can later be augmented for specific
subdevices if these have tighter temperature conditions.

After this patch we get:

/sys/class/thermal/thermal_zone0 (CPU thermal zone)
This reports the rough temperature and trip points
from the thermal zone in the device tree.

By executing two yes > /dev/null & jobs fully utilizing
the two CPU cores we can notice the temperature climbing
in the thermal zone in response and falling when we kill
the jobs.

/syc/class/thermal/cooling_device0 (cpufreq cooling)
this reports all 4 available cpufreq frequencies as
states.

Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-28 15:54:48 +02:00
Uwe Kleine-König
6447632241 ARM: dts: kirkwood: ts219: disable the SoC's RTC
The internal RTC doesn't work, loading the driver only yields

	rtc-mv f1010300.rtc: internal RTC not ticking

. So disable it.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: Martin Michlmayr <tbm@cyrius.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-08-27 17:05:24 +02:00
Tony Lindgren
1170f23583 ARM: dts: Drop legacy custom hwmods property for dra7 gpio
With recent ti-sysc driver changes, we can probe most devices with device
tree data only and drop the custom "ti,hwmods" property.

We have already added the related device tree data earlier, and have
already dropped the platform data. But we have been still dynamically
allocating the platform data based on "ti,hwmods" property. With recent
ti-sysc driver changes this is no longer needed.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 10:59:25 -07:00
Tony Lindgren
54b7026fc2 ARM: dts: Drop legacy custom hwmods property for dra7 mmc
With recent ti-sysc driver changes, we can probe most devices with device
tree data only and drop the custom "ti,hwmods" property.

We have already added the related device tree data earlier, and have
already dropped the platform data. But we have been still dynamically
allocating the platform data based on "ti,hwmods" property. With recent
ti-sysc driver changes this is no longer needed.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 10:59:24 -07:00
Tony Lindgren
44a2cdf0f1 ARM: dts: Drop legacy custom hwmods property for dra7 i2c
With recent ti-sysc driver changes, we can probe most devices with device
tree data only and drop the custom "ti,hwmods" property.

We have already added the related device tree data earlier, and have
already dropped the platform data. But we have been still dynamically
allocating the platform data based on "ti,hwmods" property. With recent
ti-sysc driver changes this is no longer needed.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 10:59:23 -07:00
Tony Lindgren
71feab2866 ARM: dts: Drop legacy custom hwmods property for dra7 uart
With recent ti-sysc driver changes, we can probe most devices with device
tree data only and drop the custom "ti,hwmods" property.

We have already added the related device tree data earlier, and have
already dropped the platform data. But we have been still dynamically
allocating the platform data based on "ti,hwmods" property. With recent
ti-sysc driver changes this is no longer needed.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 10:59:22 -07:00
Tony Lindgren
b8637a6825 ARM: OMAP2+: Drop legacy platform data for dra7 mcasp
With recent ti-sysc driver changes, we can probe most devices with device
tree data only and drop the custom "ti,hwmods" property.

Let's drop the legacy platform data and custom "ti,hwmods" property. We
want to do this in a single patch as the "ti,hwmods" property is used to
allocate platform data dynamically that we no longer want to do.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 10:59:20 -07:00
Tony Lindgren
d1daf63b0b ARM: OMAP2+: Drop legacy platform data for dra7 mcspi
With recent ti-sysc driver changes, we can probe most devices with device
tree data only and drop the custom "ti,hwmods" property.

Let's drop the legacy platform data and custom "ti,hwmods" property. We
want to do this in a single patch as the "ti,hwmods" property is used to
allocate platform data dynamically that we no longer want to do.

Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 10:48:27 -07:00
Markus Elfring
50f57ef83d ARM: OMAP2+: Delete an unnecessary kfree() call in omap_hsmmc_pdata_init()
A null pointer would be passed to a call of the function "kfree" directly
after a call of the function "kzalloc" failed at one place.
Remove this superfluous function call.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:59:48 -07:00
Masahiro Yamada
ccf4975dca ARM: OMAP2+: move platform-specific asm-offset.h to arch/arm/mach-omap2
<generated/ti-pm-asm-offsets.h> is only generated and included by
arch/arm/mach-omap2/, so it does not need to reside in the globally
visible include/generated/.

I renamed it to arch/arm/mach-omap2/pm-asm-offsets.h since the prefix
'ti-' is just redundant in mach-omap2/.

My main motivation of this change is to avoid the race condition for
the parallel build (-j) when CONFIG_IKHEADERS is enabled.

When it is enabled, all the headers under include/ are archived into
kernel/kheaders_data.tar.xz and exposed in the sysfs.

In the parallel build, we have no idea in which order files are built.

 - If ti-pm-asm-offsets.h is built before kheaders_data.tar.xz,
   the header will be included in the archive. Probably nobody will
   use it, but it is harmless except that it will increase the archive
   size needlessly.

 - If kheaders_data.tar.xz is built before ti-pm-asm-offsets.h,
   the header will not be included in the archive. However, in the next
   build, the archive will be re-generated to include the newly-found
   ti-pm-asm-offsets.h. This is not nice from the build system point
   of view.

 - If ti-pm-asm-offsets.h and kheaders_data.tar.xz are built at the
   same time, the corrupted header might be included in the archive,
   which does not look nice either.

This commit fixes the race.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:56:38 -07:00
Adam Ford
6cb0ac0fb9 ARM: dts: ARM: dts: Configure interconnect target module for am3517sgx
Based on Tony Lindgren's work for omap34xx, this patch applies the same
functionality to the AM3517.

The following can be tested via sysfs with the following to ensure the SGX
module gets enabled and disabled properly:

0x00010201

Bus error

Cc: Filip Matijević <filip.matijevic.pz@gmail.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: moaz korena <moaz@korena.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Cc: Philipp Rossak <embed3d@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
[tony@atomide.com: updated subject, dropped rstctrl info]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:47:09 -07:00
Tony Lindgren
3b72fc895a ARM: dts: Configure interconnect target module for omap3 sgx
Looks like omap34xx OCP registers are not readable unlike on omap36xx.
We use SGX revision register instead of the OCP revision register for
34xx and do not configure any SYSCONFIG register unlike for 36xx.

I've tested that the interconnect target module enables and idles
just fine with PM runtime control via sys:

# echo on > $(find /sys -name control | grep \/5000); rwmem 0x5000fe10
# rwmem 0x50000014	# SGX revision register on 36xx
0x50000014 = 0x00010205
# echo auto > $(find /sys -name control | grep \/5000)
# rwmem 0x5000fe00
And when idled, it will produce "Bus error" as expected.

Cc: Adam Ford <aford173@gmail.com>
Cc: Filip Matijević <filip.matijevic.pz@gmail.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: moaz korena <moaz@korena.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Cc: Philipp Rossak <embed3d@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Adam Ford <aford173@gmail.com> #logicpd-torpedo-37xx-devkit
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:47:08 -07:00
Tony Lindgren
394534cb07 ARM: dts: Configure sgx for omap5
I've tested that the interconnect target module enables and idles
just fine when probed with ti-sysc with PM runtime control via sys:

# echo on > $(find /sys -name control | grep \/5600)
# rwmem 0x5600fe00	# OCP Revision
0x5600fe00 = 0x40000000
# echo auto > $(find /sys -name control | grep \/5600)
# rwmem 0x5600fe10
# rwmem 0x56000024

Cc: Adam Ford <aford173@gmail.com>
Cc: Filip Matijević <filip.matijevic.pz@gmail.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: moaz korena <moaz@korena.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Cc: Philipp Rossak <embed3d@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:47:08 -07:00
Tony Lindgren
1b95c5a48f ARM: OMAP2+: Drop legacy platform data for omap4 gpu
I've tested that the interconnect target module enables and idles
just fine when probed with ti-sysc with PM runtime control via sys:

# echo on > $(find /sys -name control | grep \/5601)
# rwmem 0x56000024
0x56000024 = 0x00010200		# SGX540 CORE_REVISION
# echo auto > $(find /sys -name control | grep \/5601)
# rwmem 0x56000024
And when idled, it will produce "Bus error" as expected.

Cc: Adam Ford <aford173@gmail.com>
Cc: Filip Matijević <filip.matijevic.pz@gmail.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: moaz korena <moaz@korena.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Cc: Philipp Rossak <embed3d@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:47:07 -07:00
Tony Lindgren
af055ade34 ARM: OMAP2+: Drop legacy platform data for omap4 d2d
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:41:17 -07:00
Tony Lindgren
d73d7667bb ARM: dts: Configure d2d dts data for omap4
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's configure the related dts data based on what we have
defined in the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:41:16 -07:00
Tony Lindgren
84087b3d63 ARM: OMAP2+: Drop legacy watchdog platform data for omap4
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:41:16 -07:00
Tony Lindgren
e47f534dae ARM: dts: Drop custom hwmod property for omap4 i2c
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the custom ti,hwmods dts property. We have already
dropped the platform data earlier and have been allocating it
dynamically.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:41:16 -07:00
Tony Lindgren
3f95f51b16 ARM: OMAP2+: Drop legacy platform data for cpsw on dra7
We can now probe cpsw with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property for am3 and am4.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:41:15 -07:00
Tony Lindgren
7abe746191 ARM: OMAP2+: Drop legacy platform data for cpsw on am3 and am4
We can now probe cpsw with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property for am3 and am4.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:41:15 -07:00
Tony Lindgren
1faa415c9c ARM: dts: Add fck for cpsw mdio for omap variants
In preparation for dropping legacy platform data and custom ti,hwmods
property, we need to make functional clock available for mdio for the
SoCs so the the mdio driver can find it.

The mdio hardware currently relies on a mdio_hwmod to manage the clock
for omap variants. This is wrong though as there are no separate
sysconfig registers for mdio. All the cpsw related components are just
children of the gmac module.

Note that since mdio is a child of cpsw, just doing pm_runtime_get()
in the mdio driver enables the clock. However, since mdio is also used
by davinci that does not implement runtime PM, let's just add the fck
for now.

Also note that am437x mdio already has a clock, let's update it to
not use the legacy clock naming to unify things further.

Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26 08:41:14 -07:00
Bartosz Golaszewski
9c65754cd3 ARM: davinci: da850-evm: switch to using a fixed regulator for lcdc
Now that the da8xx fbdev driver supports power control with an actual
regulator, switch to using a fixed power supply for da850-evm.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-26 17:53:57 +05:30
Bartosz Golaszewski
7b5ab64379 ARM: davinci: da850-evm: model the backlight GPIO as an actual device
Instead of enabling the panel backlight in a callback defined in board
file using deprecated legacy GPIO API calls, model the line as a GPIO
backlight device.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-26 17:53:56 +05:30
Christophe JAILLET
93eae12c9f ARM: davinci: dm646x: Fix a typo in the comment
The driver is dedicated to DM646x. So update the description in the top
most comment accordingly.

It must have been derived from dm644x.c, but looks DM646 speecific now.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-26 17:51:28 +05:30
Adam Ford
01cc0596ef ARM: dts: da850-evm: Use generic jedec, spi-nor for flash
Logic PD re-spun the L138 and AM1808 SOM's with larger flash.
The m25p80 driver has a generic 'jedec,spi-nor' compatible option
which is requests to use whenever possible since it will read the
JEDEC READ ID opcode.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-26 17:50:30 +05:30
Bartosz Golaszewski
d7d91d2647 ARM: davinci: dm646x: switch to using the clocksource driver
We now have a proper clocksource driver for davinci. Switch the dm646x
platform to using it.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-26 17:49:07 +05:30
Bartosz Golaszewski
135ce780b7 ARM: davinci: dm644x: switch to using the clocksource driver
We now have a proper clocksource driver for davinci. Switch the dm644x
platform to using it.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-26 17:49:07 +05:30
Christoph Hellwig
b898e50f9f arm-nommu: remove the unused pgprot_dmacoherent define
Signed-off-by: Christoph Hellwig <hch@lst.de>
2019-08-26 09:13:18 +02:00
Joel Stanley
87dfe49691 ARM: aspeed: Enable SMP boot
This brings the secondary CPU into Linux. It depends on the setup
performed by ASPEED's u-boot.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25 23:26:52 +09:30
Joel Stanley
9afe2c0a37 ARM: aspeed: Add ASPEED AST2600 architecture
The AST2600 is a Cortex A7 dual core CPU that uses the ARM GIC for
interrupts and ARM timer as a clocksource.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25 23:26:50 +09:30
Joel Stanley
e35d7db994 ARM: aspeed: Select timer in each SoC
In preparation for adding the ast2600 which does not use this timer.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25 23:26:48 +09:30
Joel Stanley
4cdabee7d6 ARM: configs: aspeed_g5: Enable AST2600
CONFIG_STRICT_KERNEL_RWX is enabled by default with ARMv7.

Turn on HIGHMEM as the EVB has 2GB of RAM, and not all is usable without
hihgmem.

The SoC contains Cortex A7 supporting VFP and has two CPUs.

Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25 23:22:54 +09:30
Joel Stanley
e6fe57ebd5 ARM: configs: multi_v7: Add ASPEED G6
This adds the ASPEED AST2600 system and associated ASPEED devices so we
get build coverage.

The changes to the UART configuration to ensure the default console
(UART5) works.

Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25 23:22:52 +09:30
Andrey Smirnov
b04f537caa ARM: dts: vf610-zii-scu4-aib: Configure IRQ line for GPIO expander
Configure IRQ line for SX1503 GPIO expander. We already have
appropriate pinmux entry and all that is missing is "interrupt-parent"
and "interrupts" properties. Add them.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Cory Tusar <cory.tusar@zii.aero>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-25 09:15:17 +02:00
Linus Torvalds
e67095fd2f dma-mapping fixes for 5.3-rc
Two fixes for regressions in this merge window:
 
  - select the Kconfig symbols for the noncoherent dma arch helpers
    on arm if swiotlb is selected, not just for LPAE to not break then
    Xen build, that uses swiotlb indirectly through swiotlb-xen
  - fix the page allocator fallback in dma_alloc_contiguous if the CMA
    allocation fails
 -----BEGIN PGP SIGNATURE-----
 
 iQI/BAABCgApFiEEgdbnc3r/njty3Iq9D55TZVIEUYMFAl1hvn4LHGhjaEBsc3Qu
 ZGUACgkQD55TZVIEUYON4w//Recfoy5T2Q4Gfjp1xVKGbr2sP7J93Vs7VCyQNZmX
 PrtzhmNKs4gxCEXVgHm+GVA+IJwQFqDtSFaPb8q3GQ+qM9NUDF4ScMFpfrLZsFr1
 dorm5kC1xcwrQtWjS1CQS/Gj0VBtWiMQOoUcAESMqgBIUo4ssj3Ny+vnh8hWgAOs
 oVDgOM4wt35bW0Pv/iY44uQzOq7xcYJUUYtPIiP9vMDrhPsxe6D1DgFQ4HZKJWix
 uS3BjZnsZDnLltXM/0CKdRV9wLF+jHYP/wJTztksRlr/A5V3FJ8lJIvgphxG1v3J
 tDfQs4BNuGWBjqdg+Qo6qOPEL9krvVYYVVql93DXwtPK/cJW1Z+0glgC2rbbHmIy
 ew35DFnYm9v0sFLZnbpuoHd6sQ9G59nTZstkqt/Z/hldBvKotwBpeuILAcMC9Nlw
 3iYW6Sz5L7cmkifC8OvopKKJWVoW5rVtMrVQw5niBiZVERtWbY825r/7ju2xYhZC
 iSAaUHT5wNtXsXQOTrFQ5LzTDBtgGyXRXgvNagEHhBf120jBQfOhvOCVT2HHOxdy
 5vx7xeeRS0M2HpxIsmd3XQjIUQEY9x1to4FKiYczGM1kcKeyWWBMFOXfLxe2Rmhg
 h14lbfsAxIEWdFkJAVFhjyjzC6IzxyVGtHCxw1iw0VgGzYATO/K6Oo8T2hG3HagR
 abQ=
 =DXk9
 -----END PGP SIGNATURE-----

Merge tag 'dma-mapping-5.3-5' of git://git.infradead.org/users/hch/dma-mapping

Pull dma-mapping fixes from Christoph Hellwig:
 "Two fixes for regressions in this merge window:

   - select the Kconfig symbols for the noncoherent dma arch helpers on
     arm if swiotlb is selected, not just for LPAE to not break then Xen
     build, that uses swiotlb indirectly through swiotlb-xen

   - fix the page allocator fallback in dma_alloc_contiguous if the CMA
     allocation fails"

* tag 'dma-mapping-5.3-5' of git://git.infradead.org/users/hch/dma-mapping:
  dma-direct: fix zone selection after an unaddressable CMA allocation
  arm: select the dma-noncoherent symbols for all swiotlb builds
2019-08-24 20:00:11 -07:00
Krzysztof Kozlowski
1ea4b76cdf ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards
Add support for i.MX6UL modules from Kontron Electronics GmbH (before
acquisition: Exceet Electronics) and evalkit boards based on it:

1. N6310 SOM: i.MX6 UL System-on-Module, a 25x25 mm solderable module
   (LGA pads and pin castellations) with 256 MB RAM, 1 MB NOR-Flash,
   256 MB NAND and other interfaces,
2. N6310 S: evalkit, w/wo eMMC, without display,
3. N6310 S 43: evalkit with 4.3" display,

The work is based on Exceet/Kontron source code (GPLv2) with numerous
changes:
1. Reorganize files,
2. Rename Exceet -> Kontron,
3. Rename models/compatibles to match newest Kontron product naming,
4. Fix coding style errors and adjust to device tree coding guidelines,
5. Fix DTC warnings,
6. Extend compatibles so eval boards inherit the SoM compatible,
7. Use defines instead of GPIO and interrupt flag values,
8. Use proper vendor compatible for Macronix SPI NOR,
9. Replace deprecated bindings with proper ones,
10. Sort nodes alphabetically,
11. Remove Admatec display nodes (not yet supported).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-24 22:45:47 +02:00
Andrey Smirnov
801592402c ARM: dts: vf610-zii-cfu1: Slow I2C0 down to 100 kHz
Fiber-optic modules attached to the bus are only rated to work at
100 kHz, so decrease the bus frequency to accommodate that.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-24 21:24:45 +02:00
André Draszik
acf993a0f2 ARM: imx: stop adjusting ar8031 phy tx delay
Recent changes to the Atheros at803x driver cause
the approach taken here to stop working because
commit 6d4cd041f0af
("net: phy: at803x: disable delay only for RGMII mode")
and commit cd28d1d6e52e
("net: phy: at803x: Disable phy delay for RGMII mode")
fix the AR8031 driver to configure the phy's (RX/TX)
delays as per the 'phy-mode' in the device tree.

In particular, the phy tx (and rx) delays are updated
again as per the 'phy-mode' *after* the code in here
runs.

Things worked before above commits, because the AR8031
comes out of reset with RX delay enabled, and the
at803x driver didn't touch the delay configuration at
all when "rgmii" mode was selected.

It appears the code in here tries to make device
trees work that incorrectly specify "rgmii", but
that can't work any more and it is imperative since
above commits to have the phy-mode configured
correctly in the device tree.

I suspect there are a few imx7d based boards using
the ar8031 phy and phy-mode = "rgmii", but given I
don't know which ones exactly, I am not in a
position to update the respective device trees.

Hence this patch is simply removing the superfluous
code from the imx7d initialisation. An alternative
could be to add a warning instead, but that would
penalize all boards that have been updated already.

Signed-off-by: André Draszik <git@andred.net>
CC: Russell King <linux@armlinux.org.uk>
CC: Shawn Guo <shawnguo@kernel.org>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Pengutronix Kernel Team <kernel@pengutronix.de>
CC: Fabio Estevam <festevam@gmail.com>
CC: NXP Linux Team <linux-imx@nxp.com>
CC: Kate Stewart <kstewart@linuxfoundation.org>
CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Leonard Crestez <leonard.crestez@nxp.com>
CC: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-24 20:30:22 +02:00
Alexandre Belloni
929c11a55b ARM: dts: pbab01: correct rtc vendor
The rtc8564 is made by Epson but is similar to the NXP pcf8563. Use the
correct vendor name.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-24 20:19:33 +02:00