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Author	SHA1	Message	Date
Al Viro	47e12855a9	powerpc: switch to ->regset_get() Note: compat variant of REGSET_TM_CGPR is almost certainly wrong; it claims to be 4864bit, but just as compat REGSET_GPR it stores 4432bit of (truncated) registers + 4 32bit zeros... followed by 48 more 32bit zeroes. Might be too late to change - it's a userland ABI, after all ;-/ Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>	2020-07-27 14:31:07 -04:00
Christophe Leroy	1b20773b00	powerpc/ptrace: split out ALTIVEC related functions. Move CONFIG_ALTIVEC functions out of ptrace.c, into ptrace-altivec.c Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/35dae891d01c817fca0fd6ab406a3a2c7bf07f60.1582848567.git.christophe.leroy@c-s.fr	2020-04-01 14:30:48 +11:00

Author

SHA1

Message

Date

Al Viro

47e12855a9

powerpc: switch to ->regset_get()

Note: compat variant of REGSET_TM_CGPR is almost certainly wrong;
it claims to be 48*64bit, but just as compat REGSET_GPR it stores
44*32bit of (truncated) registers + 4 32bit zeros... followed by
48 more 32bit zeroes.  Might be too late to change - it's a userland
ABI, after all ;-/

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

2020-07-27 14:31:07 -04:00

Christophe Leroy

1b20773b00

powerpc/ptrace: split out ALTIVEC related functions.

Move CONFIG_ALTIVEC functions out of ptrace.c, into
ptrace-altivec.c

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/35dae891d01c817fca0fd6ab406a3a2c7bf07f60.1582848567.git.christophe.leroy@c-s.fr

2020-04-01 14:30:48 +11:00

2 Commits