Commit Graph

320 Commits

Author SHA1 Message Date
Bas Nieuwenhuizen
301b1d3a91 tools/power/turbostat: Fix turbostat for AMD Zen CPUs
It was reported that on Zen+ system turbostat started exiting,
which was tracked down to the MSR_PKG_ENERGY_STAT read failing because
offset_to_idx wasn't returning a non-negative index.

This patch combined the modification from Bingsong Si and
Bas Nieuwenhuizen and addd the MSR to the index system as alternative for
MSR_PKG_ENERGY_STATUS.

Fixes: 9972d5d84d ("tools/power turbostat: Enable accumulate RAPL display")
Reported-by: youling257 <youling257@gmail.com>
Tested-by: youling257 <youling257@gmail.com>
Tested-by: Kurt Garloff <kurt@garloff.de>
Tested-by: Bingsong Si <owen.si@ucloud.cn>
Tested-by: Artem S. Tashkinov <aros@gmx.com>
Co-developed-by: Bingsong Si <owen.si@ucloud.cn>
Co-developed-by: Terry Bowman <terry.bowman@amd.com>
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2021-05-04 18:31:35 -04:00
Len Brown
ba58ecde5e tools/power turbostat: update version number 2021-05-04 18:23:15 -04:00
Zhang Rui
abdc75ab53 tools/power turbostat: Fix DRAM Energy Unit on SKX
SKX uses fixed DRAM Energy Unit, just like HSX and BDX.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2021-05-04 18:23:14 -04:00
Len Brown
b2b94be787 Revert "tools/power turbostat: adjust for temperature offset"
This reverts commit 6ff7cb371c.

Apparently the TCC offset should not be used to adjust what temperature
we show the user after all.

(on most systems, TCC offset is 0, FWIW)

Fixes: 6ff7cb371c

Signed-off-by: Len Brown <len.brown@intel.com>
2021-05-04 18:23:14 -04:00
Chen Yu
6c5c656006 tools/power turbostat: Support Ice Lake D
Ice Lake D is low-end server version of Ice Lake X, reuse
the code accordingly.

Tested-by: Wendy Wang <wendy.wang@intel.com>
Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2021-05-04 18:23:14 -04:00
Chen Yu
5683460b85 tools/power turbostat: Support Alder Lake Mobile
Share the code between Alder Lake Mobile and Alder Lake Desktop.

Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2021-05-04 18:23:14 -04:00
Len Brown
ed0757b83a tools/power turbostat: print microcode patch level
(also available via "grep microcode /proc/cpuinfo")

Signed-off-by: Len Brown <len.brown@intel.com>
2021-05-04 18:23:14 -04:00
Len Brown
2af4f9b859 tools/power turbostat: add built-in-counter for IPC -- Instructions per Cycle
Use linux-perf to access the hardware instructions-retired counter.
This is necessary because the counter is not enabled by default,
and also the counter is prone to roll-over -- both of which
perf manages.

It is not necessary to use perf for the cycle counter,
because turbostat already needs to collect delta-aperf
to calcuate frequency.

Signed-off-by: Len Brown <len.brown@intel.com>
2021-05-04 18:23:14 -04:00
Borislav Petkov
7f1b11ba35 tools/power/turbostat: Fallback to an MSR read for EPB
Commit

  6d6501d912 ("tools/power/turbostat: Read energy_perf_bias from sysfs")

converted turbostat to read the energy_perf_bias value from sysfs.
However, older kernels which do not have that file yet, would fail. For
those, fall back to the MSR reading.

Fixes: 6d6501d912 ("tools/power/turbostat: Read energy_perf_bias from sysfs")
Reported-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Tested-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Link: https://lkml.kernel.org/r/20210127132444.981120-1-dedekind1@gmail.com
2021-02-03 11:58:19 +01:00
Linus Torvalds
9c70f04678 The main part of this branch is the ongoing fight against windmills in
an attempt to have userspace tools not poke at naked MSRs. This round
 deals with MSR_IA32_ENERGY_PERF_BIAS and removes direct poking into it
 by our in-tree tools in favor of the proper "energy_perf_bias" sysfs
 interface which we already have.
 
 In addition, the msr.ko write filtering's error message points to a new
 summary page which contains the info we collected from helpful reporters
 about which userspace tools write MSRs:
 
   https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/about
 
 along with the current status of their conversion.
 
 Rest is the usual small fixes and improvements.
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Merge tag 'x86_misc_for_v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull misc x86 updates from Borislav Petkov:
 "The main part of this branch is the ongoing fight against windmills in
  an attempt to have userspace tools not poke at naked MSRs.

  This round deals with MSR_IA32_ENERGY_PERF_BIAS and removes direct
  poking into it by our in-tree tools in favor of the proper
  "energy_perf_bias" sysfs interface which we already have.

  In addition, the msr.ko write filtering's error message points to a
  new summary page which contains the info we collected from helpful
  reporters about which userspace tools write MSRs:

      https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/about

  along with the current status of their conversion.

  The rest is the usual small fixes and improvements"

* tag 'x86_misc_for_v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/msr: Add a pointer to an URL which contains further details
  x86/pci: Fix the function type for check_reserved_t
  selftests/x86: Add missing .note.GNU-stack sections
  selftests/x86/fsgsbase: Fix GS == 1, 2, and 3 tests
  x86/msr: Downgrade unrecognized MSR message
  x86/msr: Do not allow writes to MSR_IA32_ENERGY_PERF_BIAS
  tools/power/x86_energy_perf_policy: Read energy_perf_bias from sysfs
  tools/power/turbostat: Read energy_perf_bias from sysfs
  tools/power/cpupower: Read energy_perf_bias from sysfs
  MAINTAINERS: Cleanup SGI-related entries
2020-12-14 13:29:34 -08:00
Borislav Petkov
6d6501d912 tools/power/turbostat: Read energy_perf_bias from sysfs
... instead of poking at the MSR directly.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Len Brown <lenb@kernel.org>
Cc: linux-pm@vger.kernel.org
Link: https://lkml.kernel.org/r/20201029190259.3476-3-bp@alien8.de
2020-11-16 17:42:46 +01:00
Len Brown
3e9fa9983b tools/power turbostat: update version number
goodbye summer...

Signed-off-by: Len Brown <len.brown@intel.com>
2020-11-10 11:41:36 -05:00
Len Brown
3d7772ea56 tools/power turbostat: harden against cpu hotplug
turbostat tends to get confused when CPUs are added and removed
while it is running.

There are races, such as checking the current cpu, and then
reading a sysfs file that depends on that cpu number.

Close the two issues that seem to come up the most.
First, there is an infinite reset loop detector --
change that to allow more resets before giving up.
Secondly, one of those file reads didn't really need
to exit the program on failure...

Signed-off-by: Len Brown <len.brown@intel.com>
2020-10-23 16:54:05 -04:00
Len Brown
6ff7cb371c tools/power turbostat: adjust for temperature offset
cpu1: MSR_IA32_TEMPERATURE_TARGET: 0x05640000 (95 C) (100 default - 5 offset)

Account for the new "offset" field in MSR_TEMPERATURE_TARGET.
While this field is usually zero, ignoring it results in over-stating
the current temperature, both per-core and per-package.

Signed-off-by: Len Brown <len.brown@intel.com>
2020-10-23 16:50:16 -04:00
Alexander Monakov
4be61e6b76 tools/power turbostat: Build with _FILE_OFFSET_BITS=64
For compatibility reasons, Glibc off_t is a 32-bit type on 32-bit x86
unless _FILE_OFFSET_BITS=64 is defined. Add this define, as otherwise
reading MSRs with index 0x80000000 and above attempts a pread with a
negative offset, which fails.

Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Tested-by: Liwei Song <liwei.song@windriver.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:59:10 -04:00
Kim Phillips
33eb82251a tools/power turbostat: Support AMD Family 19h
Family 19h processors have the same RAPL (Running average power limit)
hardware register interface as Family 17h processors.

Change the family checks to succeed for Family 17h and above to enable
core and package energy measurement on Family 19h machines.

Also update the TDP to the largest found at the bottom of the page at
amd.com->processors->servers->epyc->2nd-gen-epyc, i.e., the EPYC 7H12.

Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Len Brown <lenb@kernel.org>
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:59:10 -04:00
Antti Laakso
20de0dab23 tools/power turbostat: Remove empty columns for Jacobsville
Jacobsville doesn't have Package C2 and C6. Also
Core and DRAM RAPL are not available. Adjust output
accordingly.

Signed-off-by: Antti Laakso <antti.laakso@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:59:10 -04:00
Rafael Antognolli
b4b9156953 tools/power turbostat: Add a new GFXAMHz column that exposes gt_act_freq_mhz.
The column already present called GFXMHz reads from gt_cur_freq_mhz,
which represents the GT frequency that was requested, but power
management might not be able to do that. So the new column will display
what the actual frequency GT is running at.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:59:10 -04:00
Len Brown
c315a09b1b tools/power turbostat: Skip pc8, pc9, pc10 columns, if they are disabled
Like we skip PC3 and PC6 columns when the package C-state limit
disables them, skip PC8/PC9/CP10 under analogous conditions.

Reported-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:58:38 -04:00
Len Brown
e7af1ed3fa tools/power turbostat: Support additional CPU model numbers
Initial support for models recently added to intel-family.h.

Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:58:37 -04:00
David Arcari
fecb3bc839 tools/power turbostat: Fix output formatting for ACPI CST enumeration
turbostat formatting is broken with ACPI CST for enumeration.  The
problem is that the CX_ACPI% is eight characters long which does not
work with tab formatting.  One simple solution is to remove the underbar
from the state name such that C1_ACPI will be displayed as C1ACPI.

Signed-off-by: David Arcari <darcari@redhat.com>
Cc: Len Brown <lenb@kernel.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:58:37 -04:00
Alexander A. Klimov
b88cad57d4 tools/power turbostat: Replace HTTP links with HTTPS ones: TURBOSTAT UTILITY
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:58:37 -04:00
Prarit Bhargava
8201a02857 tools/power turbostat: Use sched_getcpu() instead of hardcoded cpu 0
Disabling cpu 0 results in an error

turbostat: /sys/devices/system/cpu/cpu0/topology/thread_siblings: open failed: No such file or directory

Use sched_getcpu() instead of a hardcoded cpu 0 to get the max cpu number.

Signed-off-by: Prarit Bhargava <prarit@redhat.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:57:47 -04:00
Chen Yu
9972d5d84d tools/power turbostat: Enable accumulate RAPL display
Enable the accumulated RAPL display by default.

Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:57:47 -04:00
Chen Yu
87e15da957 tools/power turbostat: Introduce functions to accumulate RAPL consumption
Since the RAPL Joule Counter is 32 bit, turbostat would
only print a *star* instead of printing the actual energy
consumed to indicate the overflow due to long duration.
This does not meet the requirement from servers as the
sampling time of turbostat is usually very long on servers.

So maintain a set of MSR buffer, and update them
periodically before the 32bit MSR register is wrapped round,
so as to avoid the overflow.

The idea is similar to the implementation of ktime_get():

Periodical MSR timer:
total_rapl_sum += (current_rapl_msr - last_rapl_msr);

Using get_msr_sum() to get the accumulated RAPL:
return (current_rapl_msr - last_rapl_msr) + total_rapl_sum;

The accumulated RAPL mechanism will be turned on in next patch.

Originally-by: Aaron Lu <aaron.lwe@gmail.com>
Reviewed-by: Doug Smythies <dsmythies@telus.net>
Tested-by: Doug Smythies <dsmythies@telus.net>
Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:57:47 -04:00
Chen Yu
7c2ccc507b tools/power turbostat: Make the energy variable to be 64 bit
Change the energy variable from 32bit to 64bit,
so that it can record long time duration.
After this conversion, adjust the DELTA_WRAP32() accordingly.

Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:57:07 -04:00
Doug Smythies
9aefc2cda6 tools/power turbostat: Always print idle in the system configuration header
If the --quiet option is not used, turbostat prints a useful system
configuration header during startup.

But inclusion of idle system configuration information in this header
is currently a function of inclusion in the columns chosen to be displayed.

Always list this idle system configuration.

Signed-off-by: Doug Smythies <dsmythies@telus.net>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:55:17 -04:00
Len Brown
d76bb7a09b tools/power turbostat: Print /dev/cpu_dma_latency
Users are puzzled when they use tuned performance and all their
C-states vanish.  Dump /dev/cpu_dma_latency and state
whether the value is default, or constraining,
to explain this situation.

Signed-off-by: Len Brown <len.brown@intel.com>
2020-09-03 13:48:07 -04:00
Masahiro Yamada
d198b34f38 .gitignore: add SPDX License Identifier
Add SPDX License Identifier to all .gitignore files.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-25 11:50:48 +01:00
Len Brown
b95fffb9b4 tools/power turbostat: update version
A stitch in time saves nine.

Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-21 00:48:02 -04:00
Len Brown
abdcbdb265 tools/power turbostat: Print cpuidle information
Print cpuidle driver and governor.

Originally-by: Antti Laakso <antti.laakso@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-21 00:47:47 -04:00
Len Brown
fcaa681c03 tools/power turbostat: Fix 32-bit capabilities warning
warning: `turbostat' uses 32-bit capabilities (legacy support in use)

Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20 00:32:28 -04:00
Len Brown
1f81c5efc0 tools/power turbostat: Fix missing SYS_LPI counter on some Chromebooks
Some Chromebook BIOS' do not export an ACPI LPIT, which is how
Linux finds the residency counter for CPU and SYSTEM low power states,
that is exports in /sys/devices/system/cpu/cpuidle/*residency_us

When these sysfs attributes are missing, check the debugfs attrubte
from the pmc_core driver, which accesses the same counter value.

Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20 00:32:28 -04:00
Chen Yu
f670840070 tools/power turbostat: Support Elkhart Lake
From a turbostat point of view the Tremont-based Elkhart Lake
is very similar to Goldmont, reuse the code of Goldmont.

Elkhart Lake does not support 'group turbo limit counter'
nor C3, adjust the code accordingly.

Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20 00:32:27 -04:00
Chen Yu
d7814c3098 tools/power turbostat: Support Jasper Lake
Jasper Lake, like Elkhart Lake, uses a Tremont CPU.
So reuse the code.

Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20 00:32:27 -04:00
Chen Yu
23274faf96 tools/power turbostat: Support Ice Lake server
From a turbostat point of view, Ice Lake server looks like Sky Lake server.

Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20 00:32:27 -04:00
Chen Yu
4bf7132a0a tools/power turbostat: Support Tiger Lake
From a turbostat point of view, Tiger Lake looks like Ice Lake.

Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20 00:32:27 -04:00
Len Brown
d8d005ba6a tools/power turbostat: Fix gcc build warnings
Warning: ‘__builtin_strncpy’ specified bound 20 equals destination size
	[-Wstringop-truncation]

reduce param to strncpy, to guarantee that a null byte is always copied
into destination buffer.

Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20 00:32:27 -04:00
Chen Yu
081c54323b tools/power turbostat: Support Cometlake
From a turbostat point of view, Cometlake is like Kabylake.

Suggested-by: Rui Zhang <rui.zhang@intel.com>
Signed-off-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20 00:32:27 -04:00
Sean Christopherson
f6505c88bf tools/x86: Sync msr-index.h from kernel sources
Sync msr-index.h to pull in recent renames of the IA32_FEATURE_CONTROL
MSR definitions.  Update KVM's VMX selftest and turbostat accordingly.
Keep the full name in turbostat's output to avoid breaking someone's
workflow, e.g. if a script is looking for the full name.

While using the renamed defines is by no means necessary, do the sync
now to avoid leaving a landmine that will get stepped on the next time
msr-index.h needs to be refreshed for some other reason.

No functional change intended.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20191221044513.21680-4-sean.j.christopherson@intel.com
2020-01-13 17:42:57 +01:00
Ingo Molnar
77e5517cb5 Merge branch 'linus' into x86/cpu, to resolve conflicts
Conflicts:
	tools/power/x86/turbostat/turbostat.c

Recent turbostat changes conflicted with a pending rename of x86 model names in tip:x86/cpu,
sort it out.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-09-02 09:10:07 +02:00
Len Brown
9eb4b5180d tools/power turbostat: update version number
Today is 19.08.31, at least in some parts of the world.

Signed-off-by: Len Brown <len.brown@intel.com>
2019-08-31 14:48:39 -04:00
Pu Wen
c1c10cc778 tools/power turbostat: Add support for Hygon Fam 18h (Dhyana) RAPL
Commit 9392bd98bb ("tools/power turbostat: Add support for AMD
Fam 17h (Zen) RAPL") and the commit 3316f99a9f ("tools/power
turbostat: Also read package power on AMD F17h (Zen)") add AMD Fam 17h
RAPL support.

Hygon Family 18h(Dhyana) support RAPL in bit 14 of CPUID 0x80000007 EDX,
and has MSRs RAPL_PWR_UNIT/CORE_ENERGY_STAT/PKG_ENERGY_STAT. So add Hygon
Dhyana Family 18h support for RAPL.

Already tested on Hygon multi-node systems and it shows correct per-core
energy usage and the total package power.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Reviewed-by: Calvin Walton <calvin.walton@kepstin.ca>
Signed-off-by: Len Brown <len.brown@intel.com>
2019-08-31 14:48:39 -04:00
Pu Wen
9cfa8e042f tools/power turbostat: Fix caller parameter of get_tdp_amd()
Commit 9392bd98bb ("tools/power turbostat: Add support for AMD
Fam 17h (Zen) RAPL") add a function get_tdp_amd(), the parameter is CPU
family. But the rapl_probe_amd() function use wrong model parameter.
Fix the wrong caller parameter of get_tdp_amd() to use family.

Cc: <stable@vger.kernel.org> # v5.1+
Signed-off-by: Pu Wen <puwen@hygon.cn>
Reviewed-by: Calvin Walton <calvin.walton@kepstin.ca>
Signed-off-by: Len Brown <len.brown@intel.com>
2019-08-31 14:48:39 -04:00
Srinivas Pandruvada
1e9042b9c8 tools/power turbostat: Fix CPU%C1 display value
In some case C1% will be wrong value, when platform doesn't have MSR for
C1 residency.

For example:
Core    CPU     CPU%c1
-       -       100.00
0       0       100.00
0       2       100.00
1       1       100.00
1       3       100.00

But adding Busy% will fix this
Core    CPU     Busy%   CPU%c1
-       -       99.77   0.23
0       0       99.77   0.23
0       2       99.77   0.23
1       1       99.77   0.23
1       3       99.77   0.23

This issue can be reproduced on most of the recent systems including
Broadwell, Skylake and later.

This is because if we don't select Busy% or Avg_MHz or Bzy_MHz then
mperf value will not be read from MSR, so it will be 0. But this
is required for C1% calculation when MSR for C1 residency is not present.
Same is true for C3, C6 and C7 column selection.

So add another define DO_BIC_READ(), which doesn't depend on user
column selection and use for mperf, C3, C6 and C7 related counters.
So when there is no platform support for C1 residency counters,
we still read these counters, if the CPU has support and user selected
display of CPU%c1.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2019-08-31 14:48:39 -04:00
Artem Bityutskiy
6ee9fc63d2 tools/power turbostat: do not enforce 1ms
Turbostat works by taking a snapshot of counters, sleeping, taking another
snapshot, calculating deltas, and printing out the table.

The sleep time is controlled via -i option or by user sending a signal or a
character to stdin. In the latter case, turbostat always adds 1 ms
sleep before it reads the counters, in order to avoid larger imprecisions
in the results in prints.

While the 1 ms delay may be a good idea for a "dumb" user, it is a
problem for an "aware" user. I do thousands and thousands of measurements
over a short period of time (like 2ms), and turbostat unconditionally adds
a 1ms to my interval, so I cannot get what I really need.

This patch removes the unconditional 1ms sleep. This is an expert user
tool, after all, and non-experts will unlikely ever use it in the non-fixed
interval mode anyway, so I think it is OK to remove the 1ms delay.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2019-08-31 14:48:39 -04:00
Artem Bityutskiy
c026c23629 tools/power turbostat: read from pipes too
Commit '47936f944e78 tools/power turbostat: fix printing on input' make
a valid fix, but it completely disabled piped stdin support, which is
a valuable use-case. Indeed, if stdin is a pipe, turbostat won't read
anything from it, so it becomes impossible to get turbostat output at
user-defined moments, instead of the regular intervals.

There is no reason why this should works for terminals, but not for
pipes. This patch improves the situation. Instead of ignoring pipes, we
read data from them but gracefully handle the EOF case.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2019-08-31 14:48:39 -04:00
Rajneesh Bhardwaj
d93ea567fc tools/power turbostat: Add Ice Lake NNPI support
This enables turbostat utility on Ice Lake NNPI SoC.

Link: https://lkml.org/lkml/2019/6/5/1034
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2019-08-31 14:48:39 -04:00
Len Brown
570992fc57 tools/power turbostat: rename has_hsw_msrs()
Perhaps if this more descriptive name had been used,
then we wouldn't have had the HSW ULT vs HSW CORE bug,
fixed by the previous commit.

Signed-off-by: Len Brown <len.brown@intel.com>
2019-08-31 14:48:39 -04:00
Len Brown
cd188af528 tools/power turbostat: Fix Haswell Core systems
turbostat: cpu0: msr offset 0x630 read failed: Input/output error

because Haswell Core does not have C8-C10.

Output C8-C10 only on Haswell ULT.

Fixes: f5a4c76ad7 ("tools/power turbostat: consolidate duplicate model numbers")

Reported-by: Prarit Bhargava <prarit@redhat.com>
Suggested-by: Kosuke Tatsukawa <tatsu@ab.jp.nec.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2019-08-31 14:48:39 -04:00