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Author	SHA1	Message	Date
Murali Karicheri	c1bfa985de	ARM: dts: keystone: fix dt bindings to use post div register for mainpll All of the keystone devices have a separate register to hold post divider value for main pll clock. Currently the fixed-postdiv value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to use a value of 2 for this. Now that we have fixed this in the pll clock driver change the dt bindings for the same. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>	2015-07-31 22:30:11 +02:00
Grygorii Strashko	2b7ef094a4	ARM: dts: keystone: fix netcp's clocks definitions The clocks tree for Keystone 2 NTCP devices should be defined as following: [refclk] - board dependent \|- <papllclk> - PLL clock \|- <paclk13> - fixed factor clock div=3 mul=1 \|- <clkpa> - gated clock \|- <clkcpgmac> - gated clock \|- <clksa> - gated clock Hence, update Keystone 2 DT to follow HW specification. Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>	2014-07-08 12:23:42 -04:00
Murali Karicheri	fc1c72ebb4	ARM: dts: keystone: add support for K2 Lamarr SoC and EVM Keystone2 Lamarr (K2L) is a dual Cortex A15 core based SoC with 4 DSPs. It has standard peripherals such as i2c, spi, uart, timer, pcie etc., similar to k2hk, but different set of wireless hardware. This patch add support for k2 Lamarr SoC and EVM. This re-uses the common keystone.dtsi to include common bindings across the various k2 devices. Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>	2014-02-26 10:06:56 -05:00

Author

SHA1

Message

Date

Murali Karicheri

c1bfa985de

ARM: dts: keystone: fix dt bindings to use post div register for mainpll

All of the keystone devices have a separate register to hold post
divider value for main pll clock. Currently the fixed-postdiv
value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to
use a value of 2 for this. Now that we have fixed this in the pll
clock driver change the dt bindings for the same.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

2015-07-31 22:30:11 +02:00

Grygorii Strashko

2b7ef094a4

ARM: dts: keystone: fix netcp's clocks definitions

The clocks tree for Keystone 2 NTCP devices should be
defined as following:
[refclk] - board dependent
 |- <papllclk> - PLL clock
    |- <paclk13> - fixed factor clock div=3 mul=1
       |- <clkpa> - gated clock
       |- <clkcpgmac> - gated clock
       |- <clksa> - gated clock

Hence, update Keystone 2 DT to follow HW specification.

Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

2014-07-08 12:23:42 -04:00

Murali Karicheri

fc1c72ebb4

ARM: dts: keystone: add support for K2 Lamarr SoC and EVM

Keystone2 Lamarr (K2L) is a dual Cortex A15 core based SoC with
4 DSPs. It has standard peripherals such as i2c, spi, uart, timer,
pcie etc., similar to k2hk, but different set of wireless hardware.
This patch add support for k2 Lamarr SoC and EVM. This re-uses the
common keystone.dtsi to include common bindings across the various
k2 devices.

Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

2014-02-26 10:06:56 -05:00

3 Commits