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3 Commits

Author SHA1 Message Date
Hai Li
1bf4d7c565 drm/msm/dsi: Make each PHY type compilation independent 
On a certain platform, only one type of DSI PHY is used.
This change allows the user to only compile the PHY type
which is being used.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2015-08-15 18:27:29 -04:00
Hai Li
328e1a633c drm/msm/dsi: Save/Restore PLL status across PHY reset 
Reset DSI PHY silently changes its PLL registers to reset status,
which will make cached status in clock driver invalid and result
in wrong output rate of link clocks. The current restore mechanism
in DSI PLL does not cover all the cases. This change is to recover
PLL status after PHY reset to match HW status with cached status
in clock driver.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2015-08-15 18:27:18 -04:00
Hai Li
825637b9c0 drm/msm/dsi: Add DSI PLL clock driver support 
DSI byte clock and pixel clocks are sourced from DSI PLL.
This change adds the DSI PLL source clock driver under
common clock framework.

This change handles DSI 28nm PLL only.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2015-06-11 13:11:04 -04:00