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The Armada 370/XP SoCs have a Core Divider clock providing
several clocks. For now, only the NAND clock is supported.
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver
provides clocksource and clock event device using one timer instance
each.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This enables setting a default trigger on an LP55xx channel,
either from platform data or device tree. This mechanism is
identical to the mechanism for GPIO LEDs and references the
common LEDs device tree bindings.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Milo Kim <milo.kim@ti.com>
Acked-by: Milo Kim <milo.kim@ti.com>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
This is based on the work of Teddy Reed <teddy@prosauce.org> published
on GitHub:
https://github.com/theopolis/tpm-i2c-atmel.git
34894b988b67e0ae55088d6388e77b0dbf10c07d
That driver was never merged, I have taken it as a starting port,
forward ported, tested and revised the driver:
- Make it broadly textually similar to the Infineon and Nuvoton I2C
driver
- Place everything in a format suitable for mainline inclusion
- Use high level I2C functions i2c_master_send and
i2c_master_recv for data xfer
- Use the timeout system from the core code, by faking out a status
register
- Only I2C transfer the number of bytes in the reply, not a fixed
message size.
- checkpatch cleanups
- Testing on ARM Kirkwood, with this device tree, using a
AT97SC3204T-X1A180
tpm@29 {
compatible = "atmel,at97sc3204t";
reg = <0x29>;
};
Signed-off-by: Teddy Reed <teddy@prosauce.org>
[jgg: revised and tested]
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
[phuewe: minor whitespace changes]
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
This chip is/was also branded as a Winbond WPCT301.
Originally written by Dan Morav <dmorav@nuvoton.com> and posted to LKML:
https://lkml.org/lkml/2011/9/7/206
The original posting was not merged, I have taken it as a
starting point, forward ported, tested and revised the driver:
- Rework interrupt handling to work properly with level triggered
interrupts. The old version just locked up.
- Synchronize various items with Peter Huewe's Infineon driver:
* Add durations/timeouts sysfs calls
* Remove I2C device auto-detection
* Don't fiddle with chip->release
* Call tpm_dev_vendor_release in the probe error path
* Use MODULE_DEVICE_TABLE for the I2C ids
* Provide OF compatible strings for DT support
* Use SIMPLE_DEV_PM_OPS
* Use module_i2c_driver
- checkpatch cleanups
- Testing on ARM Kirkwood with GPIO interrupts, with this device tree:
tpm@57 {
compatible = "nuvoton,npct501";
reg = <0x57>;
interrupt-parent = <&gpio1>;
interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
};
Signed-off-by: Dan Morav <dmorav@nuvoton.com>
[jgg: revised and tested]
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
[phuewe: minor whitespace changes, fixed module name in kconfig]
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Change the model omap2-mcasp-audio in compatible property to
am33xx-mcasp-audio as omap2 does not have mcasp.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Extract DMA channels directly from DT as they can not be found from
platform resources anymore. This is a work-around until davinci audio
driver is updated to use dmaengine.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds a separate register location for data port registers to
mcasp DT bindings. On am33xx SoCs the McASP registers are mapped
trough L4 interconnect, but data port registers are also mapped trough
L3 bus to a different memory location.
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The DLL(Delay Line) is newly added to assist in sampling read data.
The DLL provides the ability to programmatically select a quantized
delay (in fractions of the clock period) regardless of on-chip variations
such as process, voltage and temperature (PVT).
This patch adds a user interface to set slave delay line via device tree.
It's usually used in high speed mode like mmc DDR mode when the signal
quality is not good caused by board design, e.g. the signal path is too
long. User can manually set delay line to find a suitable data sampling
window for card to work properly.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
The i.MX6 has two general-purpose LVDS clocks that can be driven
from a variety of sources. This patch adds a mux and a gate for
both of these clocks.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
There's a pll4_audio_div clock, an extra divider for pll4, missing
in current clock tree, thus add it.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some or most of which
should either not be reset or idled or both at init.
(In some cases there are erratas which prevent an IP
from being reset)
Have a way to pass this information from DT.
Update the am33xx/omap4 and omap5 dtsi files with the
new bindings for modules which either should not be
idled. reset or both. A later patch would cleanup the
same information that exists today as part of the hwmod
data files.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
This patch adds support for device tree for the CS42L73 CODEC
Signed-off-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The value to set ASAP mode for FIFO configuration is 2 instead of 1.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
AT91 ADC hardware integrate touch screen support. So this patch add touch
screen support for at91 adc iio driver.
To enable touch screen support in adc, you need to add the dt parameters:
1. which type of touch are used? (4 or 5 wires), sample period time.
2. correct pressure detect threshold value.
In the meantime, since touch screen will use a interal period trigger of adc,
so it is conflict to other hardware triggers. Driver will disable the hardware
trigger support if touch screen is enabled.
This driver has been tested in AT91SAM9X5-EK and SAMA5D3x-EK.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
CC: devicetree@vger.kernel.org
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This patch adds device tree binding documentation for CM36651 proximity/light sensor.
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Use the generic PHY API to control the DP PHY.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add a PHY provider driver for the Samsung Exynos SoC Display Port PHY.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Besides the pull registers sitting in a separate place, the rk3188 also
has the peculiarity that the pull registers of the first bank are split
and the first half is sitting in the register space of the pmu.
Therefore this adds a special bank-type for the first bank, to handle
the two register sources.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pinmux driver of the Abilis Systems TB10x platform based on ARC700 CPUs.
Used to control the pinmux and is a prerequisite for the GPIO driver.
Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds the infrastructure required to register non-linear gpio
ranges through gpiolib and the standard GPIO device tree bindings.
Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This augments the core machine code for the Integrator platforms
to get their references to the core module device nodes by
using compatible strings instead of predefined node names
and rename the CP syscon node to be simply "syscon".
Reported-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the core module (CM) control base into the device
tree. It is a simple memory range of 0x200 bytes. Move the
cm header down into the machine directory and unexport the
cm_control() symbol as no modules are using it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The OF/DT boot path needs to get the LM (Logical Module)
IRQs from the device tree for coherency. This augments the
DT syscon node to contain these IRQs and alter the DT LM
code to get them from there.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Backlights require a power supply to work properly. This commit adds a
regulator to power up and power down the backlight.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Make use of the new enable_gpio field and allow it to be set from DT as
well. Now that all legacy users of platform data have been converted to
initialize this field to an invalid value, it is safe to use the field
from the driver.
Signed-off-by: Thierry Reding <treding@nvidia.com>
This reverts commit 9d8eab7af79cb4ce2de5de39f82c455b1f796963. There is
still no consensus on the bindings for the reserved memory and various
drawbacks of the proposed solution has been shown, so the best now is to
revert it completely and start again from scratch later.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Add the minimal DTS support for DRA7xx based SoC core.
Add the initial support for N900 and gta04 phones.
Enable USB3 on OMAP5 evm board.
Add support for cryto accelerators
Add new IGEP AQUILA board
Add AM33XX EDMA support
Update HSUSB node to use the reset-gpios fmwk
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Merge tag 'omap-for-v3.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
From Tony Lindgren:
omap device tree related changes via Benoit Cousson <bcousson@baylibre.com>:
Add the minimal DTS support for DRA7xx based SoC core.
Add the initial support for N900 and gta04 phones.
Enable USB3 on OMAP5 evm board.
Add support for cryto accelerators
Add new IGEP AQUILA board
Add AM33XX EDMA support
Update HSUSB node to use the reset-gpios fmwk
* tag 'omap-for-v3.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (58 commits)
ARM: dts: dra7-evm: Add mmc2 node for eMMC support
ARM: dts: dra7-evm: Add mmc1 node for micro-sd support
ARM: dts: omap5-uevm: mark TWL6037 as system-power-controller
ARM: dts: omap3-igep0020: use standard constant for IRQ flags
ARM: dts: omap3-igep0020: Add HS USB Host support
ARM: dts: omap3-igep: Add USB OTG support
ARM: dts: AM33XX beagle black: add pinmux and hdmi node to enable display
ARM: dts: AM33XX: Add LCDC info into am335x-evm
ARM: dts: AM437X: Add DES node
ARM: dts: AM437X: Add AES node
ARM: dts: AM33XX: Fix AES interrupt number
ARM: dts: AM33XX: Add AES data and documentation
ARM: dts: AM33XX: Add SHAM data and documentation
ARM: dts: OMAP4: Add DES3DES node
ARM: dts: OMAP4: Add AES node
ARM: dts: am335x-evm[sdk]: switch mmc1 to 4-bit mode
ARM: dts: am335x-bone-common: correct mux mode for cmd line
ARM: dts: AM33XX: Add support for IGEP AQUILA EXPANSION board.
ARM: dts: AM33XX: Add support for IGEP COM AQUILA
ARM: dts: am335x-boneblack: move fixed regulator to board level
...
Signed-off-by: Kevin Hilman <khilman@linaro.org>
- Always build in board-generic, and add pdata quirks and auxdata
support for it so we have all the pdata related quirks
in the same place.
- Merge of the drivers/pinctrl changes that are needed for PM
to continue working on omap3 and also needed for other omaps
eventually. The three pinctrl related patches have been acked
by Linus Walleij and are pulled into both the pinctrl tree
and this branch.
- Few defconfig related changes for drivers needed.
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Merge tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
From Tony Lindgren:
Changes needed to prepare for making omap3 device tree only:
- Always build in board-generic, and add pdata quirks and auxdata
support for it so we have all the pdata related quirks
in the same place.
- Merge of the drivers/pinctrl changes that are needed for PM
to continue working on omap3 and also needed for other omaps
eventually. The three pinctrl related patches have been acked
by Linus Walleij and are pulled into both the pinctrl tree
and this branch.
- Few defconfig related changes for drivers needed.
* tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits)
ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies
ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig
ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it
ARM: OMAP2+: Add minimal 8250 support for GPMC
ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3
ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap
ARM: OMAP2+: Add support for auxdata
pinctrl: single: Add support for auxdata
pinctrl: single: Add support for wake-up interrupts
pinctrl: single: Prepare for supporting SoC specific features
ARM: OMAP2+: igep0020: use display init from dss-common
ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board
+Linux 3.12-rc4
Signed-off-by: Kevin Hilman <khilman@linaro.org>
found on big.LITTLE systems, such as TC2.
This was originally sent for 3.12, but the device-tree bindings hadn't
settled down so here's the improved version for 3.13. I think the code
has benefited from the wait.
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Merge tag 'arm-perf-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/drivers
From Will Deacon:
Addition of an ARM PMU driver for the CCI-400 coherent interconnect
found on big.LITTLE systems, such as TC2.
This was originally sent for 3.12, but the device-tree bindings hadn't
settled down so here's the improved version for 3.13. I think the code
has benefited from the wait.
* tag 'arm-perf-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
drivers: CCI: fix the error handle in cci_pmu_probe()
drivers: CCI: add ARM CCI PMU support
ARM: dts: Document the CCI PMU DT bindings
ARM: dts: Improve CCI bindings documentation
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Allows MSM EHCI controller to be specified via device tree.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Acked-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
That documentation was mostly useful when we didn't have any
documentation for those SoCs, which is not the case anymore. Remove
this, since it should live in the DT anyway.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mark Rutland <mark.rutland@arm.com>
That documentation was mostly useful when we didn't have any
documentation for those SoCs, which is not the case anymore. Remove
this, since it should live in the DT anyway.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Add the generic AM33XX AES module's device tree data and
enable it for the am335x-evm, am335x-evmsk, and am335x-bone
platforms. Also add Documentation file describing the data
for the AES module.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Joel Fernandes <joelf@ti.com>
[joelf@ti.com: Dropped interrupt-parent property, documentation fixups]
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Add the generic AM33XX SHAM module's device tree data and
enable it for the am335x-evm, am335x-evmsk, and am335x-bone
platforms. Also add Documentation file describing the data
for the SHAM module.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Joel Fernandes <joelf@ti.com>
[joelf@ti.com: Dropped interrupt-parent property, documentation fixups]
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Adds AM33XX MMC support for am335x-bone, am335x-evm and am335x-evmsk boards.
Also added is the DMA binding definitions based on the generic DMA request
binding.
Additional changes made to DTS:
* Interrupt, reg and compatible properties added
* ti,needs-special-hs-handling added
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
The pin control registers can have interrupts for example
for device wake-up. These interrupts can be treated as a
chained interrupt controller as suggested earlier by
Linus Walleij <linus.walleij@linaro.org>.
This patch adds support for interrupts in a way that
should be pretty generic, and works for the omaps that
support wake-up interrupts. On omaps, there's an
interrupt enable and interrupt status bit for each pin.
The two pinctrl domains on omaps share a single interrupt
from the PRM chained interrupt handler. Support for
other similar hardware should be easy to add.
Note that this patch does not attempt to handle the
wake-up interrupts automatically unlike the earlier
patches. This patch allows the device drivers to do
a request_irq() on the wake-up pins as needed. I'll
try to do also a separate generic patch for handling
the wake-up events automatically.
Also note that as this patch makes the pinctrl-single
an irq controller, the current bindings need some
extra trickery to use interrupts from two different
interrupt controllers for the same driver. So it
might be worth waiting a little on the patches
enabling the wake-up interrupts from drivers as there
should be a generic way to handle it coming. And also
there's been discussion of interrupts-extended binding
for using interrupts from multiple interrupt controllers.
In any case, this patch should be ready to go allowing
handling the wake-up interrupts in a generic way, or
separately from the device drivers.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Prakash Manjunathappa <prakash.pm@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Cc: linux-kernel@vger.kernel.org
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: devicetree@vger.kernel.org
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
While commit e164153 (pinctrl: imx: move hard-coding data into device
tree) moves to use DTC macro for imx pinctrl device tree setting, it
changes the semantics of fsl,pins without updating the bindings doc
properly. Let's update the fsl,pins description to stop confusing
people.
While at it, the example in the document is updated, and the stale TODO
gets removed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The gated clock documentation referred only to the Orion SoC whereas
it also applied for the Armada 370/XP SoC. This commit updates the
introduction text and also the list of the compatible strings.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Palmas devices do not support the default bias configuration
and hence removing this option from valid pin config parameters.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the driver for the clock gate control which uses PSC (Power Sleep
Controller) IP on Keystone 2 based SOCs. It is responsible for enabling and
disabling of the clocks for different IPs present in the SoC.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Add the driver for the PLL IPs found on Keystone 2 devices. The PLL
IP typically has a multiplier, a divider and a post-divider. The PLL IPs like
ARMPLL, DDRPLL and PAPLL are controlled by the memory mapped register where
as the Main PLL is controlled by a PLL controller and memory map registers.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
