Commit Graph

8 Commits

Author SHA1 Message Date
5911622eff ARM: dts: s3c6410: align node SROM bus node name with dtschema in Mini6410
The SROM controller is modeled with a bus so align the device node name
with dtschema to fix warning:

  srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000'
    does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-5-krzk@kernel.org
2020-09-11 16:37:19 +02:00
8b81a8dece ARM: dts: s3c6410: move fixed clocks under root node in Mini6410
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:

  clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  clocks: #size-cells:0:0: 0 is not one of [1, 2]
  clocks: oscillator@0:reg:0: [0] is too short
  clocks: oscillator@1:reg:0: [1] is too short
  clocks: 'ranges' is a required property
  oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-3-krzk@kernel.org
2020-09-11 16:36:55 +02:00
d60d0cff4a ARM: dts: s3c64xx: Fix init order of clock providers
fin_pll is the parent of clock-controller@7e00f000, specify
the dependency to ensure proper initialization order of clock
providers.

without this patch:
[    0.000000] S3C6410 clocks: apll = 0, mpll = 0
[    0.000000]  epll = 0, arm_clk = 0

with this patch:
[    0.000000] S3C6410 clocks: apll = 532000000, mpll = 532000000
[    0.000000]  epll = 24000000, arm_clk = 532000000

Cc: <stable@vger.kernel.org>
Fixes: 3f6d439f20 ("clk: reverse default clk provider initialization order in of_clk_init()")
Signed-off-by: Lihua Yao <ylhuajnu@outlook.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-08 22:45:20 +02:00
d5bb3a8e4a ARM: dts: s3c64xx: Remove skeleton.dtsi and fix DTC warnings for /memory
Remove the usage of skeleton.dtsi to fix the DTC warnings:

    arch/arm/boot/dts/s3c6410-mini6410.dtb: Warning (unit_address_vs_reg):
        /memory: node has a reg or ranges property, but no unit name
    arch/arm/boot/dts/s3c6410-smdk6410.dtb: Warning (unit_address_vs_reg):
        /memory: node has a reg or ranges property, but no unit name

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-05-07 20:46:16 +02:00
ce2f0e0944 ARM: dts: s3c64xx: Add SPDX license identifiers
Replace GPL v2.0 license statements with SPDX license identifiers.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-01-03 18:27:46 +01:00
68175d5dd7 ARM: dts: s3c64xx: Use common macros for pinctrl configuration
Replace duplicated macros in each DTSI file with a common macro coming
from header.  Include the header in each pinctrl DTSI so further changes
could use it.

Although PIN_FUNC_SPC_2 does not bring much information about the
function itself, it still is more descriptive then hard-coded
number <2>.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-16 13:32:16 +02:00
5e794de514 ARM: dts: Enable PWM node by default for s3c64xx
The PWM block is required for system clock source so it must be always
enabled. This patch fixes boot issues on SMDK6410 which did not have
the node enabled explicitly for other purposes.

Fixes: eeb93d02 ("clocksource: of: Respect device tree node status")

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
a43736deb4 ARM: dts: Add dts file for S3C6410-based Mini6410 board
This patch adds basic device tree sources for FriendlyARM Mini6410 board
based on Samsung S3C6410 SoC.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-09-17 06:48:29 +09:00