8165 Commits

Author SHA1 Message Date
Paul Walmsley
17d092733d OMAP2xxx clock: drop DELAYED_APP flag from non-clksel clocks
The DELAYED_APP flag is effective only with clksel clocks, so drop it from
clocks that are not rate-changeable or that use non-clksel rate changing code
(e.g., virt_prcm_set).

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
2010-02-24 12:15:04 -07:00
Paul Walmsley
94297784ee OMAP2xxx clock: GFX functional clock rates are not independently changeable
According to the OMAP242x TRM Rev X Figure 5-15 "Clock Output Control
- Functional Clocks 2", the GFX functional clocks should be marked
both DELAYED_APP and CONFIG_PARTICIPANT, meaning that their rates must
be reprogrammed as part of a larger OPP set change.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
2010-02-24 12:15:04 -07:00
Paul Walmsley
c78a05e8e4 OMAP4 clock: drop the CLOCK_IN_OMAP4430 clock flag
The CLOCK_IN_OMAP4430 clock flag is not currently needed in the OMAP4
ES1 clock tree, and platform discrimination via clock flags is
deprecated in favor of the clkdev mechanism, so, drop it.  (The OMAP4
clock tree autogeneration script has been updated accordingly.)

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-02-24 12:15:04 -07:00
Paul Walmsley
93340a2294 OMAP2/3/4 clock: fix DPLL multiplier value errors; also copyrights, includes, documentation
The maximum DPLL multiplier (M) values for OMAP2xxx and OMAP3xxx are
one increment higher than they should be.  See for example the
OMAP242x TRM Rev X Section 5.10.6 "Clock Generator Registers" and the
OMAP36xx TRM Rev C Table 3-202 "CM_CLKSEL1_PLL".  Programming a 0 into
the DPLL's M register bitfield is valid for OMAP2/3 and indicates that
the DPLL should enter MN-bypass mode.  Also, increase the minimum
multiplier (M) value for the DPLL rate rounding code from 1 to 2, to
ensure that it does not inadvertently put the DPLL into bypass.

Note that the register documentation in the OMAP2xxx and OMAP3xxx TRMs
does not make clear that the actual DPLL divider value (the "N") is
the content of the appropriate register bitfield for the N value,
_plus one_.  (In other words, an N register bitfield of 0 indicates a
DPLL divider value of 1.)  This is only clearly documented in the
OMAP4430 TRM, in, for example, OMAP4430 TRM Rev A Table 3-1167
"CM_CLKSEL_DPLL_USB".

While here, update copyrights, add kerneldoc for struct dpll_data,
drop the unused struct dpll_data.max_tolerance field, remove some
unnecessary #includes in DPLL-related code, and replace the #include
of <linux/module.h> with <linux/list.h>, which is what was really
needed.  The OMAP4 clock autogenerator script has been updated
accordingly.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-02-24 12:15:03 -07:00
Vishwanath BS
7356f0b26b OMAP3 clock: add support for 192Mhz DPLL4M2 output
In 3630, DPLL4M2 output can be 96MHz or 192MHz (for SGX to run at
192). This patch has changes to support this feature. 96MHz clock is
generated by dividing 192Mhz clock by 2 using CM_CLKSEL_CORE register.
SGX can select Core Clock, 192MHz clock or CM_96M_FCLK as it's
functional clock. In summary changes done are:
1. Added a feature called omap3_has_192mhz_clk and enabled for 3630
2. Added a new clock node called omap_192m_alwon_ck
3. Made omap_96m_alwon_fck to derive its clock from omap_192m_alwon_ck

Signed-off-by: Vishwanath BS <Vishwanath.bs@ti.com>
[paul@pwsan.com: fixed whitespace]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:15:03 -07:00
Vishwanath BS
678bc9a2ea OMAP3 clock: Introduce 3630 DPLL4 HSDivider changes
Divider (M2, M3, M4, M5 and M6) field width has been increased by 1 bit
in 3630. This patch has changes to accommodate this in CM dynamically
based on chip version.
Basically new clock nodes have been added for 3630 DPLL4 M2,M3,M4,M5 and
M6 and value of these nodes are used if cpu type is 3630.

Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
[paul@pwsan.com: updated to apply on 2.6.34 queue; comments added]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:15:03 -07:00
Richard Woodruff
358965d7ba OMAP3 clock: introduce DPLL4 Jtype
DPLL4 for 3630 introduces a changed block called j type dpll, requiring
special divisor bits and additional reg fields. To allow for silicons to
use this, this is introduced as a flag and is enabled for 3630 silicon.
OMAP4 also has j type dpll for usb.

Tested with 3630 ZOOM3 and OMAP3430 ZOOM2

Signed-off-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vishwanath BS <Vishwanath.bs@ti.com>
[paul@pwsan.com: added some comments; updated copyrights and credits; fixed
 some style issues]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:15:02 -07:00
Abhijit Pagare
91808a81fe ARM: OMAP4 clock domain: Add check for avoiding dependency related update.
A check is added for avoiding the sleep/wakeup dependency updates
for OMAP4 as the structures for the dependencies are currently absent.

Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
[paul@pwsan.com: added warnings, explanatory comment, copyright update]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:14:59 -07:00
Mike Turquette
a7e069fc5a OMAP3630: Clock: Workaround for DPLL HS divider limitation
This patch implements a workaround for the DPLL HS divider limitation
in OMAP3630 as given by Errata ID: i556.

Errata:
When PWRDN bit is set, it resets the internal HSDIVIDER divide-by value (Mx).
The reset value gets loaded instead of the previous value.
The following HSDIVIDERs exhibit above behavior:
. DPLL4 : M6 / M5 / M4 / M3 / M2 (CM_CLKEN_PLL[31:26] register bits)
. DPLL3 : M3 (CM_CLKEN_PLL[12] register bit).

Work Around:
It is mandatory to apply the following sequence to ensure the write
value will
be loaded in DPLL HSDIVIDER FSM:
The global sequence when using PWRDN bit is the following:
. Disable Mx HSDIVIDER clock output related functional clock enable bits
        (in CM_FCLKEN_xxx / CM_ICLKEN_xxx)
. Enable PWRDN bit of HSDIVIDER
. Disable PWRDN bit of HSDIVIDER
. Read current HSDIVIDER register value
. Write different value in HSDIVIDER register
. Write expected value in HSDIVIDER register
. Enable Mx HSDIVIDER clock output related functional clocks
        (CM_FCLKEN_xxx / CM_ICLKEN_xxx)

Signed-off-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Vijaykumar GN <vijaykumar.gn@ti.com>
[paul@pwsan.com: updated patch to apply; made workaround function static;
 marked as being 36xx-specific]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:06:00 -07:00
Thara Gopinath
c23a97d377 OMAP: HWMOD: Add support for early device register into omap device layer
This patch adds support in omap device layer to register devices
as early platform devices. Certain devices needed during system boot up
like timers, gpio etc can be registered as early devices. This will
allow for them to be probed very early on during system boot up.
This patch adds a parameter is_early_device in omap_device_build.
Depending on this parameter a call to early_platform_add_devices
or platform_register_device is made.

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:58 -07:00
Thara Gopinath
358f0e630d OMAP3: hwmod: support to specify the offset position of various SYSCONFIG register bits.
In OMAP3 Some modules like Smartreflex do not have the regular sysconfig
register.Instead clockactivity bits are part of another register at a
different bit position than the usual bit positions 8 and 9.

In OMAP4, a new scheme is available  due to the new protocol
between the PRCM and the IPs. Depending of the scheme, the SYSCONFIG
bitfields position will be different.
The IP_REVISION register should be at offset 0x00.
It should contain a SCHEME field. From this we can determine whether
the IP follows legacy scheme or the new scheme.

31:30 SCHEME  Used to distinguish between old scheme and current.
 Read 0x0:  Legacy protocol.
 Read 0x1:  New PRCM protocol defined for new OMAP4 IPs

For legacy IP
 13:12 MIDLEMODE
 11:8  CLOCKACTIVITY
 6     EMUSOFT
 5     EMUFREE
 4:3   SIDLEMODE
 2     ENAWAKEUP
 1     SOFTRESET
 0     AUTOIDLE

For new OMAP4 IP's, the bit position in SYSCONFIG is (for simple target):
 5:4   STANDBYMODE (Ex MIDLEMODE)
 3:2   IDLEMODE (Ex SIDLEMODE)
 1     FREEEMU (Ex EMUFREE)
 0     SOFTRESET

Unfortunately In OMAP4 also some IPs will not follow any of these
two schemes. This is the case at least for McASP, SmartReflex
and some security IPs.

This patch introduces a new field sysc_fields in omap_hwmod_sysconfig which
can be used by the hwmod structures to specify the offsets for the
sysconfig register of the IP.Also two static structures
omap_hwmod_sysc_type1 and omap_hwmod_sysc_type2 are defined
which can be used directly to populate the sysc_fields if the IP follows
legacy or new OMAP4 scheme. If the IP follows none of these two schemes
a new omap_hwmod_sysc_fields structure has to be defined and
passed as part of omap_hwmod_sysconfig.

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:58 -07:00
Vishwanath BS
5eb75f5578 OMAP3 clock: Remove FreqSel for 3630
DPLL_FREQSEL field in CLKEN_PLL register is no longer valid for
OMAP3630. So remove references to that.

Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
[paul@pwsan.com: added comment fix from Sergei Shtylyov]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:57 -07:00
Kevin Hilman
0cc9314eaf OMAP2/3: PRCM: fix misc. compiler warnings
- missing return in omap_prcm_get_reset_sources()
- potential use of uninitialized variable in omap_prcm_arch_reset()

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:56 -07:00
Sanjeev Premi
a51ba28407 OMAP3 clock: Check return values for clk_get()
This patch checks if clk_get() returned success for
the clocks used in function omap2_clk_arch_init().

This version incorporates review comments from
Kevin Hilman and Paul Walmsley.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:56 -07:00
Ranjith Lohithakshan
3cc4a2fc2e AM35xx: Add clock support for new modules on AM35xx
This patch adds clock support for the following AM35xx modules
	- Ethernet MAC
	- CAN Controller (HECC)
	- New MUSB OTG Controller with integrated Phy
	- Video Processing Front End (VPFE)
	- Additional UART (UART4)

Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:55 -07:00
Ranjith Lohithakshan
419cc97d36 OMAP2/3 clock: Extend find_idlest() to pass back idle state value
Current implementation defines clock idle state indicators based on the
cpu information (cpu_is_omap24xx() or cpu_is_omap34xx()) in a system wide
manner. This patch extends the find_idlest() function in clkops to pass
back the idle state indicator for that clock, thus allowing idle state
indicators to be defined on a per clock basis if required.

This is specifically needed on AM35xx devices as the new IPSS clocks
indicates the idle status (0 is idle, 1 is ready) in a way just
opposite to how its handled in OMAP3 (0 is ready, 1 is idle).

Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
[paul@pwsan.com: updated to apply after commit 98c45457 et seq.]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:54 -07:00
Thara Gopinath
cde08f81b1 OMAP3 PM: Adding counters for power domain logic off and mem off during retention.
This patch adds counters to keep track of whether the powerdomain
logic or software controllable memory banks are turned off when
the power domain enters retention. During power domain retention
if logic gets turned off, the scenario is known as Open Switch Retention.
Also during retention s/w controllable memory banks of a power
domain can be chosen to be kept in retention or off.

This patch adds one counter per powerdomain to track the power domain
logic state during retention. Number of memory bank state counters
added depends on the number of software controllable memory banks
of the powerdomain. To view these counters do
	cat ../debug/pm_debug/count

Signed-off-by: Thara Gopinath <thara@ti.com>
[paul@pwsan.com: conditional expressions simplified; counter increment
 code moved to its own function]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:50 -07:00
Thara Gopinath
4133a44e28 OMAP3 PM: Defining .pwrsts_logic_ret field for core power domain structure
This patch adds the flag .pwrsts_logic_ret info for the core power domain
in the associated powerdomain structure. This flag specifies the states
core domain logic can hit in event of the domain entering retention.

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:50 -07:00
Thara Gopinath
1e3d0d2ba9 OMAP2/3 PM: Adding powerdomain APIs for reading the next logic and mem state
This patch adds APIs pwrdm_read_logic_retst and
pwrdm_read_mem_retst for reading the next programmed
logic and memory state a powerdomain is to hit in event
of the next power domain state being retention.
These are needed for OSWR support.

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:49 -07:00
Tero Kristo
b024b542c3 OMAP3: Clock: Added IDLEST definitions for SGX
Added definitions for OMAP3430ES2_ST_SGX_SHIFT and OMAP3430ES2_ST_SGX_MASK
as these were missing.

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:48 -07:00
Kevin Hilman
dfa6d6f892 OMAP3: clock: use std _MASK suffix for CM_FCLKEN_IVA2 defines
Add _MASK suffix to CM_FCLKEN_IVA2 bitfieds to conform with the rest
of the usage in cm-regbits-34xx.h of using _SHIFT and _MASK suffixes.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:48 -07:00
Kevin Hilman
24d82e3421 OMAP: omap_device: when 'called from invalid state', print state
The omap_device_[enable|idle|shutdown] functions print a warning
when called from an invalid state.  Print the invalid state in
the warning messages.  This also uses __func__ to get the function
name.

Also, move the entire print string onto a single line to facilitate
grepping or error messages.  Recent discussions on LKML show
strong preference for grep-able code vs. strict 80 column limit.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:45 -07:00
Kevin Hilman
0007122ad8 OMAP: omap_device: add omap_device_is_valid()
The omap_device struct contains a 'struct platform_device'.  Normally,
converting a platform_device pointer to an omap_device pointer
consists of simply doing a container_of(), as is done currently by the
to_omap_device() macro.

However, if this is attempted when using platform_device that has not
been created as part of the omap_device creation, the container_of()
will point to a memory location before the platform_device pointer
which will contain random data.

Therefore, we need a way to detect valid omap_device pointers.  This
patch solves this by using the simple magic number approach.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24 12:05:45 -07:00
Tomi Valkeinen
69b2048f44 OMAP: DSS2: move timing functions
Move check/set/get_timings() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:28 +02:00
Tomi Valkeinen
3651131268 OMAP: DSS2: move set/get_wss()
Move set/get_wss() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:28 +02:00
Tomi Valkeinen
37ac60e414 OMAP: DSS2: move enable/disable/suspend/resume
Move enable/disable/suspend/resume from omap_dss_device to
omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:28 +02:00
Tomi Valkeinen
18946f62c6 OMAP: DSS2: move update() and sync()
Move update() and sync() from omap_dss_device to omap_dss_driver.

Also, update was hardcoded to use virtual channel 0. This patch adds a
parameter that specifies the VC.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:28 +02:00
Tomi Valkeinen
446f7bff70 OMAP: DSS2: move set/get_update_mode()
Move set/get_update_mode() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:28 +02:00
Tomi Valkeinen
225b650d41 OMAP: DSS2: move enable/get_te()
Move enable/get_te() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:27 +02:00
Tomi Valkeinen
a269950405 OMAP: DSS2: move get_recommended_bpp()
Move get_recommended_bpp() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:27 +02:00
Tomi Valkeinen
96adceceed OMAP: DSS2: move get_resolution()
Move get_resolution() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:27 +02:00
Tomi Valkeinen
a2faee84f6 OMAP: DSS2: move enable/disable_channel to overlay manager
Move enable/disable_channel() from omap_dss_device to overlay manager.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:27 +02:00
Tomi Valkeinen
3f71cbe736 OMAP: DSS2: move wait_vsync()
Move wait_vsync() from omap_dss_device to overlay manager.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:27 +02:00
Tomi Valkeinen
87424e1bff OMAP: DSS2: move get/set_rotate()
Move get/set_rotate() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:27 +02:00
Tomi Valkeinen
8d8aa61dcf OMAP: DSS2: move set/get_mirror()
Move set/get_mirror() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:27 +02:00
Tomi Valkeinen
c75d9464c1 OMAP: DSS2: move memory_read()
Move memory_read() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:27 +02:00
Tomi Valkeinen
1a75ef422d OMAP: DSS2: move run_test()
Move run_test() from omap_dss_device to omap_dss_driver.

This is part of a larger patch-set, which moves the control from omapdss
driver to the display driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-24 14:31:26 +02:00
Baruch Siach
08268b78d6 mx25: move ARCH_MXC_IOMUX_V3 to the ARCH level
ARCH_MXC_IOMUX_V3 is not specific to the i.MX25 PDK platform. Thus,
ARCH_MXC_IOMUX_V3 should be selected by ARCH_MX25.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-02-24 10:45:21 +01:00
Fabio Estevam
82d52a1948 mx51_babbage: Fix ckih2 parameter in mx51_clocks_init function
This patch is to be applied into Sascha's mxc-master branch.

Fix ckih2 parameter in mx51_clocks_init funtion. CKIH2 pin is left unconnected on Babbage.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Amit Kucheria <amit.kucheria@canonical.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-02-24 10:29:14 +01:00
Mark Brown
cd6eb9808c mx31ads: Configure SSI5 pins in IOMUX for PMIC module audio support
SSI5 on the CPU is connected to the PMIC module to provide audio support
so unconditionally configure the relevant pins on the CPU to route out
the signals.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-02-24 10:23:42 +01:00
Uwe Kleine-König
bac3fcfad5 arm/imx/iomux-v1: check for invalid modes in mxc_gpio_mode
mxc_gpio_mode checks for invalid pins and so it returns zero for
success, -EINVAL for invalid pins.

While at it, remove definitions of GPIO_PORT_MAX removed as they are
unused now.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:16 +01:00
Uwe Kleine-König
e835d88e71 arm/imx: let platform files include the SoC-specific iomux header
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:15 +01:00
Uwe Kleine-König
111588f830 arm/imx/iomux-v1: rename header file
Addionally make iomux-mx*.h headers stand-alone and similar to iomux-v3
platform files should include their platform iomux header from now on.
For now iomux.h simply includes all iomux-v1 platform headers and so
provides compatibility until all files are converted.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:15 +01:00
Uwe Kleine-König
261f6f681c arm/mx25: don't include iomux.h which is for iomux-v1 machines
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:14 +01:00
Uwe Kleine-König
2f6c97c48e arm/imx/iomux-mx3.h: unify style and comments
- use __MACH_IOMUX_MX3_H__ as header protector analogous to
  <mach/mx...h>
- use tabs for indention

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:13 +01:00
Uwe Kleine-König
8902cbd9db arm/imx/iomux-mx2x: unify style
- use __MACH_IOMUX_MX2x_H__ as header protector analogous to
  <mach/mx...h>
- use tabs for indention

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:12 +01:00
Uwe Kleine-König
6056154145 arm/imx/iomux-mx27: unify style and comments
- use __MACH_IOMUX_MX27_H__ as header protector analogous to
  <mach/mx...h>
- use tabs for indention
- fix sorting

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:12 +01:00
Uwe Kleine-König
e76feb8742 arm/imx/iomux-mx25: unify style and comment cleanup
- use __MACH_IOMUX_MX25_H__ as header protector analogous to
  <mach/mx...h>
- remove doxygen comments
- remove #error about mach/iomux.h which is unused on mx25
- remove #ifndef __ASSEMBLY__ which is unneeded here

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:11 +01:00
Uwe Kleine-König
6985a719f9 arm/imx/iomux-mx21: unify style
- use __MACH_IOMUX_MX21_H__ as header protector analogous to
  <mach/mx...h>
- use tabs for indention

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:10 +01:00
Uwe Kleine-König
6863f19810 arm/imx/iomux-mx1: unify style and comment cleanup
- use __MACH_IOMUX_MX1_H__ as header protector analogous to
  <mach/mx...h>
- use tabs for indention

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24 10:07:10 +01:00