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Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
We really want to use the new private_atomic_state but can't right now
as we have to maintain some backward compatibility to older kernels. For
now let's follow Intel's approach and extend the drm_atomic_state.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Adds some additional information to logs in dc_commit_streams to
better match Dal2.
Also adds a new function, dc_raw_log, that has the same
functionality as dc_conn_log, but does not attach display specific
prefixes to the log output.
Finally, adds a new DC log type, LOG_DTN, that logs to
LogMinor_DispConnect_dtn in DM. This new log type and dc_raw_log
are used to generate clock info in the logs to match Dal2.
Signed-off-by: Corbin McElhanney <corbin.mcelhanney@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This change fixes dcn10 front end reset sequence. Previously we
would reset front end during flip which led to issues
in certain MPO and 4k/5k scenarios. We would also never properly
power gate our front end.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
These stubs are initial only since we need to flatten
DC objects (steran at least) to implement deep copy.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Previously, we assumed that allow_modeset=false => page flip. This
assumption breaks when an atomic commit is submitted with allow_modeset
set to false, since the legacy flip code is never called (the legacy
code grabs the vblank reference).
Fix: Move drm_vblank_get() from amdgpu_atomic_helper_page_flip() to
amdgpu_dm_commit_surfaces().
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm_plane_state is subclassed by dm_plane_state, so atomic driver should
use __drm_atomic_helper_plane_destroy_state() to destroy a state.
drm_atomic_helper_plane_destroy_state() frees drm_plane_state which is
allocated inside dm_plane_state, this is problematic.
Fixes: 95ae03a ("drm/amd/display: Create dm_plane_state.")
Signed-off-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fix typos.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
IGT currently does not properly commit changes on planes with multiple
possible CRTC's. Set one valid CRTC for each plane for now, plus one
underlay plane on Carizzo and Stoney that is valid for all CRTCs.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Switch to wait_for_completion_interruptible_timeout wait
since the lock is called from IOCTL context and can be
interrupted by a signal.
Global lock function might return EDEADLK or EINTR which
is not an error and just singals to user mode to restart
the call.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Due to using dc_commit_surface_to_stream instead of build
stream and surface updates any surface commit today is
evlauted to full. Until we fix this and can corretly
evluate type of surface update, anything which is not page
flip or cursor update will be treted as full update chnage
and global lock will be aquired.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Missing function implementation was leading to EINVAL
in UMD thus not adding MST connector to X topology
and hence not getting set mode for it.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hook up dc_surface creation/destruction to dm_plane_state.
Rename amdgpu_drm_plane_state to dm_plane_state and do
minor cleanups.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1) Always call flip ISR, for any surface comit, not only for page flip.
2) For events not signaled in flip ISR, handle them in end of commit_tail.
3)Fix race condition between subsequent atomic calls by removing
current state access AFTER drm_atomic_helper_commit_hw_done
was called. After this call a pending next commit will
swap in his own state into objects and proceed.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This code is remanant of pre atomic age when flip was a
standalone IOCTL.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Do not broadcast (to DRM) unsupported RGB formats.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Switch from legacy cursor to DRM cursor plane. Cursor
is not an actual plane but more of a subplane of each
pipe. Bind a DRM cursor plane instance to each CRTC.
Eliminate seperate FB object allocation for cursor and
clean dm_crtc_cursor_set.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This patch updates the YUV format supported to
NV12 and NV21 and hence updates the offsets.
BUG: SWDEV-119421
TEST: (On Chromium OS for Stoney Only)
* Executed below tests to see YUV(underlay) & RGB planes on eDP
plane_test --format XR24 --size 500x100 -p --format NV12 --size
500x500
Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Use drm_atomic_crtc_needs_modeset instead.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Check if adding surface is failed to prevent NULL pointer deref.
Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Summury of changes:
1: Both in check and commit Connector properties were handled as
part of for_each(crtc) loop while they shoud have been handled
in a dedicated for_each(connector)
loop since they are connector properties. Moved.
2: Removed hacky plane add in amdgpu_dm_connector_atomic_set_property
to force iteration on plane forconnector property. This was
causing double call to commit_surface_for_stream both in crtc loop
and plane loop.
3: Remove middleman DC interface and call dc_commit_surfaces_to_stream
directly to increase code clarity.
Remove it from atomic_commit.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This will be NULL on a new stream. DC handles it gracefully.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
You cannot have modeset and flip in the same call for
same CRTC, in such case it will be set mode and set plane,
not a flip.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Use DC interface to query for plane update type
so in case of FULL update you flush any outstanding
commits.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Remove extra loop we have for page flips and do flips in same loop we do
for surface create/update.
Add documentation for synchronization between commits on different crtcs.
Rename function to have DM prefix.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Today we use special interface for flip because of fear of cuncurency issues
over dc->current_ctx. This should be no longer an issue when flipping on
multiple CRTCs concurently since for fast update (as flip is) no new context
is created and the exsisitng is not destroyed. For full updates case when
removing or adding streams on once CRTC while flipping on another
Adding all current active CRTC's states to the atomic commit in
amdgpu_dm_atomic_check will garntee that any such full update commit
will wait for completion of any outstanding flip.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Problem :
A race between two adjecent page flips makes the earlier one
to release an alocated frame buffer for the subsequent one -
since there are 2 frambuffer swapped back and forth between flips,
the 'new' fb of the later flip is actually the 'previous' fb for the earlier flip.
Fix:
Don't set fb->address = 0 in cleanup hook, this is unnecessery and
erases the newly cached adress that was set in prepare_fb of the second
flip.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link index is an unnecessery level of inderection when
calling from kernel i2c/aux transfer into DAL.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
There is a hard hang observed during resume from S3 when
the system receives a DP short pulse interrupt. This is
because there are two code paths contending for GPIO
access for AUX channel transactions. One such path is
through amdgpu_dm_display_resume() function which is
invoked from the regular system resume code path. The
other path is through handle_hpd_rx_irq(), which is
invoked in response to system receiving DP short pulse
interrupt. handle_hpd_rx_irq() guards against conflicting
GPIO access using hpd_lock, but the GPIO access from
amdgpu_dm_display_resume() remains unguarded.
This patch makes sure we use hpd_lock inside
amdgpu_dm_display_resume() to avoid race conditions
for GPIO access.
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
dc_commit_surfaces_to_stream() function currently
is handle's only one plane at a time.
This will not work if multiple planes have to be set to a crtc.
The functionality of dc_commit_surfaces_to_stream() with this patch
is slit into
1. Accumulate and initialise all the surfaces that needs to be
set to a crtc.
2. Update the intialised set of surfaces to the steam in one go.
Hence dc_commit_surfaces_to_stream() is renamed to init_surfaces().
Once all the planes requested by user space are initialised,
dc_commit_surfaces_to_stream() shall sequentially populates *updates,
*flip_addr, *plane_info and *scaling_info for all surfaces.
BUG: SWDEV-119421
TEST: (On Chromium OS for Stoney Only)
* Chromium UI comes up, on both eDP & DP.
* 'new_surface_count' now changes as per user input for e.g for
all below run tests its 2, without this patch for the below
tests it used to be 1
* Executed below tests to see YUV(underlay) & RGB planes on eDP
plane_test --format XR24 --size 500x100 -p --format YV12 --size 500x500
plane_test --format AR24 --size 500x50 -p --format YV12 --size 150x150
plane_test --format AR24 --size 500x50 -p --format YV12 --size 1366x768
Signed-off-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This patch populates the YUV surface configurations.
Tests: (On Chromium OS for Stoney Only)
builds without any errors.
Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This will allow us to carry it from check to commit
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This should make things simpler when we try to rework this later when we
pass validate_context from atomic_check to atomic_commit.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
They could differ between ASIC generations
Signed-off-by: Sylvia Tsai <sylvia.tsai@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
- Remove x,y hotspot from dc_cursor_attributes. Only program it
through setPosition.
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Make sure we do not program a hw pageflip inside vblank 'n' iff the
atomic flip is comitted while inside the same vblank 'n'. We must
defer such a flip by one refresh cycle to vblank 'n+1', unless this
is a DRM_MODE_PAGE_FLIP_ASYNC async pageflip, which must always
execute as soon as possible.
Without this, pageflips programmed via X11 GLX_OML_sync_control extensions
glXSwapBuffersMscOML(..., target_msc, ...); call and/or via DRI3/Present
PresentPixmap(..., target_msc, ...); request will complete one vblank
too early whenever target_msc > current_msc + 1, ie. more than 1 vblank
in the future. In such a case, the call of the pageflip ioctl() would be
triggered by a queued drmWaitVblank() vblank event, which itself gets
dispatched inside the vblank one frame before the target_msc vblank.
Testing with this patch does no longer show any problems with
OML_sync_control swap scheduling or flip completion timestamps.
Tested on R9 380 Tonga.
v2: Add acked/r-b by Harry and Michel.
v3: Feedback from Andrey: Must not wait an extra frame for
DRM_MODE_PAGE_FLIP_ASYNC flips.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Acked-by: Harry Wentland <harry.wentland@amd.com> (v1)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Cc: Harry Wentland <Harry.Wentland@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
