887840 Commits

Author SHA1 Message Date
Manivannan Sadhasivam
68ca364d48 arm64: dts: freescale: Add devicetree support for Thor96 board
Add devicetree support for Thor96 board from Einfochips. This board is
one of the 96Boards Consumer Edition platform powered by the NXP
i.MX8MQ SoC.

Following are the features supported currently:

1. uSD
2. WiFi/BT
3. Ethernet
4. EEPROM (M24256)
5. NOR Flash (W25Q256JW)
6. 2xUSB3.0 ports and 1xUSB2.0 port at HS expansion

More information about this board can be found in Arrow website:
https://www.arrow.com/en/products/i.imx8-thor96/arrow-development-tools

Link to 96Boards CE Specification: https://linaro.co/ce-specification

Signed-off-by: Darshak Patel <darshak.patel@einfochips.com>
[Mani: cleaned up for upstream]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-01-09 14:40:55 +08:00
Markus Reichl
1fc61ed04d arm64: dts: rockchip: Enable mp8859 regulator on rk3399-roc-pc
The rk3399-roc-pc uses a MP8859 DC/DC converter for 12V supply.
This supplies 5V only in default state after booting.
Now we can control the output voltage via I2C interface.
Add a node for the driver to reach 12V.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/20200106211633.2882-6-m.reichl@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-09 00:28:40 +01:00
Matthias Kaehlcke
a950c4c63c ARM: dts: rockchip: Use ABI name for recovery mode pin on veyron fievel/tiger
The recovery mode pin is currently named 'REC_MODE_L', which is
how the signal is called in the schematics. The Chrome OS ABI
requires the pin to be named 'RECOVERY_SW_L', which is also how
it is called on all other veyron devices. Rename the pin to match
the ABI.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200108092908.1.I3afd3535b65460e79f3976e9ebfa392a0dd75e01@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-09 00:22:26 +01:00
Baruch Siach
62bba54d99 arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node
Explicitly set the switch cpu (upstream) port phy-mode and managed
properties. This fixes the Marvell 88E6141 switch serdes configuration
with the recently enabled phylink layer.

Fixes: a6120833272c ("arm64: dts: add support for SolidRun Clearfog GT 8K")
Reported-by: Denis Odintsov <d.odintsov@traviangames.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-01-08 22:16:03 +01:00
Yangtao Li
dc48a3a795 ARM: dts: exynos: Enable FIMD node and add proper panel node to Tiny4412
Enable fimd device node which is a display controller, and add panel
node required by it.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-08 21:17:38 +01:00
Martin Blumenstingl
c3dd3315ab ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP
The clock setup on Meson8 cannot achieve a Mali frequency of exactly
182.15MHz. The vendor driver uses "FCLK_DIV7 / 1" for this frequency,
which translates to 2550MHz / 7 / 1 = 364285714Hz.
Update the GPU operating point to that specific frequency to not confuse
myself when comparing the frequency from the .dts with the actual clock
rate on the system.

Fixes: c3ea80b6138cae ("ARM: dts: meson8b: add the Mali-450 MP2 GPU")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-01-08 11:00:58 -08:00
Martin Blumenstingl
fe634a7a9a ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP
The clock setup on Meson8 cannot achieve a Mali frequency of exactly
182.15MHz. The vendor driver uses "FCLK_DIV7 / 2" for this frequency,
which translates to 2550MHz / 7 / 2 = 182142857Hz.
Update the GPU operating point to that specific frequency to not confuse
myself when comparing the frequency from the .dts with the actual clock
rate on the system.

Fixes: 7d3f6b536e72c9 ("ARM: dts: meson8: add the Mali-450 MP6 GPU")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-01-08 11:00:58 -08:00
Martin Blumenstingl
da25655744 ARM: dts: meson8b: fix the clock controller compatible string
The Meson8b clock controller is an evolution of the Meson8 clock
controller. The clock controller on Meson8b contains two identical mali
clock trees for glitch-free rate switching.
Use the correct compatible string to make use of the glitch free mux.

Fixes: b6db3936f2833c ("ARM: dts: meson: switch the clock controller to the HHI register area")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-01-08 11:00:58 -08:00
Jerome Brunet
be63807524 arm64: dts: meson: add audio fifo depths
Add the property describing the depth of the audio fifo on the axg, g12a
and sm1 SoC family

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-01-08 10:52:12 -08:00
Florian Fainelli
0100f76d96
Merge tag 'tags/bcm2835-dt-next-2020-01-07' into devicetree/next
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-08 10:09:49 -08:00
Shawn Guo
6fa154e46c arm64: dts: hi3798cv200: correct PCIe 'bus-range' setting
The PCIe 'bus-range' setting is incorrect and causing the following
message during boot.

pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-0f] (conflicts with (null) [bus 00-0f])

Correct it to get rid of the message.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-01-08 19:33:54 +08:00
Baruch Siach
e4018a496b ARM: dts: armada-388-clearfog: add eeprom
SolidRun Clearfog Pro rev 2.1 and Clearfog Base rev 1.3 added EEPROM.
Add DT node for EEPROM description in the .dtsi shared by Clearfog Pro
and Base.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-01-08 10:56:54 +01:00
Baruch Siach
e645d14e24 ARM: dts: armada-38x-solidrun-microsom: add eeprom
SolidRun Armada 38x SOM rev 2.1 added EEPROM. Add DT node for EEPROM
description.

Cc: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-01-08 10:56:40 +01:00
Baruch Siach
5c04ad8562 ARM: armada-38x-solidrun-microsom: move i2c0 to SOM DT
Move the i2c0 controller properties to the SOM .dtsi. This is
preparation for adding an i2c device at the SOM level.

Cc: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-01-08 10:56:20 +01:00
Baruch Siach
aecc313490 ARM: dts: mvebu: add support for SolidRun Clearfog GTR
SolidRun Clearfog GTR L8 and S4 SBCs are based on Armada 385. They
features 8 (L8) or 4 (S4) switched Ethernet ports, 1 1Gb Ethernet port,
1 directly connected SFP port, 1 SFP port behind the switch (not
currently described in DT), 3 mini-PCIe slots, eMMC, SPI flash, USB3
port.

  https://developer.solid-run.com/products/clearfog-gtr-a385/

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-01-08 10:46:19 +01:00
Loic Poulain
7a2a2231ef arm64: dts: apq8096-db820c: Fix VDD core voltage
APQ8096 has its VDD APC (Power for quad Kryo applications
microprocessors) powered by PM8996 PMIC S9, S10, S11 tri-phase
regulators (gang). The bootloader may have configured these
regulators with non sustainable default values, leading to sporadic
hangs under CPU stress tests (cpufreq-bench). Ideally we should enable
voltage scaling along with frequency scaling, but for now just set the
regulator gang value to a sane voltage, capable of supporting highest
frequencies (turbo).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1578401755-26211-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-07 15:27:57 -08:00
Niklas Cassel
eac8ce86cb arm64: dts: qcom: qcs404-evb: Set vdd_apc regulator in high power mode
vdd_apc is the regulator that supplies the main CPU cluster.

At sudden CPU load changes, we have noticed invalid page faults on
addresses with all bits shifted, as well as on addresses with individual
bits flipped.

By putting the vdd_apc regulator in high power mode, the voltage drops
during sudden load changes will be less severe, and we have not been able
to reproduce the invalid page faults with the regulator in this mode.

Fixes: 8faea8edbb35 ("arm64: dts: qcom: qcs404-evb: add spmi regulators")
Cc: stable@vger.kernel.org
Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191014120920.12691-1-niklas.cassel@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-07 15:17:04 -08:00
Bjorn Andersson
c9ec155b59 arm64: dts: qcom: msm8998-mtp: Add alias for blsp1_uart3
The msm_serial driver has a predefined set of uart ports defined, which
is allocated either by reading aliases or if no match is found a simple
counter, starting at index 0. But there's no logic in place to prevent
these two allocation mechanism from colliding. As a result either none
or all of the active msm_serial instances must be listed as aliases.

Define blsp1_uart3 as "serial1" to mitigate this problem.

Fixes: 4cffb9f2c700 ("arm64: dts: qcom: msm8998-mtp: Enable bluetooth")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191119011823.379100-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-07 15:17:03 -08:00
Johan Jonker
25418f9d49 arm64: dts: rockchip: rk3399-hugsun-x99: remove supports-sd and supports-emmc options
The entries "supports-sd" and "supports-emmc" are not a valid Linux option
in relation with SD card or eMMC, so remove them.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20191231175054.4929-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-07 23:03:10 +01:00
Johan Jonker
24bea4dfa3 arm64: dts: rockchip: rk3399-firefly: remove num-slots from &sdio0 node
The option "num-slots" was deprecated long time ago, so remove it.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20191231191154.5587-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-07 23:02:55 +01:00
Matthias Kaehlcke
1f5e928340 ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger
The flash write protect pin is currently named 'FW_WP_AP', which is
how the signal is called in the schematics. The Chrome OS ABI
requires the pin to be named 'AP_FLASH_WP_L', which is also how
it is called on all other veyron devices. Rename the pin to match
the ABI.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200106135142.1.I3f99ac8399a564c88ff48ae6290cc691b47c16ae@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-07 22:52:40 +01:00
Krzysztof Kozlowski
ce258cfe41 ARM: dts: samsung: Rename Samsung and Exynos to lowercase
Fix up inconsistent usage of upper and lowercase letters in "Samsung"
and "Exynos" names.

"SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked
names.  Therefore they should be written with lowercase letters starting
with capital letter.

The lowercase "Exynos" name is promoted by its manufacturer Samsung
Electronics Co., Ltd., in advertisement materials and on website.

Although advertisement materials usually use uppercase "SAMSUNG", the
lowercase version is used in all legal aspects (e.g. on Wikipedia and in
privacy/legal statements on
https://www.samsung.com/semiconductor/privacy-global/).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-07 20:45:13 +01:00
Olof Johansson
e052860d11 Drop more legacy platform data for omaps for v5.6 merge window
We can now probe devices with ti-sysc interconnect driver and dts
 data, and can continue dropping the related platform data and custom
 ti,hwmods dts property for various devices.
 
 And related to that, we finally can remove the legacy sdma support in
 favor of using the dmaengine driver only. I was planning to send the
 sdma changes separately, but that would have produced a pile of
 pointless merge conflicts, so I decided it's best to resolve it locally.
 After all, the sdma series also ends up removing the related platform
 data.
 
 Note that this series is based on omap-for-v5.6/ti-sysc-dt-signed branch
 as it depends for dts data being in place.
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Merge tag 'omap-for-v5.6/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Drop more legacy platform data for omaps for v5.6 merge window

We can now probe devices with ti-sysc interconnect driver and dts
data, and can continue dropping the related platform data and custom
ti,hwmods dts property for various devices.

And related to that, we finally can remove the legacy sdma support in
favor of using the dmaengine driver only. I was planning to send the
sdma changes separately, but that would have produced a pile of
pointless merge conflicts, so I decided it's best to resolve it locally.
After all, the sdma series also ends up removing the related platform
data.

Note that this series is based on omap-for-v5.6/ti-sysc-dt-signed branch
as it depends for dts data being in place.

* tag 'omap-for-v5.6/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (56 commits)
  ARM: OMAP2+: Drop legacy platform data for sdma
  ARM: OMAP2+: Drop legacy init for sdma
  dmaengine: ti: omap-dma: Use cpu notifier to block idle for omap2
  dmaengine: ti: omap-dma: Allocate channels directly
  dmaengine: ti: omap-dma: Pass sdma auxdata to driver and use it
  dmaengine: ti: omap-dma: Configure global priority register directly
  ARM: OMAP5: hwmod-data: remove OMAP5 IOMMU hwmod data
  ARM: OMAP4: hwmod-data: remove OMAP4 IOMMU hwmod data
  ARM: OMAP2+: Drop legacy platform data for omap4 fdif
  ARM: OMAP2+: Drop legacy platform data for omap4 slimbus
  ARM: OMAP2+: Drop legacy platform data for omap5 kbd
  ARM: OMAP2+: Drop legacy platform data for omap4 kbd
  ARM: OMAP2+: Drop legacy platform data for dra7 smartreflex
  ARM: OMAP2+: Drop legacy platform data for omap4 smartreflex
  ARM: OMAP2+: Drop legacy platform data for omap4 hsi
  ARM: OMAP2+: Drop legacy platform data for am4 vpfe
  ARM: OMAP2+: Drop legacy platform data for dra7 ocp2scp
  ARM: OMAP2+: Drop legacy platform data for omap5 ocp2scp
  ARM: OMAP2+: Drop legacy platform data for omap4 ocp2scp
  ARM: OMAP2+: Drop legacy platform data for am4 ocp2scp
  ...

Link: https://lore.kernel.org/r/pull-1578420398-290837@atomide.com-4
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-07 11:25:28 -08:00
Olof Johansson
785ca50f8e Merge branch 'omap/soc' into arm/dt
Bringing in to resolve soc -> add/add conflicts locally

* omap/soc:
  ARM: OMAP2+: use separate IOMMU pdata to fix DRA7 IPU1 boot
  ARM: OMAP2+: omap-iommu.c conversion to ti-sysc
  ARM: OMAP2+: Add workaround for DRA7 DSP MStandby errata i879
  ARM: OMAP4+: remove pdata quirks for omap4+ iommus
  ARM: OMAP2+: pdata-quirks: add PRM data for reset support
  ARM: OMAP2+: am43xx: Add lcdc clockdomain
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-07 11:22:43 -08:00
Olof Johansson
8a6c3e88bb dts changes for omaps for ti-sysc driver for v5.6 merge window
Devicetree changes for omaps to configure more devices to probe with
 ti-sysc interconnect target module:
 
 - Configure am4 qspi
 
 - Configure aes, des and sham accelerators for am3, 4 and dra7
 
 - Configure iommus for omap4, 5 and dra7
 
 - Add a generic compatible for sdma, and configure omap2 and 3 sdma
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Merge tag 'omap-for-v5.6/ti-sysc-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

dts changes for omaps for ti-sysc driver for v5.6 merge window

Devicetree changes for omaps to configure more devices to probe with
ti-sysc interconnect target module:

- Configure am4 qspi

- Configure aes, des and sham accelerators for am3, 4 and dra7

- Configure iommus for omap4, 5 and dra7

- Add a generic compatible for sdma, and configure omap2 and 3 sdma

* tag 'omap-for-v5.6/ti-sysc-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (24 commits)
  ARM: dts: omap5: convert IOMMUs to use ti-sysc
  ARM: dts: omap4: convert IOMMUs to use ti-sysc
  ARM: dts: dra74x: convert IOMMUs to use ti-sysc
  ARM: dts: dra7: convert IOMMUs to use ti-sysc
  ARM: dts: Configure interconnect target module for dra7 des
  ARM: dts: Configure interconnect target module for am4 des
  ARM: dts: Configure interconnect target module for dra7 aes
  ARM: dts: Configure interconnect target module for am4 aes
  ARM: dts: Configure interconnect target module for am3 aes
  ARM: dts: Configure interconnect target module for dra7 sham
  ARM: dts: Configure interconnect target module for am4 sham
  ARM: dts: Configure interconnect target module for am3 sham
  ARM: dts: Configure interconnect target module for am4 qspi
  ARM: dts: Configure interconnect target module for omap3 sdma
  ARM: dts: Configure interconnect target module for omap2 sdma
  ARM: dts: Add generic compatible for omap sdma instances
  bus: ti-sysc: Fix iterating over clocks
  ARM: OMAP2+: Fix ti_sysc_find_one_clockdomain to check for to_clk_hw_omap
  bus: ti-sysc: Fix missing reset delay handling
  ARM: dts: am437x-gp/epos-evm: fix panel compatible
  ...

Link: https://lore.kernel.org/r/pull-1578420398-290837@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-07 11:16:52 -08:00
Olof Johansson
3f9c6a6d90 Devicetree changes for omaps for v5.6 merge window
Devicetree changes for omaps for v5.6 to configure more
 devices and update boards to use generic lcd panels:
 
 - Configure HDMI for dra76-evm and am57xx-idk
 
 - Correct node name for am3517 mdio
 
 - Convert am335x-evm, am335x-evmsk, and am335x-icev2 to use generic
   panels
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Merge tag 'omap-for-v5.6/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.6 merge window

Devicetree changes for omaps for v5.6 to configure more
devices and update boards to use generic lcd panels:

- Configure HDMI for dra76-evm and am57xx-idk

- Correct node name for am3517 mdio

- Convert am335x-evm, am335x-evmsk, and am335x-icev2 to use generic
  panels

* tag 'omap-for-v5.6/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x-icev2: Add support for OSD9616P0899-10 at i2c0
  ARM: dts: am335x-evmsk: Use drm simple-panel instead of tilcdc-panel
  ARM: dts: am335x-evm: Use drm simple-panel instead of tilcdc-panel
  ARM: dts: omap3: name mdio node properly
  ARM: dts: am57xx-idk-common: add HDMI to the common dtsi
  ARM: dts: dra76-evm: add HDMI output

Link: https://lore.kernel.org/r/pull-1578420398-290837@atomide.com-2
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-07 11:16:24 -08:00
Stephen Brennan
530735df62 ARM: dts: bcm2711: Enable HWRNG support
This enables hardware random number generator support for the BCM2711
on the Raspberry Pi 4 board.

Signed-off-by: Stephen Brennan <stephen@brennan.io>
Acked-by: Stefan Wahren <wahrenst@gmx.net>
[nsaenzjulienne@suse.de: remove unnecessary status="okay"]
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
2020-01-07 20:11:51 +01:00
Stephen Brennan
c4414cac85 ARM: dts: bcm2835: Move rng definition to common location
BCM2711 inherits from BCM283X, but has an incompatible HWRNG. Move this
node to bcm2835-common.dtsi, so that BCM2711 can define its own.

Signed-off-by: Stephen Brennan <stephen@brennan.io>
Acked-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
2020-01-07 20:11:51 +01:00
Rajeshwari
2552c123e8 arm64: dts: qcom: sc7180: Add critical interrupt and cooling maps for TSENS in SC7180
Added critical interrupt support in TSENS node and cooling maps in Thermal-zones node.

Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Rajeshwari <rkambl@codeaurora.org>
Link: https://lore.kernel.org/r/1578317369-16045-2-git-send-email-rkambl@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-06 21:39:03 -08:00
Chen-Yu Tsai
b71818cbda
arm64: dts: allwinner: sun50i-a64: Use macros for newly exported clocks
A few clocks from the CCU were exported later, and references to them in
the device tree were using raw numbers.

Now that the DT binding header changes are in as well, switch to the
macros for more clarity.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06 23:24:06 +01:00
Chen-Yu Tsai
765866edb1
ARM: dts: sunxi: Use macros for references to CCU clocks
A few clocks from the CCU were exported later, and references to them in
the device tree were using raw numbers.

Now that the DT binding header changes are in as well, switch to the
macros for more clarity.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06 23:24:05 +01:00
Chen-Yu Tsai
60d0426d76
arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board
The Libre Computer ALL-H5-CC board is an upgraded version of the
ALL-H3-CC. Changes include:

  - Gigabit Ethernet via external RTL8211E Ethernet PHY
  - 16 MiB SPI NOR flash memory
  - PoE tap header
  - Line out jack removed

Only H5 variant test samples were made available, and the vendor is not
certain whether other SoC variants would be made or not. Furthermore the
board is a minor upgrade compared to the ALL-H3-CC. Thus the device tree
simply includes the one for the ALL-H3-CC, and adds the changes on top.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06 23:24:05 +01:00
Andre Przywara
554581b791
ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes
The Allwinner R40 SoC contains four SPI controllers, using the newer
sun6i design (but at the legacy addresses).
The controller seems to be fully compatible to the A64 one, so no driver
changes are necessary.
The first three controllers can be used on two sets of pins, but SPI3 is
only routed to one set on Port A.
Only the pin groups for SPI0 on PortC and SPI1 on PortI are added here,
because those seem to be the only one exposed on the Bananapi boards.

Tested by connecting a SPI flash to a Bananapi M2 Berry SPI0 and SPI1
header pins.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06 23:24:05 +01:00
Olof Johansson
32d319c02d Merge branch 'mmp/hsic' into arm/dt
* mmp/hsic:
  ARM: dts: mmp3: Fix typos
2020-01-06 11:15:03 -08:00
Olof Johansson
e2ce979bf1 ARM: dts: mmp3: Fix typos
Fixes build failures due to syntax errors.

Fixes: 3240d5b872f2 ("ARM: dts: mmp3: Add HSIC controllers")
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 11:14:12 -08:00
Stanimir Varbanov
277a13b5f8 arm64: dts: qcom: msm8996: Fix venus iommu nodename error
Fix the following error/warn seen with make dtbs_check

arm,smmu-venus@d40000: $nodename:0: 'arm,smmu-venus@d40000' does not match '^iommu@[0-9a-f]*'
arm,smmu-venus@d40000: clock-names:0: 'bus' was expected
arm,smmu-venus@d40000: clock-names:1: 'iface' was expected

by rename nodename to "iommu".

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Link: https://lore.kernel.org/r/20200106102305.27059-1-stanimir.varbanov@linaro.org
[bjorn: Added padding of address to 8 digits]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-06 11:10:59 -08:00
Olof Johansson
4081b33559 Merge branch 'mmp/hsic' into arm/dt
* mmp/hsic:
  ARM: dts: mmp3-dell-ariel: Enable the HSIC
  ARM: dts: mmp3: Add HSIC controllers
  dt-bindings: phy: Add binding for marvell,mmp3-hsic-phy
  clk: mmp2: Add HSIC clocks
  dt-bindings: marvell,mmp2: Add clock ids for the HSIC clocks
  + Linux 5.5-rc2
2020-01-06 09:33:53 -08:00
Lubomir Rintel
0bc5f749bc ARM: dts: mmp3-dell-ariel: Enable the HSIC
There's a SMSC USB2640 (USB hub & SD controller) connected to it, but
the SD card slot footprint is unpopulated. Also connected to the hub is
a SMSC LAN7500 gigabit ethernet adapter.

Link: https://lore.kernel.org/r/20191220065314.237624-6-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:33:31 -08:00
Lubomir Rintel
3240d5b872 ARM: dts: mmp3: Add HSIC controllers
There are two on MMP3, along with the PHYs. The PHYs are made compatible
with the NOP transceiver, since there's no driver for the time being and
they're likely configured by the firmware.

Link: https://lore.kernel.org/r/20191220065314.237624-5-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:33:27 -08:00
Lubomir Rintel
f6f149604e dt-bindings: phy: Add binding for marvell,mmp3-hsic-phy
This is the PHY chip for USB HSIC on MMP3 platform.

Link: https://lore.kernel.org/r/20191220065314.237624-4-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:33:22 -08:00
Lubomir Rintel
be61795bbd clk: mmp2: Add HSIC clocks
There are two USB HSIC controllers on MMP2 and MMP3.

Link: https://lore.kernel.org/r/20191220065314.237624-3-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:33:18 -08:00
Lubomir Rintel
247aa9e4d2 dt-bindings: marvell,mmp2: Add clock ids for the HSIC clocks
There are two USB HSIC controllers on MMP2 and MMP3.

Link: https://lore.kernel.org/r/20191220065314.237624-2-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:33:12 -08:00
Olof Johansson
3b6930e824 Renesas DT binding updates for v5.6
- Document TMU and CAN(FD) support for R-Car RZ/G2N.
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Merge tag 'renesas-dt-bindings-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas DT binding updates for v5.6

  - Document TMU and CAN(FD) support for R-Car RZ/G2N.

* tag 'renesas-dt-bindings-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: can: rcar_canfd: document r8a774b1 support
  dt-bindings: can: rcar_can: document r8a774b1 support
  dt-bindings: timer: renesas: tmu: Document r8a774b1 bindings

Link: https://lore.kernel.org/r/20200106104857.8361-6-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:29:31 -08:00
Olof Johansson
8b004f1262 Renesas ARM64 DT updates for v5.6
- Remove now unused ARCH_R8A7796 config symbol,
   - Rename R-Car H3 and M3-W SoC, and ULCB board DTS files to increase
     naming consistency,
   - Miscellaneous fixes for issues detected by "make dtbs_check",
   - Enhance support for R-Car M3-W+,
   - Display support for the EK874 board,
   - Prepare for split of R-Car H3 ES1.x and ES2.0+ config symbols,
   - Minor fixes and improvements.
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Merge tag 'renesas-arm64-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM64 DT updates for v5.6

  - Remove now unused ARCH_R8A7796 config symbol,
  - Rename R-Car H3 and M3-W SoC, and ULCB board DTS files to increase
    naming consistency,
  - Miscellaneous fixes for issues detected by "make dtbs_check",
  - Enhance support for R-Car M3-W+,
  - Display support for the EK874 board,
  - Prepare for split of R-Car H3 ES1.x and ES2.0+ config symbols,
  - Minor fixes and improvements.

* tag 'renesas-arm64-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: Prepare for split of ARCH_R8A7795 into ARCH_R8A7795[01]
  arm64: dts: renesas: Sort DTBs in Makefile
  arm64: dts: renesas: Drop redundant SoC prefixes from ULCB DTS file names
  arm64: dts: renesas: Rename r8a7795{-es1,}* to r8a7795[01]*
  arm64: dts: renesas: Add EK874 board with idk-2121wr display support
  arm64: dts: renesas: r8a77961: Add SDHI nodes
  arm64: dts: renesas: r8a77961: Add I2C nodes
  arm64: dts: renesas: r8a77961: Add SYS-DMAC nodes
  arm64: dts: renesas: r8a77961: Add RAVB node
  arm64: dts: renesas: r8a77961: Add GPIO nodes
  arm64: dts: renesas: r8a77961: Add RWDT node
  arm64: dts: renesas: r8a77990: ebisu: Remove clkout-lr-synchronous from sound
  arm64: dts: renesas: r8a77970: Group tuples in thermal reg property
  arm64: dts: renesas: Group tuples in pci ranges and dma-ranges properties
  arm64: dts: renesas: Group tuples in interrupt properties
  arm64: dts: renesas: Group tuples in regulator-gpio states properties
  arm64: dts: renesas: Rename r8a7796* to r8a77960*
  arm64: dts: renesas: Remove use of ARCH_R8A7796

Link: https://lore.kernel.org/r/20200106104857.8361-4-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:28:57 -08:00
Olof Johansson
ec67108520 Renesas ARM DT updates for v5.6
- Touch screen support for the iwg20d board,
   - ARM global timer support on Cortex-A9 MPCore SoCs,
   - Miscellaneous fixes for issues detected by "make dtbs_check".
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Merge tag 'renesas-arm-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.6

  - Touch screen support for the iwg20d board,
  - ARM global timer support on Cortex-A9 MPCore SoCs,
  - Miscellaneous fixes for issues detected by "make dtbs_check".

* tag 'renesas-arm-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: sh73a0: Add missing clock-frequency for fixed clocks
  ARM: dts: r8a7778: Add missing clock-frequency for fixed clocks
  ARM: dts: rcar-gen2: Add missing mmio-sram bus properties
  ARM: dts: rcar-gen2: Fix PCI high address in interrupt-map-mask
  ARM: dts: renesas: Group tuples in pci ranges and dma-ranges properties
  ARM: dts: renesas: Group tuples in interrupt properties
  ARM: dts: renesas: Group tuples in regulator-gpio states properties
  ARM: dts: r8a7779: Add device node for ARM global timer
  ARM: dts: sh73a0: Add device node for ARM global timer
  ARM: dts: sh73a0: Rename twd clock to periph clock
  ARM: dts: iwg20d-q7-common: Add LCD support

Link: https://lore.kernel.org/r/20200106104857.8361-3-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:28:01 -08:00
Olof Johansson
0b0d715891 Support the Samsung GT-I8190/Golden phone:
- Proper include file for the AB8505 PMIC variant.
 - Add a DTS file for the GT-I8190/Golden
 - Extend the IMU, touch screen, WiFi and Bluetooth
   as separate patches.
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Merge tag 'ux500-armsoc-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt

Support the Samsung GT-I8190/Golden phone:

- Proper include file for the AB8505 PMIC variant.
- Add a DTS file for the GT-I8190/Golden
- Extend the IMU, touch screen, WiFi and Bluetooth
  as separate patches.

* tag 'ux500-armsoc-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: dts: ux500: samsung-golden: Add Bluetooth
  ARM: dts: ux500: samsung-golden: Add WiFi
  ARM: dts: ux500: samsung-golden: Add touch screen
  ARM: dts: ux500: samsung-golden: Add IMU (accelerometer + gyroscope)
  ARM: dts: ux500: Add device tree for Samsung Galaxy S III mini (GT-I8190)
  dt-bindings: arm: ux500: Document samsung,golden compatible
  ARM: dts: ux500: Add device tree include for AB8505
  ARM: dts: ux500: Remove unused ste-href-ab8505.dtsi

Link: https://lore.kernel.org/r/CACRpkdaN2Lv_rBEYNiyAarA81yea6Eky8w_htqZqdRng8S-DcA@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:22:27 -08:00
Chunyan Zhang
f1da5ea670 arm64: dts: Add Unisoc's SC9863A SoC support
Add basic DT to support Unisoc's SC9863A, with this patch,
the board sp9863a-1h10 can run into console.

Link: https://lore.kernel.org/r/20191223092948.24824-4-zhang.lyra@gmail.com
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 09:21:57 -08:00
Miquel Raynal
dbb6f77879 arm64: dts: rockchip: Add PX30 LVDS
Describe LVDS IP. Add the CRTC and LVDS relevant endpoints so they can
be linked together.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20191224143900.23567-12-miquel.raynal@bootlin.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-06 12:45:27 +01:00
Heiko Stuebner
cc5912ab43 arm64: dts: rockchip: add dsi controller for px30
This adds the dw-mipi-dsi controller and hooks it into the
display-subsystem on px30.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20200106112005.795834-1-heiko@sntech.de
2020-01-06 12:42:04 +01:00
Miquel Raynal
7e90ccec8c arm64: dts: rockchip: Add PX30 DSI DPHY
Add the PHY which outputs MIPI DSI and LVDS.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20191224143900.23567-11-miquel.raynal@bootlin.com
[added dsi power-domain, following vendor-kernel]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-06 12:38:46 +01:00