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This contains three patches that reintroduce symbolic identifiers for
clocks, resets and mailboxes. These had been converted to literals in
the v4.10 release to avoid complicated dependencies between branches.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAliLECQTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTa2EACD9/bu6s6tJopSAPBxKCI1voclTsXQ
du1TCe2PO6Vz4CFkmpCo8mAsAexr+pQ6b8yX/SVOr/8A5N1J7TtQTUfK7Mzggeh+
hI07xNDcE6LskOsEiLSApBpTwbCbpju7efIQWlnYByznfElnfLzuVUaXwezZTdG4
rdXl2tCJOAuHwaA0dhlgj3YerVnDADSqZGMAa8tfpp0tN3P1/H9k7Q8Ze8Xcm2ag
DZAo5XxL5XqcvEz1Rt8pTBHdtkGKeIO+3P6az2sCHMzqvB1Ejpa6sx6WIEQvJqxX
VuTX27fFepWhEHfQMktLobxYl9zfsP/XMzlAve4EDrtJMmNjZ3glPNOuoEzicgsQ
QpnYiF1HR/Q7BeZpGHDpSd3skTgtLvQZq9+CSQrOkXmhTnoHea5e1vHw6mR5Xi9V
jvitE7bLSW2cWxHZ51QNDygobF4Gqmk9DFuKBDv22QYqh2d67J5TqpSJ2xURDH58
GK5g32LAyoX8xehA1I+insyObKxe6QWOAg1Ukt1S0BgUHQhwBx/qh0ZVv0ktwcyF
fYcnJmvvAHiaYJvePoy0aBRN01JCnYwzbKlM+KjfT6juuSiPqaJNVErurTYc2Gfz
7/lT2EmhNbFnveflZGODpWTuygJZkmoGxADfyzP1D4U+6P35yaWVRTiGha4FWMEn
spltHyMXJ4tBpQ==
=eeee
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
arm64: tegra: Device tree changes for v4.11-rc1
This contains three patches that reintroduce symbolic identifiers for
clocks, resets and mailboxes. These had been converted to literals in
the v4.10 release to avoid complicated dependencies between branches.
* tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Use symbolic reset identifiers
arm64: tegra: Use symbolic clock identifiers
arm64: tegra: Use symbolic HSP identifiers
Signed-off-by: Olof Johansson <olof@lixom.net>
r8a779[56] SoCs:
* Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
- They are enabled as appropriate in board DT files
* Link ARM GIC to clock and clock domain on r8a779[56] SoCs
* Add thermal support
r8a7795 SoC:
* Tidyup audma definition order on r8a7795 SoC
* Add missing power-domains property for SATA
r8a7795/h3ulcb board:
* Add MIX/CTU support as per support present in DT for r8a7796
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYiw5mAAoJENfPZGlqN0++SqEP/3vqRuXgL0dxMPWzgTO0OW1h
G0POAg9AN0gNSS0dgA8yaUOJvphYcM8HGEbyCh8iE4sQ29fel55H4MW2Be2XB1RI
v08wcx2dr4N/FgbZdyw2VtVF7mmskpU+NEuQenpm3Pa2hYY9RuGdM84Fnk8o+Ks8
npyoijNMxLdfuhtWnkPl+CDAs3Ney5CRUlBM3nxz89w0s/nTigVUToVQv1m43VDk
KWK2+zrFQZNikodw1d3AwrFj9NtL7DakBY41vHHGh8UjEmgItd1ae//JHAlT9Y1J
KmY/2kBBiI0xqYZXVfXl1g04Fxy4Hx8p07sThS1+MzIeBsPX4+2U3zffWns3Y3DK
8ijF/lHbxo70ElYuwKX4HxNOeGgjh+ZF8nTzguqywgpVKIxot8FzLNi00wYji5in
/gxE8+OORGiegy40/J8423l2IleN/DiBe6IIA3JB8zgZf4N61DsYDNcnlXb71WTA
klPrNXTScE3IVbhK41HgkX38rJE3agF1jG3YIhWCUin8lvNw2UCX2ScsV8J6nksB
OUSlA1Ls2ABdgEoDGh6Q1coyowHnOX8o5LtP+fZNH7V+LuDL01oyeCLoEeppPE+K
Y3yygtZ8QeGEiBKWqb0/y2LvsPl/78BIImxIBDyokXFDQpb3fjBXT7dpH78dsSjU
UiI9ZpMJ/nna0LOF43Pu
=KG8o
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Second Round of Renesas ARM64 Based SoC DT Updates for v4.11
r8a779[56] SoCs:
* Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
- They are enabled as appropriate in board DT files
* Link ARM GIC to clock and clock domain on r8a779[56] SoCs
* Add thermal support
r8a7795 SoC:
* Tidyup audma definition order on r8a7795 SoC
* Add missing power-domains property for SATA
r8a7795/h3ulcb board:
* Add MIX/CTU support as per support present in DT for r8a7796
* tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7796: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: tidyup audma definition order
arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
arm64: dts: r8a7796: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add missing power-domains property for sata
arm64: dts: h3ulcb: follow sound CTU/MIX supports
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable the Cadence SD/SDIO/eMMC controller. This is used on
Socionext UniPhier SoC family.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add binding for Hi3660 SoC and HiKey960 Board
- Add binding for ARM Cortex-A73
- Add dts files for HiKey960 development board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYiNBNAAoJEAvIV27ZiWZcR4oQAJKZUqtZsOjKumrBU4wji/AS
le3PE8Ygy3O2lKsCtRhfeKkM9s1FVasvCbou3QsmbmKIKHCN3eS1PV1pJYEaINUD
MymbxkpG3jNnZkUXui/mzpDDsNSODXR7UkieKXfkVHtxkHJzFrBcRSqobQc71+/u
ACmiorYSqxZtABN0vGj00F4Jv9I7HneTNjBs591PF8dPQvzCIuL/duYyBAGQNWnR
hUseVgDa+DYm7nPWI30M+hjF4sL6oVvxODkubrB4Gfo+xzoXCoa2rT/qMrsDCuQJ
OHmSfaIMgvs76w7iCMBouwgemATv9/kHL470B3mEXaqUs7hxJrtNdDHR3ghks09b
1YKaO03DZJmRXe8Ym6Or/PWVPea9ZBMhptd4Coya8nEapR25XNXR90EQ2Sihh1O+
xTVZnLF7wVcEV61U+eEKaoUmQpf4bviO4EiaoSZvr9Qzdtsv4B3wPWKPDZIQg89D
49hSxtbP5RPWwX9K7Kn0ougV8USSPDkSpXgvUP50ynLab5dT4/uRbXZL65HThF2M
cJgd5nnlt/wZ5B4SA/P0sJp5T5QeZ0GsuENK5fmVAgpQMsGnbwGERPqBsj2Ds+8/
qVhoyp3PD3uqpN+bN0TsoU+VV3PUD5kV3v2cTV7OPQdaPvEiOVMV3b8aTv89jxvV
h09M1EtcPwk3Mo5NiGmF
=zJLi
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-for-4.11' of git://github.com/hisilicon/linux-hisi into next/dt64
ARM64: DT: Hisilicon SoC DT updates for 4.11
- Add binding for Hi3660 SoC and HiKey960 Board
- Add binding for ARM Cortex-A73
- Add dts files for HiKey960 development board
* tag 'hisi-arm64-dt-for-4.11' of git://github.com/hisilicon/linux-hisi:
arm64: dts: Add dts files for Hisilicon Hi3660 SoC
dt-bindings: Add a support cpu type for cortex-a73
document: dt: add binding for Hi3660 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
- set mm_sel clock to 400 MHz to support 4K HDMI
- adjust power efficiency between the little and big cores
- add a node for thermal calibration via e-fuse data
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAliIjQgXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00PWjg//WVJsbVGXUcHGHmSOTNGjdAYR
FB5ybdXDMyPhXLrUoY6xN0aCidXPTgv9gbLW37EWBlpGy+LAQN5ssMZMuEZeYJyb
xR8yKrU+bcgQlwQrn3F35nJx7Eoh8T47dW2+C0ftzQxl0ZQirkmm9QnMg3/7xQ89
LpA+Opqq3GkHG2Q2HTgpRqPaI3LZ/aZuWBtqhjxl0lYi+E2liA1cbvzIIeA3Uz+9
rR+vlfQEG4CW9GnHDaLtg4Ad68YNlTQ7kU1070uwlpELwPAOV0SgxL1q0IBwj1WB
FaTnfx5wFya8FZIPrnI+Dk1X1fDdkLZ16Cq+b3hBixiwLOs0XuLTAj/zMOoDLFcE
vcyfRgFVbYo3ju+iQAZ49vt+OwDLjrCEGxO8XONT2bUN+3MW6EB0rKQC/uhO4vp7
kEdJowUElvmDfnFqaAaWg8mrXzL+h/8y6SW1JT4pxTJpfXem3RnAiNywwrExdN5a
9bj7WhJtA9t39wXkmdIAVQbIkGLwrks1TXaGoDPuuj21+Jzm+3uGZL4EyQU6TUA1
jC04/5eBRVaA7JmU+/iegGdgaoyNs9PMhrjCUct6U3F2qvkRggAPnF9Eyj8stei6
+kzRjhAup8exKHYUXTxROutngW7K93RpbMtsIDiiib4mKm3HueVMJEY5cJPW/yap
4MttR/dH/W5PjTjkEVo=
=hboI
-----END PGP SIGNATURE-----
Merge tag 'v4.10-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt64
For mt8173:
- set mm_sel clock to 400 MHz to support 4K HDMI
- adjust power efficiency between the little and big cores
- add a node for thermal calibration via e-fuse data
* tag 'v4.10-next-dts' of https://github.com/mbgg/linux-mediatek:
arm64: dts: mt8173: add node for thermal calibration
arm64: dts: mt8173: Fix cpu_thermal cooling-maps contributions
arm64: dts: mt8173: add mmsel clocks for 4K support
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add Vol+ support for DB820C and APQ8016
* Add HDMI audio support for APQ8016
* Fix DB820C GPIO pinctrl name
* Enable WCNSS on MSM8916
* Add SCM node for MSM8996
* Use fixed XO clock on MSM8916
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYhvUBAAoJEFKiBbHx2RXVqnQQAK4xkBNoswr+afRkqOrEWZlc
Ed1lotQ3gA202Q8iddMtmRgb2BjBRe9bH01mPA5MlB+/1TpmdT9dm6oNXN31DJbn
L//om+669nzgPg2NhQAGfxfE97VzUTIksuVw1piCXK3eLlQCbccwifxITONbo+5Q
7818h2sb306sMet0LI+UkjLzJeU1dL1F6EKusErZatWBWuKMz3bFs/Ch0KUC1GRR
e7AU8i9f+jy2BSQFSOZbYkeInWvhee5IIp6dZMW0nINnaoVXafchvQzfkbi6t+Os
qv2nQUMco4ZlU9KbTWcNZQ0SlyVWLE9h2Khc8QF3uy9G6RxU8nSy25Mwi57enz3B
O+ousFAd79yUYyLZXA7OijAB+joSinl1OX6iFnq1H5Dx+XDRBXxmt97l5O0GanZn
CZQmGcdKMbbgV1nboM4NjUn2Nwn07EpaAbPPgsTJJBR519UV/TG82RE7TDbrxeUx
ABaylDX6rtgA+TdOP/wqqhEmEZ0xYko2TJBk6VqNfPAj/QVDS0lFbAzIjfqIM8q0
XyLIM+snIldu7qFgFwikUumFI7xVVghlmVJ0zPZEwKkLRZs0MJyt7TFPwDYmktXG
SDqq/E58YXFn4sbThFwGV3Ayaun4MjDHMTT1Xn95r+7O1WvLt3hu0LqW6b3AvqRO
/vNnTwmv0bwxV4fN6qs/
=UglA
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Qualcomm ARM64 Updates for v4.11
* Add Vol+ support for DB820C and APQ8016
* Add HDMI audio support for APQ8016
* Fix DB820C GPIO pinctrl name
* Enable WCNSS on MSM8916
* Add SCM node for MSM8996
* Use fixed XO clock on MSM8916
* tag 'qcom-arm64-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: db820c: add support to volume up key
arm64: dts: apq8016-sbc: Limit MPP4 high state to 1.8V
arm64: dts: apq8016-sbc: Add Volume Up key device node
arm64: dts: apq8016-sbc: add support to hdmi audio via adv7533
arm64: dts: db820c: fix gpio pinctrl name correctly
ARM: dts: msm8916: Add and enable wcnss node
arm64: dts: msm8996: Add SCM DT node
arm64: dts: qcom: msm8916: Use fixed factor xo clock
Signed-off-by: Olof Johansson <olof@lixom.net>
usb clocks, grf phandles for the rk3399 CRUs, epd pinctrl settings,
a phandle to the rk3399 tsadc and converting boards to use the
recently introduced pin constants.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAliBUMUQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgeszCAC0VNLtUhe6ksHGJzvgP1diZLPghPsKticu
tmpxFVJrZTYFmxacvO3w2rXNvwtWsay812m+wmpbCYe2rpE1WwRYEhDIVbQ0hIuD
I7fiG6wKaGVEu+5XmVi+6tGouGKSZA0zBlcOja4kFeBPsyDDL0SISu1iopfD/o0z
u/2EfcBRQFLUotLKLY8t//I+RJ4IsDMQ4zh1AJ1NDfUVCqthE7sJzoa8eJuHaKjj
YPKdfJlUIZAXJiXuDrjrkkbUQT0GuYha0CtWE2nUn4clfrIWivvgJCXFfEnKtM9+
OguqMChemOXL7SanHGKqM4RHL6Qq0F3Y162UODDX2AC3QYxxv8XK
=i0J0
-----END PGP SIGNATURE-----
Merge tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
64bit dts changes with some adjustments to the pcie controller,
usb clocks, grf phandles for the rk3399 CRUs, epd pinctrl settings,
a phandle to the rk3399 tsadc and converting boards to use the
recently introduced pin constants.
* tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add rockchip,grf property for RK3399 PMUCRU/CRU
arm64: dts: rockchip: add aspm-no-l0s for rk3399
arm64: dts: rockchip: add max-link-speed for rk3399
arm64: dts: rockchip: use pin constants to describe gpios
arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399
arm64: dts: rockchip: add rk3399 eDP HPD pinctrl
arm64: dts: rockchip: add rk3399 thermal_zones phandle
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the pwm_ao_b pin to allow boards which have an LED connected
to GPIOAO_9 to use the leds-pwm driver (by activating the pwm_AO_ab node
and passing the pwm_ao_b_pin pinctrl-reference).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
All Meson GX SoCs (GXBB, GXL and GXM) have a PWM controller within the
AO domain. When one of the board's LEDs is connected to one of the AO
PWM pins then this can be used to dim that LED (when the leds-pwm driver
is used).
Add the pwm_AO_ab to allow such devices to use the leds-pwm driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
If an EL0 instruction in the SYS class triggers an exception, do_sysintr
looks for a sys64_hook matching the instruction, and if none is found,
injects a SIGILL. This mirrors what we do for undefined instruction
encodings in do_undefinstr, where we look for an undef_hook matching the
instruction, and if none is found, inject a SIGILL.
Over time, new SYS instruction encodings may be allocated. Prior to
allocation, exceptions resulting from these would be handled by
do_undefinstr, whereas after allocation these may be handled by
do_sysintr.
To ensure that we have consistent behaviour if and when this happens, it
would be beneficial to have do_sysinstr fall back to do_undefinstr.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The Amlogic Meson GXBB/GXL/GXM secure monitor uses part of the memory space,
this patch adds these reserved zones.
Without such reserved memory zones, running the following stress command :
$ stress-ng --vm 16 --vm-bytes 128M --timeout 10s
multiple times:
Could lead to the following kernel crashes :
[ 46.937975] Bad mode in Error handler detected on CPU1, code 0xbf000000 -- SError
...
[ 47.058536] Internal error: Attempting to execute userspace memory: 8600000f [#3] PREEMPT SMP
...
Instead of the OOM killer.
Fixes: 4f24eda8401f ("ARM64: dts: Prepare configs for Amlogic Meson GXBaby")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
[khilman: added Fixes tag, added _reserved and unit addresses]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
OdroidC2 GbE link breaks under heavy tx transfer. This happens even if the
MAC does not enable Energy Efficient Ethernet (No Low Power state Idle on
the Tx path). The problem seems to come from the phy Rx path, entering the
LPI state.
Disabling EEE advertisement on the phy prevent this feature to be
negociated with the link partner and solve the issue.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Refactor the KVM code to use the __tlbi macros, which will allow an errata
workaround that repeats tlbi dsb sequences to only change one location.
This is not intended to change the generated assembly and comparing before
and after vmlinux objdump shows no functional changes.
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Define the MIDR implementer and part number field values for the Qualcomm
Datacenter Technologies Falkor processor version 1 in the usual manner.
Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
On ACPI based systems where the topology is setup using the API
store_cpu_topology, at the moment we do not have necessary code
to parse cpu capacity and handle cpufreq notifier, thus
resulting in a kernel panic.
Stack:
init_cpu_capacity_callback+0xb4/0x1c8
notifier_call_chain+0x5c/0xa0
__blocking_notifier_call_chain+0x58/0xa0
blocking_notifier_call_chain+0x3c/0x50
cpufreq_set_policy+0xe4/0x328
cpufreq_init_policy+0x80/0x100
cpufreq_online+0x418/0x710
cpufreq_add_dev+0x118/0x180
subsys_interface_register+0xa4/0xf8
cpufreq_register_driver+0x1c0/0x298
cppc_cpufreq_init+0xdc/0x1000 [cppc_cpufreq]
do_one_initcall+0x5c/0x168
do_init_module+0x64/0x1e4
load_module+0x130c/0x14d0
SyS_finit_module+0x108/0x120
el0_svc_naked+0x24/0x28
Fixes: 7202bde8b7ae ("arm64: parse cpu capacity-dmips-mhz from DT")
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Prashanth Prakash <pprakash@codeaurora.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Testing with an Armada 8040 board shows that adding the generic-ahci
compatible to the CP110 AHCI nodes gets us working AHCI on the board.
A previous patch series posted by Thomas Petazzoni was retracted when
it was realised that the IP was supposed to be, and is, compatible
with the standard register layout.
Add this compatible.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.
Fixes: 8e8b9eaef8fb05d9 ("arm64: dts: renesas: r8a7796: Add EthernetAVB instance")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.
Fixes: a92843c8a6f8c039 ("arm64: dts: r8a7795: add EthernetAVB device node")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
Because of this order, dma can connect to ipmmu, but
audma can't connect to it.
This patch moves audma order as ipmmu -> dma -> audma.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This went unnoticed as the sata_rcar driver doesn't support Runtime PM
yet, but manages module clocks manually.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Exynos5433 LPASS module requires some clocks for proper operation with
power domain.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
When bypassing SWIOTLB on small-memory systems, we need to avoid calling
into swiotlb_dma_mapping_error() in exactly the same way as we avoid
swiotlb_dma_supported(), because the former also relies on SWIOTLB state
being initialised.
Under the assumptions for which we skip SWIOTLB, dma_map_{single,page}()
will only ever return the DMA-offset-adjusted physical address of the
page passed in, thus we can report success unconditionally.
Fixes: b67a8b29df7e ("arm64: mm: only initialize swiotlb when necessary")
CC: stable@vger.kernel.org
CC: Jisheng Zhang <jszhang@marvell.com>
Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Fix warning:
"(COMPAT) selects COMPAT_BINFMT_ELF which has unmet direct dependencies
(COMPAT && BINFMT_ELF)"
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Memory regions marked as NOMAP should not be used for general allocation
by the kernel, and should not even be covered by the linear mapping
(hence the name). However, drivers or other subsystems (such as ACPI)
that access the firmware directly may legally access them, which means
it is also reasonable for such drivers to claim them by invoking
request_resource(). Currently, this is prevented by the fact that arm64's
request_standard_resources() marks reserved regions as IORESOURCE_BUSY.
So drop the IORESOURCE_BUSY flag from these requests.
Reported-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
If CONFIG_DEBUG_VIRTUAL=y and CONFIG_ARM64_SW_TTBR0_PAN=y:
virt_to_phys used for non-linear address: ffffff8008cc0000 (empty_zero_page+0x0/0x1000)
WARNING: CPU: 0 PID: 0 at arch/arm64/mm/physaddr.c:14 __virt_to_phys+0x28/0x60
...
[<ffffff800809abb4>] __virt_to_phys+0x28/0x60
[<ffffff8008a02600>] setup_arch+0x46c/0x4d4
Fixes: 2077be6783b5936c ("arm64: Use __pa_symbol for kernel symbols")
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Will Deacon <will.deacon@arm.com>
All dts files for the sunxi platform have been switched to the generic
pinconf bindings. As a result, the sunxi specific pinctrl macros are
no longer used.
Remove the #include entry with the following command:
sed -i -e '/pinctrl\/sun4i-a10.h/D' \
arch/arm64/boot/dts/allwinner/*.dts?
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add initial dtsi file to support Hisilicon Hi3660 SoC with
support of Octal core CPUs in two clusters(4 * A53 & 4 * A73).
Also add dts file to support HiKey960 development board which
based on Hi3660 SoC.
The output console is earlycon "earlycon=pl011,0xfdf05000".
And the con_init uart5 with a fixed clock, which already
configured at bootloader.
When clock is available, the uart5 will be modified.
Tested on HiKey960 Board.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add a file to debugfs to read the in-kernel state of the vgic. We don't
do any locking of the entire VGIC state while traversing all the IRQs,
so if the VM is running the user/developer may not see a quiesced state,
but should take care to pause the VM using facilities in user space for
that purpose.
We also don't support LPIs yet, but they can be added easily if needed.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
LDO7 regulator beside DSI and HDMI provides power for core blocks in Exynos
5433 SoC. Disabling it causes serious current leak - about 200mA.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Introduce a new architecture-specific get_arch_dma_ops() function
that takes a struct bus_type * argument. Add get_dma_ops() in
<linux/dma-mapping.h>.
Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Juergen Gross <jgross@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Russell King <linux@armlinux.org.uk>
Cc: x86@kernel.org
Signed-off-by: Doug Ledford <dledford@redhat.com>
Some but not all architectures provide set_dma_ops(). Move dma_ops
from struct dev_archdata into struct device such that it becomes
possible on all architectures to configure dma_ops per device.
Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Juergen Gross <jgross@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Russell King <linux@armlinux.org.uk>
Cc: x86@kernel.org
Signed-off-by: Doug Ledford <dledford@redhat.com>
Since the GXL family has S905X and S905D SoCs, we're keeping the SoC
name in the DTS filename for clarity. Rename this file accordingly to
be consistent with the rest of the GXL DTS files.
Cc: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Adds support for the WeTek Hub and Play2 boards.
The Hub is an extremely small IPTv Set-Top-Box and the Play2 is a more
traditionnal Satellite or Terrestrial and IPTv Set-Top-Box.
Both are based on the p200 Reference Design and out-of-tree support is
based on LibreELEC kernel at [1].
[1] https://github.com/wetek-enigma/linux-amlogic
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Ultra HD modes requires clock ticking at increased rate.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The arm64 DMA-mapping implementation sets the DMA ops to the IOMMU DMA
ops if we detect that an IOMMU is present for the master and the DMA
ranges are valid.
In the case when the IOMMU domain for the device is not of type
IOMMU_DOMAIN_DMA, then we have no business swizzling the ops, since
we're not in control of the underlying address space. This patch leaves
the DMA ops alone for masters attached to non-DMA IOMMU domains.
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Update the ARMv8 Crypto Extensions and the plain NEON AES implementations
in CBC and CTR modes to return the next IV back to the skcipher API client.
This is necessary for chaining to work correctly.
Note that for CTR, this is only done if the request is a round multiple of
the block size, since otherwise, chaining is impossible anyway.
Cc: <stable@vger.kernel.org> # v3.16+
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The LD11 SoC is equipped with SD-ctrl (0x59810000) as well as
MIO-ctrl (0x5b3e0000). The SD-ctrl block on this SoC has just
one register for controlling RST_n pin of the eMMC device.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
As per Exynos7 datasheet FSYS1 pinctrl block does not support drive
strength value of 0x3. This patch fixes this and update the correct
drive strength for sd0_xxx pin definitions.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
ARM:
- Fix for timer setup on VHE machines
- Drop spurious warning when the timer races against the vcpu running
again
- Prevent a vgic deadlock when the initialization fails (for stable)
s390:
- Fix a kernel memory exposure (for stable)
x86:
- Fix exception injection when hypercall instruction cannot be patched
-----BEGIN PGP SIGNATURE-----
iQEcBAABCAAGBQJYglwIAAoJEED/6hsPKofoZp0H+gLLEeKP0Mu+olXiOWjB/KFp
WBDAR1872xIjvEcOl9l6AZgdmp2hk7KW1t+kJj5npgu237v6fHBO9ybqrAfhfU4l
PH23zOebL15HINcwCK6OcxOTiOtgae5Nui1cnLJBHDQgPTC/VmIE8NgV/qrMyo2r
Vth+K/cBLKiWG9JhyQvxmrfupNJUknLSH7CTnlO/fC8GEJzDfMpUl7B1Ui0TGK53
ExVgVLg3F28SErj9bUU8y4VJhMrwDAf2Kx2BNHqDbzXMzTdp0LrGRymFLl2/Gxez
zLtZDfGYYzEhPp1NuDydlxLb8ymnsQNB7K6Kau0w9JoAvOYwfUYfDt+GaTegwYM=
=dPtS
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Radim Krčmář:
"ARM:
- Fix for timer setup on VHE machines
- Drop spurious warning when the timer races against the vcpu running
again
- Prevent a vgic deadlock when the initialization fails (for stable)
s390:
- Fix a kernel memory exposure (for stable)
x86:
- Fix exception injection when hypercall instruction cannot be
patched"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: s390: do not expose random data via facility bitmap
KVM: x86: fix fixing of hypercalls
KVM: arm/arm64: vgic: Fix deadlock on error handling
KVM: arm64: Access CNTHCTL_EL2 bit fields correctly on VHE systems
KVM: arm/arm64: Fix occasional warning from the timer work function
