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Group soc specific data in a global struct instead of repeating it for each
call to imxXX_add_flexcanX. The structs holding the actual data are placed
in .init.constdata and so don't do much harm. Compared to the previous
approach this reduces code size to call imx_add_flexcan.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Currently there is no platform data used in the driver. In case this
changes and for consistency NULL is passed unused to the soc specific
functions.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Currently there is no platform data used in the driver. In case this
changes NULL is passed unused to the soc specific functions.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for
static per-SoC mappings. The few mappings of whole chip selects are
moved accordingly.
The now wrong defines for virtual base addresses are removed.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This allows changing the mapping without the need to adapt all users.
While at it remove some unneeded casts to void __iomem *, this is already
taken care for in the IO_ADDRESS macros
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This makes less code rely on the virtual constants.
To further simplify code and reduce the needed boilerplate when
defining the static mappings a new helper macro is defined in
mach/hardware.h.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This makes it more assembler friendly and allows it to be used in situation
that need an unsigned long and not a pointer. Also the naming is
clearer. IOMEM is introduced without IMX_ prefix as it is used this way
in more than one ARM subarch and it might become globally available
soon.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits)
ARM: memblock: setup lowmem mappings using memblock
ARM: memblock: move meminfo into find_limits directly
ARM: memblock: convert free_highpages() to use memblock
ARM: move freeing of highmem pages out of mem_init()
ARM: memblock: convert memory detail printing to use memblock
ARM: memblock: use memblock to free memory into arm_bootmem_init()
ARM: memblock: use memblock when initializing memory allocators
ARM: ensure membank array is always sorted
ARM: 6466/1: implement flush_icache_all for the rest of the CPUs
ARM: 6464/2: fix spinlock recursion in adjust_pte()
ARM: fix memblock breakage
ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type
ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt
ARM: 6449/1: Fix for compiler warning of uninitialized variable.
ARM: 6445/1: fixup TCM memory types
ARM: imx: Add wake functionality to GPIO
ARM: mx5: Add gpio-keys to mx51 babbage board
ARM: imx: Add gpio-keys to plat-mxc
mx31_3ds: Fix spi registration
mx31_3ds: Fix the logic for detecting the debug board
...
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (48 commits)
DMAENGINE: move COH901318 to arch_initcall
dma: imx-dma: fix signedness bug
dma/timberdale: simplify conditional
ste_dma40: remove channel_type
ste_dma40: remove enum for endianess
ste_dma40: remove TIM_FOR_LINK option
ste_dma40: move mode_opt to separate config
ste_dma40: move channel mode to a separate field
ste_dma40: move priority to separate field
ste_dma40: add variable to indicate valid dma_cfg
async_tx: make async_tx channel switching opt-in
move async raid6 test to lib/Kconfig.debug
dmaengine: Add Freescale i.MX1/21/27 DMA driver
intel_mid_dma: change the slave interface
intel_mid_dma: fix the WARN_ONs
intel_mid_dma: Add sg list support to DMA driver
intel_mid_dma: Allow DMAC2 to share interrupt
intel_mid_dma: Allow IRQ sharing
intel_mid_dma: Add runtime PM support
DMAENGINE: define a dummy filter function for ste_dma40
...
Currently, only two operating points: 160Mhz and 800Mhz.
the operating points are tested on babbage 3.0
Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit c074512 (imx-esdhc: update devices registration) renamed
MX35_INT_MMC_SDHC2 to MX35_INT_ESDHC2 which broke expansion of the
MXC_INT_MMC_SDHC2 macro.
As (the only user of MXC_INT_MMC_SDHC2) is only used on
mx31 use the MX31 prefixed symbol to define its resources. Moreover to
reduce further confusion mxcsdhc_device0 is fixed accordingly and the MXC
prefixed symbols are removed.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.
This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.
Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.
Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
This is only a partial revert of "ARM: mx3/mx31ads: fold board
header in its only user"
[commit ccfa7c269843001077df02d98918c6c9bde91395)]
As some of the the board defines are also used in the cs89x0
ethernet driver by the i.MX31 ADS.
Signed-off-by: Ian Lartey <ian@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without this exiting WFI can result in cache corruption.
Code taken from Freescale's 2.6.27 BSP and tested on i.MX35
Signed-off-by: Eric Bénard <eric@eukrea.com>
this patch fix the following errors :
arch/arm/plat-mxc/devices/platform-imx-dma.c:44:
error: ‘MX25_SDMA_BASE_ADDR’ undeclared here (not in a function)
arch/arm/plat-mxc/devices/platform-imx-dma.c:44:
error: ‘MX25_INT_SDMA’ undeclared here (not in a function)
Signed-off-by: Eric Bénard <eric@eukrea.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Add IRAM(Internal RAM) allocation functions using GENERIC_ALLOCATOR.
The allocation size is 4KB multiples to guarantee alignment. The
idea for these functions is for i.MX platforms to use them
to dynamically allocate IRAM usage.
Applies on 2.6.36-rc7
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Reviewed-by: Amit Kucheria <amit.kucheria@canonical.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on work done earlier by Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Eric Bénard <eric@eukrea.com>
[ukl: actually squash the two approaches together]
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support for the Freescale i.MX SDMA engine.
The SDMA engine is a scatter/gather DMA engine which is implemented
as a seperate coprocessor. SDMA needs its own firmware which is
requested using the standard request_firmware mechanism. The firmware
has different entry points for each peripheral type, so drivers
have to pass the peripheral type to the DMA engine which in turn
picks the correct firmware entry point from a table contained in
the firmware image itself.
The original Freescale code also supports support for transfering
data to the internal SRAM which needs different entry points to
the firmware. Support for this is currently not implemented. Also,
support for the ASRC (asymmetric sample rate converter) is skipped.
I took a very simple approach to implement dmaengine support. Only
a single descriptor is statically assigned to a each channel. This
means that transfers can't be queued up but only a single transfer
is in progress. This simplifies implementation a lot and is sufficient
for the usual device/memory transfers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Linus Walleij <linus.ml.walleij@gmail.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Addiontionally make the interrupt #defines match the base address
defines MX.._NFC_BASE_ADDR.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On the imx51_3ds board, eCSPI2 is connected to a SPI NOR flash,
now add iomux definitions for those used pins.
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The driver recently learned to handle platform ids. Make use of this
new feature. The up side is that the driver needs less knowledge about
the spi interfaces used on different SoCs.
Acked-by: Jason Wang <jason77.wang@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
