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These bindings support the GPIO controllers found on the Qualcomm
Atheros AR7xxx/AR9XXX SoC.
Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The DDR controller of the ARxxx and AR9xxx families provides an
interface to flush the FIFO between various devices and the DDR.
This is mainly used by the IRQ controller to flush the FIFO before
running the interrupt handler of such devices.
Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add a binding document for the USB2.0 PHY found on the IMG Pistachio SoC.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: James Hartley <james.hartley@imgtec.com>
Cc: Damien Horsley <Damien.Horsley@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/9727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This contains the EMC clock driver that's been exhaustively reviewed and
tested. It also includes a change to the clock core that allows a clock
provider to perform low-level reparenting of clocks. This is required by
the EMC clock driver because the reparenting needs to be done at a very
specific point in time during the EMC frequency switch.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVU1EDAAoJEN0jrNd/PrOhYO8QAKDSJXdoVqtQITU3lUDfTB7i
g7EJfL8PjT5i1KTjJHT7/2FFuQlb7eeJexyNV539sIJtUrcDOl6qNVbq/FYNouia
bF7XqOxbR8QpWsYbQ46bzbwBaDd+CPLDwjSounNf6G4kJQy7/9SVr6BBPbLa2LIS
xzxMzr2+/CCmH9P1p2I5ey5f1fQ75DKaz8RGgv3FcltdkKNZQCTa+hthCOdicNJu
BoVHqXgJZvz0tgZk0zdCrKyUi31Gu8CNmFad7jtIS01EHGjBpgSE9m7ViYYRCFl5
GIjVh5IryCg2LJt8JP2mPCFNyiAvjxzMt/hJquzj2x2QMKrK8wgC3BwlrMUPuhkM
xkldCMXY1ImVgTbwFdAEFR08+/VybzfLu4FDZSdG4IeNKfMj0n3EirAX9gE1VHDl
bofkPZsE2Vr4N3jYekjbql3m9ZO8WsnIRz7D/Rd1OIqNyMA3xZQz79zgqQ5EQsB1
+GJztoyIdDikefCAww/z7I+vTTQ8InV/FnuzKN/SyqqLe5Ni9TFg6sCN50cnW2Ps
/wHE0KAEV6Oem0dNOISCd3cx231FAiCKQBSm0sUl0cAQ+x1E/NKs6H7vC0wrvWOo
f7072+BesVG9FPpWUg/lAD95YlPcoFdTDUep9J6mX2RB5ZfVEr9gNN04dY3tt4g2
kl37UB2qRXX0aEdkTWm2
=I0gO
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.2-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
clk: tegra: Changes for v4.2-rc1
This contains the EMC clock driver that's been exhaustively reviewed and
tested. It also includes a change to the clock core that allows a clock
provider to perform low-level reparenting of clocks. This is required by
the EMC clock driver because the reparenting needs to be done at a very
specific point in time during the EMC frequency switch.
unnoticed by me until recently, hence the late pull request.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVhCncAAoJEKI6nJvDJaTU+YUQAIPostZWwDMGWLcOWibg1168
aIhdrpvgS6eFshACYGQgLeyPsBd+UTRWvI0T48YPn3GWJxq/wfQU/41GKjHySlla
F95AtcJkG0HbqVetTZNtkVk003HMemoq20NC62gijiiK4pC4AEqyjGnziyhn02NT
Poz7wljr6G/pk26mKTTsx0e8v+7S9trSwwRVNopofjqZ2VGgYk/7Vp4rxM9PebuG
QNq5Ffy3E9dl9FisOLDl6KnVXBGOslRSx2Dt2liVLicXYodoFUIPq42LbTEVbsS4
C7Onnm3IOEOiT/nrYiN9xsZHd7jF+xJubvRxN1n3+Lb6FVcyMZGoZPKlwBr9WlLp
SEzU6V7fwN2t5JpzNYHzVXVYjzjTntAp1jQ0Q8945XyvMF4hHAvfDYX1BErfdVFB
YhX4yvC3y24GDw308xlwSxvwCIuItA5A3DE3AJj2WlKmvAg3FvlSW3odPATWFB4n
rg71u9iS1asBE1MYR2zg7HoAzQAwZuNhctAk+DrFkafQIoWxzLm+RWgsPDF69yEn
BtVjMAR0Cs+7AoI4cweN/W5Ik/p171KIYDsTawc7y9hEiAM2dvzWOfq/CS0OEGFA
SAGPeVPRVyfcvv0qVr2REkWBiW5JtfpSeYNMldOTEJLCd8QhSPkurZJ6rEIYIDYM
atDouBGRYTrzhLGnmALi
=0Lhn
-----END PGP SIGNATURE-----
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Michael Turquette:
"Very late clk regression fixes for the ARM-based AT91 platform.
These went unnoticed by me until recently, hence the late pull
request"
* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: at91: fix h32mx prototype inclusion in pmc header
clk: at91: trivial: typo in peripheral clock description
clk: at91: fix PERIPHERAL_MAX_SHIFT definition
clk: at91: pll: fix input range validity check
Add DT bindings documentation for the new marvell-cesa driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
We are about to add a new driver to support new features like using the
TDMA engine to offload the CPU.
Orion, Dove and Kirkwood platforms are already using the mv_cesa driver,
but Orion SoCs do not embed the TDMA engine, which means we will have to
differentiate them if we want to get TDMA support on Dove and Kirkwood.
In the other hand, the migration from the old driver to the new one is not
something all people are willing to do without first auditing the new
driver.
Hence we have to support the new compatible in the mv_cesa driver so that
new platforms with updated DTs can still attach their crypto engine device
to this driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The mv_cesa driver currently expects the SRAM memory region to be passed
as a platform device resource.
This approach implies two drawbacks:
- the DT representation is wrong
- the only one that can access the SRAM is the crypto engine
The last point is particularly annoying in some cases: for example on
armada 370, a small region of the crypto SRAM is used to implement the
cpuidle, which means you would not be able to enable both cpuidle and the
CESA driver.
To address that problem, we explicitly define the SRAM device in the DT
and then reference the sram node from the crypto engine node.
Also note that the old way of retrieving the SRAM memory region is still
supported, or in other words, backward compatibility is preserved.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
On Dove platforms, the crypto engine requires a clock. Document this
clocks property in the mv_cesa bindings doc.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Merge the mvebu/drivers branch of the arm-soc tree which contains
just a single patch bfa1ce5f38938cc9e6c7f2d1011f88eba2b9e2b2 ("bus:
mvebu-mbus: add mv_mbus_dram_info_nooverlap()") that happens to be
a prerequisite of the new marvell/cesa crypto driver.
Earlycon calculates UART clock as "BASE_BAUD * 16". In case of ARC
"BASE_BAUD" is calculated dynamically in runtime, basically it is an
alias to arc_early_base_baud(), which in turn just does
"arc_base_baud/16".
8250 UART on AXS/SDP board uses 33.3MHz clock source which is set in
"arc_base_baud" with this change.
Additional compatibility string "snps,arc-sdp" is introduced as well
because there're different flavours of AXS boards but they all share the
same motherboard and so it's possible to re-use the same code for
motherbord even if CPU daughterboard changes.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
The AXS10x platforms consist of a mainboard with peripherals,
on which several daughter cards can be placed. The daughter cards
typically contain a CPU and memory.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Freescale updates from Scott:
"Highlights include more 8xx optimizations, an e6500 hugetlb optimization,
QMan device tree nodes, t1024/t1023 support, and various fixes and
cleanup."
This patch changes the syscall handler to doom (tabort) active
transactions when a syscall is made and return very early without
performing the syscall and keeping side effects to a minimum (no CPU
accounting or system call tracing is performed). Also included is a
new HWCAP2 bit, PPC_FEATURE2_HTM_NOSC, to indicate this
behaviour to userspace.
Currently, the system call instruction automatically suspends an
active transaction which causes side effects to persist when an active
transaction fails.
This does change the kernel's behaviour, but in a way that was
documented as unsupported. It doesn't reduce functionality as
syscalls will still be performed after tsuspend; it just requires that
the transaction be explicitly suspended. It also provides a
consistent interface and makes the behaviour of user code
substantially the same across powerpc and platforms that do not
support suspended transactions (e.g. x86 and s390).
Performance measurements using
http://ozlabs.org/~anton/junkcode/null_syscall.c indicate the cost of
a normal (non-aborted) system call increases by about 0.25%.
Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* pm-sleep:
PM / sleep: trace_device_pm_callback coverage in dpm_prepare/complete
PM / wakeup: add a dummy wakeup_source to record statistics
PM / sleep: Make suspend-to-idle-specific code depend on CONFIG_SUSPEND
PM / sleep: Return -EBUSY from suspend_enter() on wakeup detection
PM / tick: Add tracepoints for suspend-to-idle diagnostics
PM / sleep: Fix symbol name in a comment in kernel/power/main.c
leds / PM: fix hibernation on arm when gpio-led used with CPU led trigger
ARM: omap-device: use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
bus: omap_l3_noc: add missed callbacks for suspend-to-disk
PM / sleep: Add macro to define common noirq system PM callbacks
PM / sleep: Refine diagnostic messages in enter_state()
PM / wakeup: validate wakeup source before activating it.
* pm-runtime:
PM / Runtime: Update last_busy in rpm_resume
PM / runtime: add note about re-calling in during device probe()
* pm-cpufreq: (37 commits)
cpufreq: dt: allow driver to boot automatically
intel_pstate: Fix overflow in busy_scaled due to long delay
cpufreq: qoriq: optimize the CPU frequency switching time
cpufreq: gx-suspmod: Fix two typos in two comments
cpufreq: nforce2: Fix typo in comment to function nforce2_init()
cpufreq: governor: Serialize governor callbacks
cpufreq: governor: split cpufreq_governor_dbs()
cpufreq: governor: register notifier from cs_init()
cpufreq: Remove cpufreq_update_policy()
cpufreq: Restart governor as soon as possible
cpufreq: Call cpufreq_policy_put_kobj() from cpufreq_policy_free()
cpufreq: Initialize policy->kobj while allocating policy
cpufreq: Stop migrating sysfs files on hotplug
cpufreq: Don't allow updating inactive policies from sysfs
intel_pstate: Force setting target pstate when required
intel_pstate: change some inconsistent debug information
cpufreq: Track cpu managing sysfs kobjects separately
cpufreq: Fix for typos in two comments
cpufreq: Mark policy->governor = NULL for inactive policies
cpufreq: Manage governor usage history with 'policy->last_governor'
...
ACPI device ID arrays normally don't need to be written to as they're
only ever read. The common usage -- embedding pointers to acpi_device_id
arrays in other data structures -- reference them as 'const', e.g. as in
struct acpi_driver / acpi_scan_handler / device_driver. The matchers are
taking const pointers, too. So it's only natural, to propose using const
arrays. Change the documentation accordingly.
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Document how the ACPI device enumeration code uses the special
PRP0001 device ID.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Add DT binding documentation for lpc1850-cgu driver.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Main PLL controller has post divider bits in a separate register in
pll controller. Use the value from this register instead of fixed
divider when available.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
One error fix, and one patch to add support for the USB clock found on the
Allwinner A23 and A33
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVfdWlAAoJEBx+YmzsjxAgijIP/1j0EcaRZOaEkLWDOSSQ4av5
jH/NrMhpnYJRHPgVZg9KgcF8znOIQdutxy67ScpMHpQ2x+1yw7qZ+ET4Y6hCTz0g
Z1jUYgwuf1yu0j18VZ7SJQhIWjsOLlOyOyXwzwEUEfJe0p/+h1msQNfW2wqZvvBf
ognuEDCduhz2JxmE8Jmcm4RlrVFntcaUilv/abW/oEsWWbPBU6oAt5YkQuCGmxvC
oxeyK0UiUAzEh6nq0XoSz6tATAFjo1yLefrH0GlTZUeg4GmUbPmrvKmSRQFOWDnB
drWDl/HKWehW/EcK8YcUhhfYJk5NFyYHxYDODHD91xAj1iGAvPO8mmLn0Wl75Tkn
oAI/qyUL7brNRpDW4NirAP0+AIgsD6YrAxbZof811+FlJ0WZ9M4i+hIIzzgq31gL
Tw5qSSQ730VtJQfgNlDFL6mHxqKM7s/UzHJbIZirEs4FFHEYvOLdOfHqv7ACDAif
goYN4M40htseU80rYOfZFrbaNta13Eh7Lqdmi5mat7OJNvhcONbxe9P3kc4BTGbc
VRydPObMJzIdRFxJEp3Gu+D/NLSHyJ7O3WwH6OxTQBwnASMMfOutPycdbMZoZXc1
2NQPQq6xhwFIZI2G1uD45Dnt3qX8qQqeLce8UItLIlHZGN3c6hjerQ/+Y+gR4BKY
TA15OfxbP/ZgP31xgYC0
=uxrz
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clocks-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Allwinner clocks additions for 4.2
One error fix, and one patch to add support for the USB clock found on the
Allwinner A23 and A33
Remove old Cygnus dummy clock binding document, as it's replaced by
Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Document the device tree binding for Broadcom iProc architecture based
clock controller
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Add sama5d2 support to irq-atmel-aic5.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Boris BREZILLON <boris.brezillon@free-electrons.com>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Ludovic Desroches <ludovic.desroches@atmel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: <linux-arm-kernel@lists.infradead.org>
Link: http://lkml.kernel.org/r/1434632855-27272-1-git-send-email-nicolas.ferre@atmel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This contains fixes for the long-standing build issues that some of the
bridge drivers were exposing. Other than that it's mostly cleanup and a
couple of new simple panels that are supported.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVevAhAAoJEN0jrNd/PrOhuokQAL/sac6eVn1KSH0e1oYR9dib
4qdwP3YwO0C5KyqMcN5LCYUXuAsiSIUuEdhsXvvCiFIwuZfkZwBe+oA9rm0NzFBG
45fgICpPq93Cwt1PKU0ELDpkgJqog7FV91tMpZosTTJbCe1E1KYxSO5TkS/XAaoq
wrb+M0hWxybHscSD+rdoqNPfC7sFS3UTxCaXE6CkUGSVZ9desGp7iwmWVxBsSuow
t7PUyjz02+sPgkaBaVzEk3ynJ52GQz+GB0lbmDkrUd0t7wVV9GY/si7GTsH+4olX
6jPJDJZoshH97FFYsz7QGLC3owiuGaEOApSaI/vkGShLNVz+LFPQQQVENRwxqxr3
GOR6OzElfQyuBCRWNFo1owPTqVPT4S/eiLYD3IFoDlxOteiNB/yVnDYZKcK6tISX
A/S1uXzX26xxf6SOxe+PcoM+7Q/EFU9iG0xLPaEBgs0ly0pfWuyWhOCmhoqKzYqa
ZkkKbKsRc5gZGEArZD3WaHx7SND6ahiKYR6mTzzflhDrHDj2PUNc7Knw2BxgJg12
UxF3tPmL10zA8I/2dektfm1W0nWwtieQEUNpi5PsWMjNWpL9U3MWKVuEKHGZfY4M
gONC6K4lOLWwF02kSYuKXYoCwvHtgSYopw5O+Cr285h50ZYP3D0ylhL3PuF5PDYW
dpRANnj0z4YJG5wRgiNN
=4rJg
-----END PGP SIGNATURE-----
Merge tag 'drm/panel/for-4.2-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/panel: Changes for v4.2-rc1
This contains fixes for the long-standing build issues that some of the
bridge drivers were exposing. Other than that it's mostly cleanup and a
couple of new simple panels that are supported.
* tag 'drm/panel/for-4.2-rc1' of git://anongit.freedesktop.org/tegra/linux:
drm/panel: simple: Add bus format for HannStar HSD100PXN1
drm/panel: simple: Add display timing for HannStar HSD100PXN1
drm/panel: ld9040: Remove useless padding
drm/panel: Constify OF match tables
drm/bridge: Remove stale ptn3460.h include
drm/bridge: ps8622: Include linux/gpio/consumer.h
drm/bridge: ptn3460: Include linux/gpio/consumer.h
drm/bridge: dw-hdmi: Return number of EDID modes
drm/panel: simple: Add support for LG LB070WV8 800x480 7" panel
drm/bridge: ptn3460: Pass flags to devm_gpiod_get()
drm/bridge: ps8622: Pass flags to devm_gpiod_get()
drm/bridge: ptn3460: Fix I2C ID table to match the reported modalias
drm/bridge: dw-hdmi: Staticize dw_hdmi_bridge_funcs
Add documentation about acking the transfers, and their
reusability.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Add an option to dm statistics to collect and report a histogram of
IO latencies.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
Make it possible to use precise timestamps with nanosecond granularity
in dm statistics.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>