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Author SHA1 Message Date
Jane Jian
63127922e1 drm/amdgpu/vcn: Add MMSCH v4_0 support for sriov 
These structures are basically ported from MMSCH v3_0,
besides, added RB and RB4 enablement flag to support
unified queue

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jane Jian <Jane.Jian@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:12:14 -04:00