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qup-i2c devices on sc7180 are clocked with a fixed clock (19.2 MHz)
Though qup-i2c does not support DVFS, it still needs to vote for a
performance state on 'CX' to satisfy the 19.2 Mhz clock frequency
requirement.
Use 'required-opps' to pass this information from
device tree, and also add the power-domains property to specify
the CX power-domain.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The Traverse Technologies Ten64 is a Mini-ITX form factor
networking board using the NXP LS1088A SoC.
This device tree only describes features which the mainline
kernel currently has support for, such as some I2C-connected
devices that are not described at present.
System documentation may be found at ten64doc.traverse.com.au
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> # for the MAC/PHY
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Performance Manager Unit was not described in the DTS
which meant performance event monitoring was not possible.
This was exposed by a change to the PMU handling in KVM
in 5.11-rc3 which now prevents a PMU being exposed to a
guest when the host does not provide one:
"KVM: arm64: Don't access PMCR_EL0 when no PMU is available"
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
A previous patch added the PCS for DPMAC2 only, as
used for the AQR PHY on the LS1088ARDB.
DPMAC1 PCS access is required for PHYLINK SFP support
on the Traverse Ten64 board.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds sound support to the Reform2.
It differs from the downstream implementation in that the codec
is used as the BCLK and FSYNC master and the i.MX8MQ only supplies
a fixed 25MHz MCLK from the oscillator. This allows to support
a wider range of audio rates by using the codec PLL and to shut
down the audio PLLs on the i.MX8MQ SoC side.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX8QXP features four Cortex-A35 cores, use more accurate
compatible.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX8MM features four Cortex-A53 cores, update the compatible
to use more accurate "arm,cortex-a53-pmu"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The USB hub has it's reset as GPIO4_IO17 but can be sub-loaded and
VBUS provided by a VBUS regulator with GPIO4_IO2 as the enable and
GPIO1_IO15 as the active-low over-current.
Enable pull-up for GPIO4_IO17 to keep hub out of reset and move VBUS
enable to GPIO4_IO2. Additionally enable pull-up on GPIO1_IO15 so that
if the hub is loaded it never over-currents.
This allows USB to work in both configurations without a device-tree
change.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW71xx has a USB Type-C connector with USB 2.0 signaling. GPIO1_12
is the power-enable to the TPS25821 Source controller and power switch
responsible for monitoring the CC pins and enabling VBUS. Therefore
GPIO1_12 must always be enabled and the vbus output enable from the
IMX8MM can be ignored.
To fix USB OTG VBUS enable a pull-up on GPIO1_12 to always power the
TPS25821 and change the regulator output to GPIO1_10 which is
unconnected.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW700x PMIC does not have an interrupt. Remove the invalid pin
config.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Describe the 2 available CSI interfaces on the i.MX8MQ with the MIPI-CSI2
receiver (new driver) and the CSI Bridge that provides the user buffers
(existing driver).
An image sensor is to be connected to the MIPIs' second port, to be described
in board files.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX8 MPlus SoC integrates Cadence HIFI4 DSP. This core runs either a
custom firmware or the open source SOF firmware [1]
DSP device is handled by SOF OF driver found in
sound/soc/sof/sof-of-dev.c
Notice that the DSP node makes use of:
- dsp_reserved, a reserved memory region for various Audio
resources (e.g firmware loading, audio buffers, etc).
- Messaging Unit (mu2) for passing notifications betweem ARM
core and DSP.
[1] https://thesofproject.github.io/latest/platforms/index.html
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Unnecessary blank lines do NOT help readability, so remove them.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following dtc build warning is seen with W=1:
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts:291.14-397.4: Warning (avoid_unnecessary_addr_size): /soc@0/bus@30800000/i2c@30a20000/gsc@20: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Remove the unnecessary #address-cells/#size-cells to fix it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix the following warnings reported by checkpatch:
arch/..../imx8qxp-ai_ml.dts:198: WARNING: please, no space before tabs
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Describe the IRQs for both the QSGMII PHYs and the 10GBASE-R PHY found
on the LS1088ARDB board.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Update the DTS nodes corresponding to the 4 10GBASE-R PHYs to describe
their IRQ lines.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Update the DTS nodes for both the AR8035 and the AQR107 PHYs in order to
describe their IRQ lines.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The documented compatible string for the CPUs found on Tegra132 is
"nvidia,tegra132-denver", rather than the previously used compatible
string "nvidia,denver".
Signed-off-by: Thierry Reding <treding@nvidia.com>
When the driver is registered, it produces a warning when
registering the PCI bridge:
[ 5.363450] pci_bus 0000:00: root bus resource [bus 00-01]
[ 5.396998] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-01] (conflicts with (null) [bus 00-01])
[ 5.284831] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
The reason is that the bus-range is wrong. Address it.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
1. Add CPU topology and cache information to Exynos DTSI files.
2. Correct GIC CPU interfaces address range on Exynos7.
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Merge tag 'samsung-dt64-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.15
1. Add CPU topology and cache information to Exynos DTSI files.
2. Correct GIC CPU interfaces address range on Exynos7.
* tag 'samsung-dt64-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: correct GIC CPU interfaces address range on Exynos7
arm64: dts: exynos: add CPU topology to Exynos5433
arm64: dts: exynos: Add cpu cache information to Exynos5433
arm64: dts: exynos: Add cpu cache information to Exynos7
Link: https://lore.kernel.org/r/20210811085128.30103-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add regulator for MFG_ASYNC power domain
- Use alias for MMC to get fixed numbers
MT8183:
- Use alia for MMC to get fixed numbers
- Add optional event number for Global Comman Engine
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Merge tag 'v5.14-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
MT8173:
- Add regulator for MFG_ASYNC power domain
- Use alias for MMC to get fixed numbers
MT8183:
- Use alia for MMC to get fixed numbers
- Add optional event number for Global Comman Engine
* tag 'v5.14-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
dt-bindings: mediatek: Add optional mediatek,gce-events property
arm64: dts: mt8183: add mediatek,gce-events in mutex
arm64: dts: mediatek: mt8173: Add domain supply for mfg_async
arm64: dts: mt8173: elm: Use aliases to mmc nodes
arm64: dts: mt8183: kukui: Use aliases to mmc nodes
Link: https://lore.kernel.org/r/26c4026a-9f26-d5a3-c30f-439120a4eaa0@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The device tree node for the XUDC (USB device mode controller) is
missing the interconnects property that describes the path to memory for
the controller. Add the property so that the things like the DMA mask
can be set by the operating system.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Jetson TX2 NX Developer Kit is very similar to the Jetson Nano, but
uses the more powerful Tegra186 SoC.
Signed-off-by: Thierry Reding <treding@nvidia.com>
These PWMs can be used for fan or LED backlight control. Add the device
tree nodes for all existing controllers found on Tegra186 SoCs. None of
these are enabled by default, which is left for the board DTS files to
do when necessary.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Move mt8183-pinfunc.h into include/dt-bindings/pinctrl so that we can
include it in yaml examples.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210804044033.3047296-2-hsinyi@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add initial support limited to HDMI i2s and SPDIF (LPCM).
Tested-by: Oleg Ivanov <150balbes@yandex.ru>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210804140258.4666-1-christianshewitt@gmail.com
Add initial support limited to HDMI i2s and SPDIF (LPCM).
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210804140029.4445-1-christianshewitt@gmail.com
The GIC-400 CPU interfaces address range is defined as 0x2000-0x3FFF (by
ARM).
Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
Reported-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Fixes: b9024cbc937d ("arm64: dts: Add initial device tree support for exynos7")
Link: https://lore.kernel.org/r/20210805072110.4730-1-krzysztof.kozlowski@canonical.com
da9211 regulator needs to be enabled before enabling the mfg_async power
domain. Otherwise the subdomain is not enabled and causes failure in
imgtec gpu driver boot.
Add the "domain-supply" property to the "mfg_async" node in DT.
Signed-off-by: Bilal Wasim <Bilal.Wasim@imgtec.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210701114012.RESEND.3.I9e27871bb700c807a564957302b292e9935dae0b@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
With commit 1796164fac7e ("dt-bindings: mmc: document alias support"),
a way to specify fixed index numbers was provided. This patch use aliases
to mmc nodes so the partition name for eMMC and SD card will be consistent
across boots.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210728040710.2891955-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
With commit 1796164fac7e ("dt-bindings: mmc: document alias support"),
a way to specify fixed index numbers was provided. This patch use aliases
to mmc nodes so the partition name for eMMC and SD card will be consistent
across boots.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210728040710.2891955-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
