3 Commits

Author SHA1 Message Date
Tudor Ambarus
c0f7ae2753 MAINTAINERS: Update email of Tudor Ambarus
My professional email will change and the microchip one will bounce after
mid-november of 2022.

Update the MAINTAINERS file, the YAML bindings, MODULE_AUTHOR entries and
author mentions, and add an entry in the .mailmap file.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Pratyush Yadav <pratyush@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20221226144043.367706-1-tudor.ambarus@linaro.org
2023-01-07 15:18:44 +01:00
Tudor Ambarus
77850bda36
spi: atmel,quadspi: Define sama7g5 QSPI
sama7g5 embedds 2 instances of the QSPI controller:
1/ One Octal Serial Peripheral Interface (QSPI0) Supporting up to
   200 MHz DDR. Octal, TwinQuad, HyperFlash and OctaFlash Protocols
   Supported
2/ One Quad Serial Peripheral Interface (QSPI1) Supporting Up to
   90 MHz DDR/133 MHz SDR

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211209122939.339810-3-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-15 22:16:55 +00:00
Tudor Ambarus
001a41d2a7
spi: atmel,quadspi: Convert to json-schema
Convert the Atmel QuadSPI controller Device Tree binding documentation
to json-schema.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211209122939.339810-2-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-15 22:16:54 +00:00