IF YOU WOULD LIKE TO GET AN ACCOUNT, please write an
email to Administrator. User accounts are meant only to access repo
and report issues and/or generate pull requests.
This is a purpose-specific Git hosting for
BaseALT
projects. Thank you for your understanding!
Только зарегистрированные пользователи имеют доступ к сервису!
Для получения аккаунта, обратитесь к администратору.
This alters the local side address of the iospace to zero,
non prefetchable memory local side address to 0x00000000 and
prefetchable memory local side address to 0x10000000,
so as to match the values actually poked in by the driver.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds pcie controller node for exynos5440-ssdk5440,
and also adds a phandle for pin controller node.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQEcBAABCAAGBQJRw/9tAAoJEPOmecmc0R2B3NMH/A609NR5Yag2vftml8Gl+Iya
2k/dligAPxx/WEogXwxrCcEwFvxA3iNvD9M7MuXZ25ffFL6SgYLnxNYCU53rXRmE
UBQP3OTW/5FyR3N/JGCLW4G8f6LoNWGtOaZqpMC97J4ucnWV/DtbEpoO7qlET/p0
zUsqIpFc9RGroRAmDuRRKpOuArBX5N9utH4fvpZ1XiXztIaESdCiGDFx4AN5g7Iq
uujcKK1NOoj4X/LXj0j4A1ECAhpJ5W8exacdwZZnKVVwA1CpEFxQLu9ekvCYYMNC
6LWhp2/ptgRj7Tv5uVqbHJn4jKd/OM+X0Rn6HcMY1Dwhf37Oa2wPEuQ2qMzcE6A=
=4BBI
-----END PGP SIGNATURE-----
Merge tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
From Heiko Stuebner:
Adds basic support for Rockchip Cortex-A9 SoCs.
* tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm: add basic support for Rockchip RK3066a boards
arm: add debug uarts for rockchip rk29xx and rk3xxx series
arm: Add basic clocks for Rockchip rk3066a SoCs
clocksource: dw_apb_timer_of: use clocksource_of_init
clocksource: dw_apb_timer_of: select DW_APB_TIMER
clocksource: dw_apb_timer_of: add clock-handling
clocksource: dw_apb_timer_of: enable the use the clocksource as sched clock
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds a generic devicetree board file and a dtsi for boards
based on the RK3066a SoCs from Rockchip.
Apart from the generic parts (gic, clocks, pinctrl) the only components
currently supported are the timers, uarts and mmc ports (all DesignWare-
based).
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Olof Johansson <olof@lixom.net>
This adds a basic clock setup for rk3066a SoCs. Only the gates are
set up currently, as the mux and dividers should use the upcoming
generic devicetree bindings.
Clocks whose rates need to be known are supplied by fixed-rate
"dummy"-clocks that provide the correct rate. This is uncritical insofar
that the only bootloader currently in existence for Rockchip devices
is the propietary Rockchip one that always setups the clocks in the
necessary way.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
* New SoCs i.MX6 Sololite and Vybrid VF610 support
* imx5 and imx6 clock fixes and additions
* Update clock driver to use of_clk_init() function
* Refactor restart routine mxc_restart() to get it work for DT boot
as well
* Clean up mxc specific ulpi access ops
* imx defconfig updates
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRvsJmAAoJEFBXWFqHsHzOHOIH/jjVCaAFdOskPI4d9qPPAt9C
5o0aJDjerzTm+vH2mbec2507fChaYrLybAypJUj6wDYRf03RhAgPXorY83Y+3WtG
SYz2UWza7MY8GeZv6e9tdrYS3JUSicFXPf8MsOcINsuyIub3dD96z36OqrnWZLFy
uH5V81e4gOHECd4PWIxmhdjwawqmwb/Pqzl0V3+vXi2JM07xrn7/SqlZ7VfUwM2q
DNhu5ugH7FtaFp75YrmTIhp6i+tovguRr0RIt6dnk/9gbJBQnV2Cw2MzdRPT12U5
bC79P7sojkKRtITcq9c1fnUNhkgc0+hS8HoezcQmzKMin6nFmVAh5wQFSlRJMJE=
=mZw+
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
imx soc changes for 3.11:
* New SoCs i.MX6 Sololite and Vybrid VF610 support
* imx5 and imx6 clock fixes and additions
* Update clock driver to use of_clk_init() function
* Refactor restart routine mxc_restart() to get it work for DT boot
as well
* Clean up mxc specific ulpi access ops
* imx defconfig updates
* tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: (29 commits)
ARM: imx_v6_v7_defconfig: Enable Vybrid VF610
ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by default
ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd
ARM: imx_v6_v7_defconfig: Enable PWM and backlight options
ARM: imx: Remove mxc specific ulpi access ops
ARM: imx: add initial support for VF610
ARM: imx: add VF610 clock support
ARM: imx_v6_v7_defconfig: enable parallel display
ARM: imx: clk: No need to initialize phandle struct
ARM: imx: irq-common: Include header to avoid sparse warning
ARM: imx: Enable mx6 solo-lite support
ARM: imx6: use common of_clk_init() call to initialize clocks
ARM: imx6q: call of_clk_init() to register fixed rate clocks
ARM: imx: imx_v6_v7_defconfig: Select CONFIG_DRM_IMX_TVE
ARM: i.MX6: clk: add different DualLite MLB clock config
ARM i.MX5: Add S/PDIF clocks
ARM i.MX53: Add SATA clock
ARM: imx6q: clk: add the eim_slow clock
ARM: imx: remove MLB PLL from pllv3
ARM: imx: disable pll8_mlb in mx6q_clks
...
Conflicts:
arch/arm/Kconfig.debug (simple add/add conflict)
Includes an update to 3.10-rc6
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add devicetree support to timer, pinctrl (probe), I2C block,
watchdog, DMA controller and clocks.
- Piecewise add a device tree containing all peripherals.
- Delete the ATAG boot path.
- Delete redundant platform data and board files.
- Convert to multiplatform.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRvvkdAAoJEEEQszewGV1zqjQQAMFYxb4B0c2YweNzDzWjuWM/
STZNyAV62LcE7GvssFYpeJ/+lrB7tNwgplJQ13uluEdFws2Xd63G+qIVznkBE7rW
+ZLHG+MPi/uia2yYcg9Vz1M42Aj5COuu1q6ex9OfR2v/tX3G2G/rjIzAaiiEvWWd
ljcBGlDh41iphY6dsBtFFXR0b9rzzyhhmY5wS1P+bMyl9YlqYp0x0oznLo5eFTlA
9ad9H0oeYYXCcB0V5UI1wsRGCaJqa04xotb6uqn1TUPpVc9ZpYQUkVI/1Fb3gVez
3MrLW2/9tDfXWUOTZTo9VtC4rpbmGSsvBc3C0IUGEj9ovmWTCA/OU/WXsEOAymb9
+F36wMX07z8OmmebBn06s6/Zhy0ht9BoV+NeW4lz3s3uiuE3vxnaxW/kb845xfUI
7o87kV8DpXuEokNP+jYyCDJTw/feq5Dy0HXr4KFOAwXMd3imRREnHgvihCsFtNj4
vRkz+6A17YrtpuvCqnuXiM5Ts+Dz4MAEJ/Iokrm1e28fUw/wuklAXeII8+kxc36R
w6AHTbXpWPjglVAn3DTuh4BjIoN53/cLhttezg7NcgtgRW3AxyHGx3T+345mHsgT
dbust8Qow/bapby8NPHKJDHM5A9RGNWX4rJ+abTxI0iJ0fpcEWT1c5TKlpUR+0KZ
qMTNGvDfonu1xaoPLo81
=fstd
-----END PGP SIGNATURE-----
Merge tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
From Linus Walleij:
Device Tree and Multiplatform support for U300:
- Add devicetree support to timer, pinctrl (probe), I2C block,
watchdog, DMA controller and clocks.
- Piecewise add a device tree containing all peripherals.
- Delete the ATAG boot path.
- Delete redundant platform data and board files.
- Convert to multiplatform.
* tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (40 commits)
ARM: u300: switch to using syscon regmap for board
ARM: u300: Update MMC configs for u300 defconfig
spi: pl022: use DMA by default when probing from DT
pinctrl: get rid of all platform data for coh901
ARM: u300: convert MMC/SD clock to device tree
ARM: u300: move the gated system controller clocks to DT
i2c: stu300: do not request a specific clock name
clk: move the U300 fixed and fixed-factor to DT
ARM: u300: remove register definition file
ARM: u300: add syscon node
ARM: u300 use module_spi_driver to register driver
ARM: u300: delete remnant machine headers
ARM: u300: convert to multiplatform
ARM: u300: localize <mach/u300-regs.h>
ARM: u300: delete <mach/irqs.h>
ARM: u300: delete <mach/hardware.h>
ARM: u300: push down syscon registers
ARM: u300: remove deps from debug macro
ARM: u300: move debugmacro to debug includes
ARM: u300: delete all static board data
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Pulls the Integrator/AP PCI bridge driver into one file
- Adds full device tree support for it
- Keeps ATAG support around for the time being
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJRvMzZAAoJEEEQszewGV1zUQUQAJbES7DXw+lPSIYaI6MFEFJa
SHAD0T3J91ya5chawMC4U5g60734Q8K1k052KpIPNoBBby7spve2zklON8wCVWnj
ta5TAzDQy+T5TRMpIap6bhvMJQQw+qvTCbxIYivb4WtaBgByBXfJCyCiKjJ+yX28
KQlyMIqrH8G1GyItC1e4gnUP9KJb9djT51nRL6asvLcD4/Cf9OJadXUCAUmwHDWK
PUvZm5R8zDFnwNTh5tIrTuac4rY/vsJd2PLvbsai9hghOwhUT6I+pHpP2snUq+0e
77+K4LnOIbh9nNMATJHgP6iSLjc8ncfPwCGmf27bA968am9arYJMnX8sKFTNms9s
n1qvaOQnYclrujX2Sy25PXBc/3FCoVP0e2nNzG3e7fdn3gVQDrmSw1ag7/vTDbS5
kFrWjJFnr6Sxy3FthzTwWGgb4IHIRTZg+MuHjjyf4iSq14IGZoHal9n/GvGL3MUL
G5o1lvxXBC9UKYslUmfvYM1yIMzUqSxYs09d96KRHF+XGNnk0GaMgUqfXqFb33JH
HocHqevH+WGgach6Qqgop7ZGrdjOe75wDn03yIgM29SL4WKtFbfY0KPySBFqHPd/
RNCwFQZo1N8rhbfB/sCFDVAAZfbbQxomID8p5KAvD0IaVIiE9eLbSgJdDQR0o148
lFhe+9QCIRQkiLmYc+Sf
=bzpe
-----END PGP SIGNATURE-----
Merge tag 'integrator-pci-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
From Linus Walleij:
This is a patch series that:
- Pulls the Integrator/AP PCI bridge driver into one file
- Adds full device tree support for it
- Keeps ATAG support around for the time being
* tag 'integrator-pci-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: basic PCIv3 device tree support
ARM: integrator: move static ioremapping into PCIv3 driver
ARM: integrator: move VGA base assignment
ARM: integrator: remap PCIv3 base dynamically
ARM: integrator: move V3 register definitions into driver
ARM: integrator: move PCI base address grab to probe
ARM: integrator: grab PCI error IRQ in probe()
ARM: integrator: convert PCIv3 bridge to platform device
ARM: integrator: merge PCIv3 driver into one file
ARM: pci: create pci_common_init_dev()
Documentation/devicetree: add a small note on PCI
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Minimal machine and device-tree support with arch_timers and console UART
- Reboot hook using PLL reset
- Low level debug support using UART
- SMP boot support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRv4/wAAoJEHJsHOdBp5c/IgsQAIRBEH3do787aX8WnvE2K2eH
bertrD86dcHGe4oNRg+L6WFxS/0SLYTzvkwizBSUl6gs1e0LkruAqiKM5LJmyBfr
G+ay0Z/j6oROwCpVF1aVL1sqC0dn7uUk9jhqaTy9DhLQjol6xLELvOy16+0WlpCC
uDJamki+i+PyO3HyLmyT+exgsLxdKmo3PzDn4fsgab0a/Y1wEniYrraSr5158uj2
Zpo9uDgDaMtPn0bC7WUPI+lC4F8s4GqQp87GH90QpVFPIR/yKCuurHocC8vvVER1
HBhZ9e6VVSuRYc3pkZO8Xtr/hvoopnDO07SYrMGxL2F3tzUqab900o9IsYWkBbYT
Z8DrPHFx6ZDhx0yEOdTeNq+wSXL2jduz78Wh20/Sh3lBDl6hn5YSIyWR+WiPpheo
MlJRKNs0cKwsPwTIK3x4LEkLzDe3tVGbBGigNDex5m5azQci10Cctbc+DnBjLOnj
AZiLuKM0LxNUx9riErWMmkskgNpRB31d7q9dgAC+rxA66MqBnz6x4nTTGFXNSkGC
/iRU5YO/BgwL/IeiX2gY/msFLW0YyjXakpQ8XcqoAxGb6y6qvbD6SNtjfxA16OHT
o6uPSpA82TprHzePFCSbzIkSE+Jj1o0Dqc4PWZkuX0X7TmW9R+k6TUU9OF+VnlCV
q0Jjsrod/6z8CQ/tIpD8
=pkFT
-----END PGP SIGNATURE-----
Merge tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc
From Santosh Shilimkar:
SOC support for Keystone II devices:
- Minimal machine and device-tree support with arch_timers and console UART
- Reboot hook using PLL reset
- Low level debug support using UART
- SMP boot support
* tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: Enable SMP support on Keystone machines
ARM: keystone: Add minimal TI Keystone platform support
ARM: dts: keystone: Add minimal Keystone SOC device tree data
Signed-off-by: Olof Johansson <olof@lixom.net>
Add minimal device tree data for Keystone2 based SOCs. Patch
contains mainly ARM related SOC data and nothing about EVM specific
yet.
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: arm@kernel.org
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This switches the code using a local remapping of the
system controller to enable the U300 board to be
self-powered over to making the U300-specific syscon
compatible with the MFD generic syscon driver, selecting
the generic syscon driver, and augmenting the board
power code to pick the regmap and manipulate the syscon
from the regmap side of things.
Cc: Dong Aisheng <dong.aisheng@linaro.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the last of the U300 clocks to being probed from
the device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the slow, fast, AHB bridge and "rest" clocks on
the U300 system controller over to registration from the
device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the fixed and fixed-factor clocks in the U300
platform to register themselves from the device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree node for the U300 system controller
and remaps this dynamically instead of using hard-coded
virtual addresses. The board power set-up code is altered
to fetch a reference to the syscon using ampersand <&syscon>
notation. This way of passing a pointer to the syscon will
also be used by the clocks.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers the U300 FSMC flash controller from the
device tree, and defines the three partitions. Skip the
BBT scan as in the current platform data.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This probes the U300 dummy-spichip from the device tree
and adds the apropriate node to the tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers the PL022 PrimeCell from the U300 device
tree. We make a new copy of the platform data for the
device tree boot path, as the old platform data is in an
older file which will be going away.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the COH 901 318 DMA controller to the U300
device tree. All devices now converted to device tree
so far will start to find their DMA channels.
Note that the U300 is not yet using the device tree
to obtain DMA channels, but this is a first step.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds DMA channel assignments to the MMC/SD-controller
and the two UARTs already in the U300 device tree, as we
have now defined a way to obtain DMA channels from the
device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds support for the U300 MMC/SD card slot from the device
tree boot. No other changes needed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that we have enabled board power and the AB3100 regulators,
put the regulator data into the device tree and enable it so
we can start to tie regulators to devices. To begin with we're
only supplying the power to the board itself.
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers the memory ranges for I/O, non-prefetched and
prefetched memory and configuration space for the PCIv3 bridge
and let us fetch these basic memory resources from the device
tree in the device tree boot path. Remove the stepping stone
platform device. This is an either/or approach - the platform
data path is mutually exclusive to the plain platform data
path and provided addresses from the device tree have to be
correct.
This adds the interrupt-map property to the PCIv3 DTS file
and makes the bridge obtain mappings from the device tree.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This series removes the hardcoded register base address for mvebu.
Depends:
- mvebu/fixes-non-critical (up to tags/fixes-non-3.11-1)
- mvebu/cleanup (up to tags/cleanup-3.11-3)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.20 (GNU/Linux)
iQEcBAABAgAGBQJRujY/AAoJEAi3KVZQDZAeQ/8H/186TUo1jWJJP/Tdp6Rg09qK
FeZeVH9YrViLO2g2iO338TlfIjshJW8HgMv8tnuJo9xLz5wtws3Dpv5BpcYoGoKs
vU/d1EZC4vJTs5IZ2fS6p0LpvV8YrUYVi9v7uPWHFx6DYGznuHPP/q8Hu6Pa0Tok
MoPNAihBYMEhePGuBQo1j3xPtteifJy/CUv5iSrAAJSEI5zGRc7QO/0ItS2gc9qy
odFZKTZnGPlp/79np4I1/cjNTRuD5kf/9IzNFxl4ZL4X7Nre9J+8IFoPU671EDw1
XMBEtf6ThO6Z8oLiVPxeHlSLO2o7xQj7VEAUoSEsiK4whJAfxFiOqIiIC5SXfDA=
=hKzx
-----END PGP SIGNATURE-----
Merge tag 'regmap-3.11' of git://git.infradead.org/users/jcooper/linux into next/soc
mvebu register map changes for v3.11
This series removes the hardcoded register base address for mvebu.
Depends:
- mvebu/fixes-non-critical (up to tags/fixes-non-3.11-1)
- mvebu/cleanup (up to tags/cleanup-3.11-3)
* tag 'regmap-3.11' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: disable DEBUG_LL/EARLY_PRINTK in defconfig
arm: mvebu: add another earlyprintk Kconfig option
arm: mvebu: don't hardcode the physical address for mvebu-mbus
arm: mvebu: don't hardcode a physical address in headsmp.S
arm: mvebu: remove hardcoded static I/O mapping
arm: mvebu: move cache and mvebu-mbus initialization later
arm: mvebu: avoid hardcoded virtual address in coherency code
arm: mvebu: remove dependency of SMP init on static I/O mapping
arm: mvebu: fix length of Ethernet registers area in .dtsi
arm: mvebu: fix length of SATA registers area in .dtsi
arm: mvebu: mark functions of armada-370-xp.c as static
ARM: mvebu: Remove init_irq declaration in machine description
ARM: Orion: Remove redundant init_dma_coherent_pool_size()
Signed-off-by: Olof Johansson <olof@lixom.net>
minimal support for am43x SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRuLgpAAoJEBvUPslcq6Vz/iEP/1r99Hn+cqZE489f09GPYkbB
CtasWSkNMc6SQMogFovOD+z4AAnv+bQGc0Np6sW6Gx/W1KZWhg2fUw50hj6Bugp2
AluncXm/pbqi738BS0mit7+kQMmqmykLr56CMjlrdlo5aZq0JU9AGCv+makV7xMy
swCL8a4HfVfF33zCLTiCfWmGSVO1YUpCi7Y+R6BcFNgaX0aXFb5dl9IxFrf1RjBE
FvVBgt059mW8r95ytgrVfQ96FxkXOGVt37suqioKwHHXgmVziG0zkkOlAEogx7Ce
J+skalmpAmrWfPGC05x1kKOr0DBn0h3gx42gxSLRZzVyIOJFHgQTuR7KNW1DFEtx
tVZ9lmE0euMtKqIce/BuiUSFd6QhjjuAdp6H3ux55YFb2NCJOHe2qL58nMBRusaN
9o/+ArfvlLHaVE7dNCyn9Hz3vuQbL/moCnQN+oSs4UGNVwCXaswKsbZLN1Qi8RG0
75r9SFxl/TqslQ+QOMU5yEd9ZxVaOGGcPP887kGADEPJfYv08AXhlAzK+r6Dxapo
Gz0EtnfJ+5nKyq9fkzBg2AZBoIBSR5pZAMyGrPX4AE4BKsyJ+aKmr+7cz1so8IFR
I/jFtha2hXW3Zxvom2uZXInjHqb3g1/zw4Rdn4Tn4H6GmgGoib/9feTljN7qV7MP
Z+mEkmqIkutOWdVWO4LH
=3bVH
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.11/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren:
Omap SoC changes. Mostly improves am33xx support, and adds
minimal support for am43x SoCs.
* tag 'omap-for-v3.11/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: AM43x: SRAM base and size
ARM: OMAP2+: AM43x: GP or HS ?
ARM: OMAP2+: AM43x: early init
ARM: OMAP2+: AM43x: static mapping
ARM: OMAP2+: AM437x: SoC revision detection
ARM: OMAP2+: AM43x: soc_is support
ARM: OMAP2+: AM43x: kbuild
ARM: OMAP2+: AM43x: Kconfig
ARM: OMAP2+: separate out OMAP4 restart
ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK
ARM: OMAP3: clock data: get rid of unused USB host clock aliases and dummies
ARM: OMAP2+: AM33xx: Add missing reset status info to GFX hwmod
+ Linux 3.10-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
- mvebu
- fix register area length in dtsi for ethernet and sata
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRpPK5AAoJEAi3KVZQDZAeY0IH/2zCJX+nmBBw9omcrDg3lXaU
YKrpL6d/sV1Y+gyC6Xa8OLvmOZFndwt5ePh6RRprM7wDybw5JE6inCXtLUN31f0W
ARjX6asJkPk/NqDx8Bhs+OzI157cGHKnDOTzemE0dMVtN4dBnEApKMB2w+8pzGPK
SirwBvHuaIf5eNdIv9Vnj/UguMH7UKuPb7xKnq52FavkRcHWXXJNIDEibzwOOoBG
KRjk1yBL3Spva51UwZ2Mgv+8J71y5KOGBUjEIHbVwcxl7lPQ37fP1yWDlreG0qdV
xDTiB1wwfg8/IH/M+2z0AAKK4s/ngfLujZZZsHL9HrTudstThEaTi9T6scLtqOM=
=BmX7
-----END PGP SIGNATURE-----
Merge tag 'tags/fixes-non-3.11-1' into mvebu/regmap
mvebu fixes non-critical for v3.11 (round 1)
- mvebu
- fix register area length in dtsi for ethernet and sata
- mvebu
- fix PCIe ranges property so NOR flash is visible
- kirkwood
- fix identification of 88f6282 so MPPs can be set correctly
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRtjVFAAoJEAi3KVZQDZAe4g4IAJcgufr2WBHJtGwVAGiSQLCr
gI3NjyfeJP98P7Bt/7ZyXBx5CmW3I6gVLN6Sctjpk01VISregbWv8Qos8iJx31hq
gqVmPJvaJy3dwHvq15rFMzNgsZGBTVV85wdnhppfeRTtt0nmREeJsLmgI1c5z0bw
u9BolnU1+sQn0S/TV/A4EZhyc18kAGzGqOKLOm3O4Ftrxncjq0idaSC5TOTDlA8Q
1D5bDbmaXyu7J1lqnYbbIsn9E4MTxfjbcrVnK1pEf7qhhtrmfJWiqLuay5plo/43
zMHefOc8rI74QUHxXuv6IS8QZcKKcfSJBpRCmxK6Ks74I9D6T9l7FxDb/2ckgJk=
=gHgq
-----END PGP SIGNATURE-----
Merge tag 'fixes-3.10-4' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper, mvebu fixes for v3.10 round 4:
- mvebu
- fix PCIe ranges property so NOR flash is visible
- kirkwood
- fix identification of 88f6282 so MPPs can be set correctly
* tag 'fixes-3.10-4' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range
ARM: Kirkwood: handle mv88f6282 cpu in __kirkwood_variant().
Signed-off-by: Olof Johansson <olof@lixom.net>
From Alexander Shiyan, this is a series of cleanups of clps711x, movig it
closer to multiplatform and cleans up a bunch of old code.
* clps711x/soc:
ARM: clps711x: Update defconfig
ARM: clps711x: Add support for SYSCON driver
ARM: clps711x: edb7211: Control LCD backlight via PWM
ARM: clps711x: edb7211: Add support for I2C
ARM: clps711x: Optimize interrupt handling
ARM: clps711x: Add clocksource framework
ARM: clps711x: Replace "arch_initcall" in common code with ".init_early"
ARM: clps711x: Move specific definitions from hardware.h to boards files
ARM: clps711x: p720t: Define PLD registers as GPIOs
ARM: clps711x: autcpu12: Move remaining specific definitions to board file
ARM: clps711x: autcpu12: Special driver for handling memory is removed
ARM: clps711x: autcpu12: Add support for NOR flash
ARM: clps711x: autcpu12: Move LCD DPOT definitions to board file
ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source
ARM: clps711x: Remove NEED_MACH_MEMORY_H dependency
ARM: clps711x: Re-add GPIO support
GPIO: clps711x: Add DT support
GPIO: clps711x: Rewrite driver for using generic GPIO code
+ Linux 3.10-rc4
Signed-off-by: Olof Johansson <olof@lixom.net>
- One device tree fix for all spi node to have per clock added.
The clock is needed by spi driver to calculate bit rate divisor.
The spi node in the current device trees either does not have the
clock or is defined as dummy clock, in which case the driver probe
will fail or spi will run at a wrong bit rate.
- Two imx6q clock fixes, which correct axi_sels and ldb_di_sels.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRrLClAAoJEFBXWFqHsHzO7mIH/0zrRS+0aOdrrdL6pPWW+dua
b1q5xk7vU3LU57SN6WozsfoR5zWiO3qCK5R7wvT1eYFamDryUmlNsTiFz2XG8ZdK
qYVegCh86UqteSJYRBBYAuNcBjkKryPUP+Iy2PJuZKmrwNKhFfdoYYFh68th0Dc8
UcIv999Jm0JswfQ8Av4idSSMWtPwwyBm3dBEa3nI/pDdj2Wg9UmWXFml36wiEYyd
CUdlcY4UenBvPIAXq0UwH4vD65Bkuz7XQqjuLtP7rgwJmVdedXYOLv59Cka5FBR9
cZoeoKl9lm+7fJVfWwTtMiW1jmE+nOh/cmCZN9aE/T1xWu8dl29h6nCOXUFCbfI=
=sjAQ
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo, imx fixes for 3.10, take 2:
- One device tree fix for all spi node to have per clock added.
The clock is needed by spi driver to calculate bit rate divisor.
The spi node in the current device trees either does not have the
clock or is defined as dummy clock, in which case the driver probe
will fail or spi will run at a wrong bit rate.
- Two imx6q clock fixes, which correct axi_sels and ldb_di_sels.
* tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx: clk-imx6q: AXI clock select index is incorrect
ARM: dts: imx: fix clocks for cspi
ARM i.MX6q: fix for ldb_di_sels
Signed-off-by: Olof Johansson <olof@lixom.net>
The ranges DT entry needed by the PCIe controller is defined at the
SoC .dtsi level. However, some boards have a NOR flash, and to support
it, they need to override the SoC-level ranges property to add an
additional range. Since PCIe and NOR support came separately, some
boards were not properly changed to include the PCIe range in their
ranges property at the .dts level.
This commit fixes those platforms.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM.
The PWM capability property is missing from the node definitions of
couple of timers.
Add ti,timer-pwm attribute for timer 5, 6, 8 and 11.
Signed-off-by: Suman Anna <s-anna@ti.com>
[benoit.cousson@linaro.org: Update changelog and subject to highlight
the fix]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Earlier commits ensured proper muxing of pins related to proper
TWL6030 behavior: see commit 265a2bc8 (ARM: OMAP3: TWL4030: ensure
sys_nirq1 is mux'd and wakeup enabled) and commit 1ef43369 (ARM:
OMAP4: TWL: mux sys_drm_msecure as output for PMIC).
However these only fixed legacy boot and not DT boot. For DT boot,
the default mux values need to be set properly in DT.
Special thanks to Nishanth Menon for the review and catching some
major flaws in earlier versions.
Tested on OMAP4430/Panda and OMAP4460/Panda-ES.
Cc: Nishanth Menon <nm@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
[benoit.cousson@linaro.org: Slightly change the subject to align
board name with file name]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The gpmc driver is actually looking for "gpmc,num-cs" and
"gpmc,num-waitpins" properties in DT. The binding doc also states
this.
Correct the properties in the dts to provide the right values for the
gpmc driver.
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Stephen Warren reported the recent commit 78506f2 (add support for
extended FIFO-size of PL011-r1p5) breaks the serial port on the
BCM2835 ARM SoC.
A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs.
The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep
FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for
this compatibility issue, this patch overrides the HW UART periphid
register values with the actually compatible UART periphid 0x00241011
(r1p3 or r1p4).
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jongsung Kim <neidhard.kim@lge.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
- kirkwood
- enable pcie driver
- migrate boards over to pcie dt init
depends
- mvebu/pcie
- mvebu/of_pci
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRpP1WAAoJEAi3KVZQDZAeItIH/1QVHhqYSpOnXGu4zQHswvIM
SRQoy4hiCJm+yywTnIDJPMQdBKD1vURRRdGWQouNsFoBaHki4v2BBxfBNFoDN+rx
VtECH7F1SbJ/Pb7XLVnswqRXVNqrY5fOY5mW42ALFBT9VxcKoD1FyqCaXfaU9JA4
VQCzR7DjFhr8bppZknQ5ZT/qI66Wj1oNiJtBdItmxT0pVfElvAOV6FHzfMGrrDrM
+v8T8KdFIdmH1Ny5J5KLQSE9qBLqae0vlDNgsfwfh1DY/Lye3rDHqPDKrh7YZjHR
xNc6JU+zEdP3tK1f1jgmjn/giY7HqpAFm46p9k/pF9gsE5SE0L/e0Dh9apOcq24=
=qUyf
-----END PGP SIGNATURE-----
Merge tag 'pcie_kw-3.11' of git://git.infradead.org/users/jcooper/linux into next/soc
From Jason Cooper:
mvebu pcie driver (kirkwood) for v3.11
- kirkwood
- enable pcie driver
- migrate boards over to pcie dt init
depends
- mvebu/pcie
- mvebu/of_pci
Signed-off-by: Olof Johansson <olof@lixom.net>
* tag 'pcie_kw-3.11' of git://git.infradead.org/users/jcooper/linux:
arm: kirkwood: convert db-88f6281/db-88f6282 to the Device Tree
arm: kirkwood: convert QNAP TS219 to use DT for the PCIe interface
arm: kirkwood: convert ZyXEL NSA310 to use DT for the PCIe interface
arm: kirkwood: convert MPL CEC4 to use DT for the PCIe interface
arm: kirkwood: convert Iomega Iconnect to use DT for the PCIe interface
arm: kirkwood: add SoC-level Device Tree data for PCIe interfaces
arm: kirkwood: move PCIe window init to legacy driver
pci: mvebu: enable driver usage on Kirkwood
Now that the mvebu-pcie driver is in place and enabled for kirkwood,
convert to initializing PCIe via devicetree.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The length of the registers area for the Marvell 370/XP Ethernet
controller was incorrect in the .dtsi: 0x2400 while it should have
been 0x4000. Until now, this problem wasn't noticed because there was
a large static mapping for all I/Os set up by ->map_io(). But since
we're going to get rid of this static mapping, we need to ensure that
the register areas are properly sized.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The length of the registers area for the Marvell 370/XP SATA
controller was incorrect in the .dtsi: 0x2400 while it should have
been 0x5000. Until now, this problem wasn't noticed because there was
a large static mapping for all I/Os set up by ->map_io(). But since
we're going to get rid of this static mapping, we need to ensure that
the register areas are properly sized.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
- to get usb2 working on the Chromebook with adding the
usb phy node for usb2 on exynos5250
- supporting exynos4210 rev0 SoC
- exynos5440 restart applying only to powered-on domains
- drm-exynos probe failure with adding resource names to
fimd0 platform device
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRn/XjAAoJEA0Cl+kVi2xqqhQQAJb4Qe8Mc6kv/8PLH06Ygps8
d0EeOt26yUTlK69LiG8EGdPlUHOsL9sgh3VSEZ1G9gCesMZsevmwf1TkYRbM5P7z
fWZ54MkpIRGcUV45hqQ8q6wKxCdwoi/2t0Dn5GcwWuiHIixAD/VhfG09NNF9aVzi
5iocBDfXctCT0vzhpeubJsBEIl9IEDI7CJqimPZ0RILXzVJQNKf4newR89sDYKGh
HMt2uG54YRh+GgTXkRqOQ/pMpfX/fR0FWbs9n41UXFCi5VWnH4Bb6Kt0ssKTzGuQ
hOg4PY3PqmD1eO80pD3cefawFvKc+XwllwRfNbleVf2soh5OPN2hdJe3f/c0Nq1O
kkN4+LunHdKE4H7dPaKW4+E00bZtTbMbGsn4XQgmIgZufeibbyCN6TbwBgWL+hcN
ckRQXlufwK9hX3881kdUQ9MOBARCwy5Pn3HXTb+dCRNQndkGpZfOH6ouw/XPbG9B
5GFzdm68wnuQ/E4+U/gAO1iEzTNZGlS6scVPBkh91DEgvQPY9YxdFv2ePRNjCiEu
saokagbLMF1BfokPrN4anavBJdorQSnzFpRBHsNxwLdwXVw5SbgDSLUH2jTu3M17
gTh1IMNvtmFn0yFzwcO0f7PRGygeyofFROrqKP+6OvbTqHwqBK/9paUbCK+bMV/7
OtsnpDoIZ28lIdfpfzUt
=+rdH
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
From Kukjin Kim:
Fixes following for v3.10
- to get usb2 working on the Chromebook with adding the
usb phy node for usb2 on exynos5250
- supporting exynos4210 rev0 SoC
- exynos5440 restart applying only to powered-on domains
- drm-exynos probe failure with adding resource names to
fimd0 platform device
* tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: Add names to fimd0 IRQ resources
ARM: EXYNOS: fix software reset logic for EXYNOS5440 SOC
ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC
ARM: dts: Enabling samsung-usb2phy driver for exynos5250
This commit converts the Marvell DB-88F6281/DB-88F6282 board to the
Device Tree. In fact, the code was supporting two different boards:
one with the 6281 SoC variant, and one with the 6282 SoC variant. The
difference between the two being that the 6281 has one PCIe interface,
and the 6282 has two PCIe interfaces.
In order to handle that with the Device Tree, we create a
'kirkwood-db.dtsi' file that contains the definitions common to both
boards, and 'kirkwood-db-88f6281.dts' and 'kirkwood-db-88f6282.dts'
for the definitions specific to each board. This is similar to what is
done for the QNAP TS219 Kirkwood platform.
We have kept one single Kconfig option, just like it was before.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the PCIe mvebu driver is usable on Kirkwood, use it instead
of the legacy PCIe code, since it allows to describe the PCIe
interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the PCIe mvebu driver is usable on Kirkwood, use it instead
of the legacy PCIe code, since it allows to describe the PCIe
interfaces in the Device Tree.
Since it was the only device left that prevented this platform to use
the Device Tree only, we remove the board-nsa310.c file and the
related Kconfig/Makefile bits.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
