3 Commits

Author SHA1 Message Date
Amit Kucheria
5b1283984f thermal: tsens: Add support to split up register address space into two
There are two banks of registers for v2 TSENS IPs: SROT and TM. On older
SoCs these were contiguous, leading to DTs mapping them as one register
address space of size 0x2000. In newer SoCs, these two banks are not
contiguous anymore.

Add logic to init_common() to differentiate between old and new DTs and
adjust associated offsets for the TM register bank so that the old DTs will
continue to function correctly.

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2018-07-27 15:02:37 -07:00
Eduardo Valentin
032d405729 thermal: qcom: remove declare local symbols as static
Trivial: remove the following:
drivers/thermal/qcom/tsens-8916.c:103:24: warning: symbol 'ops_8916' was not declared. Should it be static?
drivers/thermal/qcom/tsens-8996.c:76:24: warning: symbol 'ops_8996' was not declared. Should it be static?
drivers/thermal/qcom/tsens-8974.c:235:24: warning: symbol 'ops_8974' was not declared. Should it be static?
drivers/thermal/qcom/tsens-8960.c:279:24: warning: symbol 'ops_8960' was not declared. Should it be static?

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2016-09-27 14:02:16 +08:00
Rajendra Nayak
d059c739aa thermal: qcom: tsens-8996: Add support for 8996 family of SoCs
The TSENS controller in 8996 family of SoCs is capable of converting the
ADC code outputs to real temperature values (in decidegree Celsius).
It can also be programmed to provide raw ADC code, but the secure software
on 8996 programs it to provide real temperatures and also does the needed
calibrations.

We check the valid bit to ensure valid data is read by the AHB master.
And the spec recommends the below algorithm to read data 3 consecutive
times, which takes care of the worst case delay taken to propagate the
updated data to the register.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2016-09-27 14:02:16 +08:00