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After r363059 and r363928 in LLVM, a build using ld.lld as the linker
with CONFIG_RANDOMIZE_BASE enabled fails like so:
ld.lld: error: relocation R_AARCH64_ABS32 cannot be used against symbol
__efistub_stext_offset; recompile with -fPIC
Fangrui and Peter figured out that ld.lld is incorrectly considering
__efistub_stext_offset as a relative symbol because of the order in
which symbols are evaluated. _text is treated as an absolute symbol
and stext is a relative symbol, making __efistub_stext_offset a
relative symbol.
Adding ABSOLUTE will force ld.lld to evalute this expression in the
right context and does not change ld.bfd's behavior. ld.lld will
need to be fixed but the developers do not see a quick or simple fix
without some research (see the linked issue for further explanation).
Add this simple workaround so that ld.lld can continue to link kernels.
Link: https://github.com/ClangBuiltLinux/linux/issues/561
Link: 025a815d75
Link: 249fde8583
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Debugged-by: Fangrui Song <maskray@google.com>
Debugged-by: Peter Smith <peter.smith@linaro.org>
Suggested-by: Fangrui Song <maskray@google.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
[will: add comment]
Signed-off-by: Will Deacon <will@kernel.org>
When KASLR and KASAN are both enabled, we keep the modules where they
are, and randomize the placement of the kernel so it is within 2 GB
of the module region. The reason for this is that putting modules in
the vmalloc region (like we normally do when KASLR is enabled) is not
possible in this case, given that the entire vmalloc region is already
backed by KASAN zero shadow pages, and so allocating dedicated KASAN
shadow space as required by loaded modules is not possible.
The default module allocation window is set to [_etext - 128MB, _etext]
in kaslr.c, which is appropriate for KASLR kernels booted without a
seed or with 'nokaslr' on the command line. However, as it turns out,
it is not quite correct for the KASAN case, since it still intersects
the vmalloc region at the top, where attempts to allocate shadow pages
will collide with the KASAN zero shadow pages, causing a WARN() and all
kinds of other trouble. So cap the top end to MODULES_END explicitly
when running with KASAN.
Cc: <stable@vger.kernel.org> # 4.9+
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
This was added part of the original commit which added MMU definitions.
commit 4f04d8f00545 ("arm64: MMU definitions").
These symbols never got used as confirmed from a git log search.
git log -p arch/arm64/ | grep PTE_TYPE_FAULT
git log -p arch/arm64/ | grep PMD_TYPE_FAULT
These probably meant to identify non present entries which can now be
achieved with PMD_SECT_VALID or PTE_VALID bits. Hence just drop these
unused symbols which are not required anymore.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Steve Capper <steve.capper@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Since the VDSO code has moved to C from assembly, there is no need to
define and maintain the corresponding asm offsets.
Fixes: 28b1a824a4f4 ("arm64: vdso: Substitute gettimeofday() with C implementation")
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@vger.kernel.org
Cc: linux-kselftest@vger.kernel.org
Cc: Will Deacon <will.deacon@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Mark Salyzyn <salyzyn@android.com>
Cc: Peter Collingbourne <pcc@google.com>
Cc: Shuah Khan <shuah@kernel.org>
Cc: Dmitry Safonov <0x7f454c46@gmail.com>
Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: Huw Davies <huw@codeweavers.com>
Cc: Shijith Thotton <sthotton@marvell.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Link: https://lkml.kernel.org/r/20190624135812.GC29120@arrakis.emea.arm.com
Enable CONFIG_KEYBOARD_SNVS_PWRKEY as module to support i.MX8M
series SoCs' power key.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch selects CONFIG_IMX_SCU_SOC by default to support
i.MX system controller unit SoC info driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
For imx8m we need a separate small driver to read "speed grading"
information from fuses and determine which OPPs are supported.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable imx-ocotp nvmem driver for fuse access on imx8m family.
The fuse block stores various system information which will be accessed
by client device drivers, e.g. cpufreq driver needs to access fuse for
CPU speed grading setting. So this nvmem driver gets enabled as
built-in.
Tested on imx8mm-evk.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is essentialy a squash of a bunch of history of cheza dt updates
from chromium kernel, some of which were themselves squashes of history
from older chromium kernels.
I don't claim any credit other than wanting to more easily boot upstream
kernel on cheza to have an easier way to test upstream driver work ;-)
I've added below in Cc tags all the original actual authors (apologies
if I missed any).
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Sibi Sankar <sibis@codeaurora.org>
Cc: Evan Green <evgreen@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Abhinav Kumar <abhinavk@codeaurora.org>
Cc: Brian Norris <briannorris@chromium.org>
Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <agross@kernel.org>
qcs404 has 10 sensors connected to the single TSENS IP. Define a thermal
zone for each of those sensors to expose the temperature of each zone.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
qcs404 has a single TSENS IP block with 10 sensors. The calibration data
is stored in an eeprom (qfprom) that is accessed through the nvmem
framework. We add the qfprom node to allow the tsens sensors to be
calibrated correctly.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
Different mechanisms are used to test and set elf_hwcaps between ARM
and ARM64, this results in the use of ifdeferry in this file when
setting/testing for the EVTSTRM hwcap.
Let's improve readability by extracting this to an arch helper.
Signed-off-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Currently arm64 uses the default implementation of panic_smp_self_stop()
where the CPU runs in a cpu_relax() loop unable to receive IPIs anymore.
As a result, when two CPUs panic() simultaneously we get "SMP: failed to
stop secondary CPUs" warnings and extra delays before a reset, because
smp_send_stop() still tries to stop the other paniced CPU.
Provide an implementation of panic_smp_self_stop() that is identical to
the IPI CPU stop handler, so that the online status of stopped CPUs gets
properly updated.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The current code puts the stopped cpus in an 'yield' instruction loop.
Using a busy loop here is unnecessary, we can use the cpu_park_loop()
function here to do a wfi/wfe.
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The memory regions specified by /memreserve/ are passed to
early_init_dt_reserve_memory_arch() with nomap=false, so it is
not suitable for reserving memory for Trusted Firmware-A etc.
Use the more robust /reserved-memory node with the no-map property
to prevent the kernel from mapping it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.
Update DT for it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
ARMv8.5 introduces the FRINT series of instructions for rounding floating
point numbers to integers. Provide a capability to userspace in order to
allow applications to determine if the system supports these instructions.
Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
ARMv8.5 adds new instructions XAFLAG and AXFLAG to translate the
representation of the results of floating point comparisons between the
native ARM format and an alternative format used by some software. Add
a hwcap allowing userspace to determine if they are present, since we
referred to earlier CondM extensions as FLAGM call these extensions
FLAGM2.
Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This enables the INA3221 power monitoring driver that is used on many of
the Jetson boards as well as Tegra194 PCIe support.
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Merge tag 'tegra-for-5.3-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig
arm64: tegra: Default configuration changes for v5.3-rc1
This enables the INA3221 power monitoring driver that is used on many of
the Jetson boards as well as Tegra194 PCIe support.
* tag 'tegra-for-5.3-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: defconfig: Add Tegra194 PCIe driver
arm64: defconfig: Add HWMON INA3221 support
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add i.MX8MQ based Librem5 devkit support.
- Add SNVS power key support for i.MX8MQ and i.MX8MM.
- Add GPIO alias for imx8mq and i.MX8QXP.
- A series from Daniel Baluta to add SAI devices and enable audio
support for imx8mm-evk board.
- Add DDR performance monitor unit support for i.MX8QXP.
- Add irqsteer interrupt controller device for i.MX8MQ SoC.
- Add CPU speed grading and all OPPs for i.MX8MM and i.MX8MQ.
- Add OCOTP device node for i.MX8QXP.
- Various device addition for LS1028A: SATA, qDMA, USB, Mali DP500 and
temperature sensor.
- Random minor coding style improvements.
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Merge tag 'imx-dt64-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree changes for 5.3:
- Add i.MX8MQ based Librem5 devkit support.
- Add SNVS power key support for i.MX8MQ and i.MX8MM.
- Add GPIO alias for imx8mq and i.MX8QXP.
- A series from Daniel Baluta to add SAI devices and enable audio
support for imx8mm-evk board.
- Add DDR performance monitor unit support for i.MX8QXP.
- Add irqsteer interrupt controller device for i.MX8MQ SoC.
- Add CPU speed grading and all OPPs for i.MX8MM and i.MX8MQ.
- Add OCOTP device node for i.MX8QXP.
- Various device addition for LS1028A: SATA, qDMA, USB, Mali DP500 and
temperature sensor.
- Random minor coding style improvements.
* tag 'imx-dt64-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (32 commits)
arm64: dts: librem5: enable the SNVS power key
arm64: dts: librem5: Limit the USB to 5V
arm64: dts: imx8qxp: added ddr performance monitor nodes
arm64: dts: imx8qxp: sort LSIO subsystem devices
arm64: dts: imx8qxp: sort alias alphabetically
arm64: dts: imx8qxp: Add lsio_mu13 node
arm64: dts: imx8mm-evk: Enable audio codec wm8524
arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit
arm64: dts: fsl: ls1028a: Add qDMA node
arm64: dts: imx8mm: Enable SNVS power key according to board design
arm64: dts: imx8mq-evk: Enable SNVS power key
arm64: dts: ls1028a: add crypto node
arm64: dts: ls1028a: Add temperature sensor node
arm64: dts: imx8mm: Move gic node into soc node
arm64: dts: imx8mm: Move usbphy out of soc node
arm64: dts: imx8mm: Pass the 'ranges' property
arm64: dts: imx8mm: Pass a unit name for the 'soc' node
arm64: dts: fsl: imx8mq: add the snvs power key node
arm64: dts: ls1028a: fix watchdog device node
arm64: dts: ls1028a: Enable sata.
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- This is a set of device tree changes with new clocks - adding
clock info for i.MX8 GPIO and SNVS RTC device.
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Merge tag 'imx-dt-clkdep-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX DT changes with new clock for 5.3:
- This is a set of device tree changes with new clocks - adding
clock info for i.MX8 GPIO and SNVS RTC device.
* tag 'imx-dt-clkdep-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: imx8mq: add clock for SNVS RTC node
arm64: dts: imx8mm: add clock for SNVS RTC node
arm64: dts: imx8mm: add clock for GPIO node
clk: imx8m: Add GIC clock
dt-bindings: clock: imx8m: Add GIC clock
clk: imx8mm: add SNVS clock to clock tree
dt-bindings: clock: imx8mm: Add SNVS clock
clk: imx8mq: add SNVS clock to clock tree
dt-bindings: clock: imx8mq: Add SNVS clock
clk: imx8mm: add GPIO clocks to clock tree
dt-bindings: clock: imx8mm: Add GPIO clocks
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains the bulk of the Tegra changes this cycle. It has a bunch
of improvements across almost all boards. These are mostly small and not
too exciting additions.
Most notably perhaps is the continuation of Jetson Nano support, which
is now mostly on feature parity with Jetson TX1.
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Merge tag 'tegra-for-5.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.3-rc1
This contains the bulk of the Tegra changes this cycle. It has a bunch
of improvements across almost all boards. These are mostly small and not
too exciting additions.
Most notably perhaps is the continuation of Jetson Nano support, which
is now mostly on feature parity with Jetson TX1.
* tag 'tegra-for-5.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (28 commits)
arm64: tegra: Enable PCIe slots in P2972-0000 board
arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT
arm64: tegra: Add PEX DPD states as pinctrl properties
arm64: tegra: Enable ACONNECT, ADMA and AGIC
arm64: tegra: Add ACONNECT, ADMA and AGIC nodes
arm64: tegra: Sort device tree nodes alphabetically
arm64: tegra: Fix Jetson Nano GPU regulator
arm64: tegra: Update Jetson TX1 GPU regulator timings
arm64: tegra: Fix AGIC register range
arm64: tegra: Add INA3221 channel info for Jetson TX2
arm64: tegra: Enable PWM on Jetson Nano
arm64: tegra: Enable CPU sleep on Jetson Nano
arm64: tegra: Add ID EEPROMs on Jetson Nano
arm64: tegra: Add ID EEPROM for Jetson TX2 Developer Kit
arm64: tegra: Add ID EEPROM for Jetson TX2 module
arm64: tegra: Add ID EEPROM for Jetson TX1 Developer Kit
arm64: tegra: Add ID EEPROM for Jetson TX1 module
arm64: tegra: Don't use architected timer for suspend on Tegra210
arm64: tegra: Mark architected timer as always on
arm64: tegra: Add pin control states for I2C on Tegra186
...
Signed-off-by: Olof Johansson <olof@lixom.net>
For Armada 7K/8K:
- enable AP806 thermal throttling with CPUfreq
- add missing #interrupt-cells property allowing configuring
interrupt for GPIO
On Armada 8040 based board:
- Fix PCI memory window on Mcbin board
- Set SFP power limit on clearfog GT board
- Disable AP I2C on Armada-8040-DB
On Armada 3720 based board espressobin correct the SPI node used for
NOR flash
On Armada 7040 DB board add USB current regulators
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Merge tag 'mvebu-dt64-5.3-1' of git://git.infradead.org/linux-mvebu into arm/dt
mvebu dt64 for 5.3 (part 1)
For Armada 7K/8K:
- enable AP806 thermal throttling with CPUfreq
- add missing #interrupt-cells property allowing configuring
interrupt for GPIO
On Armada 8040 based board:
- Fix PCI memory window on Mcbin board
- Set SFP power limit on clearfog GT board
- Disable AP I2C on Armada-8040-DB
On Armada 3720 based board espressobin correct the SPI node used for
NOR flash
On Armada 7040 DB board add USB current regulators
* tag 'mvebu-dt64-5.3-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add missing #interrupt-cells property
arm64: dts: marvell: armada-7040-db: Add USB current regulators
arm64: dts: armada-3720-espressobin: correct spi node
arm64: dts: marvell: Disable AP I2C on Armada-8040-DB
arm64: dts: marvell: Enable AP806 thermal throttling with CPUfreq
arm64: dts: marvell: Change core numbering in AP806 thermal-node
arm64: dts: marvell: clearfog-gt-8k: set SFP power limit
arm64: dts: marvell: mcbin: enlarge PCI memory window
Signed-off-by: Olof Johansson <olof@lixom.net>
* Renesas SoCs
- Revise usb2_phy nodes and phys properties according to updated bindings
- Use ip=on for bootargs
* R-Car Gen 3 and RZ/G2M (r8a774a1) SoCs
- Add dynamic power coefficient
- Create thermal zone to support IPA
* R-Car E3 (r8a77990) and D3 (r8a77995) SoCs
- Point LVDS0 to its companion LVDS1
* R-Car E3 (r8a77990) SoC
- Corresct register range of DU
* R-Car E3 (r8a77990) based Ebisu board
- Remove renesas, no-ether-link property
* R-Car D3 (r8a77995) based Draak board:
- Remove unnecessary index from vin4 port
* RZ/G2M (r8a774a1) based HiHope main and sub-boards:
- Initial support
- Describe CPU capacity and topoligy
- Enable CMT, HDMI, LEDs, PCIe RWDT, SCIF, SDHI, TMU, and USB 2.0 and 3.0
* RZ/G2E (r8a774c0) SoC based EK874 board:
- Clean up CPU compatible strings
- Enable: Bluetooth, HDMI audio and video, TPU, USB 3.0 and WLAN
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Merge tag 'renesas-arm64-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt
Renesas ARM64 Based SoC DT Updates for v5.3
* Renesas SoCs
- Revise usb2_phy nodes and phys properties according to updated bindings
- Use ip=on for bootargs
* R-Car Gen 3 and RZ/G2M (r8a774a1) SoCs
- Add dynamic power coefficient
- Create thermal zone to support IPA
* R-Car E3 (r8a77990) and D3 (r8a77995) SoCs
- Point LVDS0 to its companion LVDS1
* R-Car E3 (r8a77990) SoC
- Corresct register range of DU
* R-Car E3 (r8a77990) based Ebisu board
- Remove renesas, no-ether-link property
* R-Car D3 (r8a77995) based Draak board:
- Remove unnecessary index from vin4 port
* RZ/G2M (r8a774a1) based HiHope main and sub-boards:
- Initial support
- Describe CPU capacity and topoligy
- Enable CMT, HDMI, LEDs, PCIe RWDT, SCIF, SDHI, TMU, and USB 2.0 and 3.0
* RZ/G2E (r8a774c0) SoC based EK874 board:
- Clean up CPU compatible strings
- Enable: Bluetooth, HDMI audio and video, TPU, USB 3.0 and WLAN
* tag 'renesas-arm64-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (53 commits)
arm64: dts: renesas: hihope-common: Remove "label" from LEDs
arm64: dts: renesas: hihope-common: Add HDMI support
arm64: dts: renesas: r8a774a1: Add HDMI encoder instance
arm64: dts: renesas: r8a774a1: Add dynamic power coefficient
arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA
arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz
arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC
arm64: dts: renesas: hihope-common: Add LEDs support
arm64: dts: renesas: hihope-common: Enable USB3.0
arm64: dts: renesas: hihope-common: Add USB 2.0 support
arm64: dts: renesas: r8a774a1: Fix USB 2.0 clocks
arm64: dts: renesas: r8a774a1: Add TMU device nodes
arm64: dts: renesas: r8a774a1: Add CMT device nodes
arm64: dts: renesas: hihope-common: Add uSD and eMMC
arm64: dts: renesas: r8a77990: Fix register range of display node
arm64: dts: renesas: cat874: Enable usb role switch support
arm64: dts: renesas: cat874: Enable USB3.0 host/peripheral device node
arm64: dts: renesas: r8a7799[05]: Point LVDS0 to its companion LVDS1
arm64: dts: renesas: hihope-common: Add RWDT support
arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
arm and arm64, a fix for the array syntax raised by our DT schemas.
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Merge tag 'sunxi-h3-h5-for-5.3-201906210812' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
This time we only have a single patch for our command branch between
arm and arm64, a fix for the array syntax raised by our DT schemas.
* tag 'sunxi-h3-h5-for-5.3-201906210812' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: h3/h5: Fix GPIO regulator state array
Signed-off-by: Olof Johansson <olof@lixom.net>
- Some fixes for the DT schemas that were added during this release
- Wifi support for the H6
- LRADC suppport for the A64
- Some background work on A64 boards, to enable various devices such
as touchscreens, PMIC, audio, wifi, etc.
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Merge tag 'sunxi-dt64-for-5.3-201906210808' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of arm64 DT changes, this time with:
- Some fixes for the DT schemas that were added during this release
- Wifi support for the H6
- LRADC suppport for the A64
- Some background work on A64 boards, to enable various devices such
as touchscreens, PMIC, audio, wifi, etc.
* tag 'sunxi-dt64-for-5.3-201906210808' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h6: Add DMA node
arm64: dts: allwinner: a64: Add lradc node
dt-bindings: input: sun4i-lradc-keys: Add A64 compatible
arm64: dts: allwinner: h6: add r_watchog node
arm64: dts: allwinner: h6: add watchdog node
dt-bindings: watchdog: add Allwinner H6 watchdog
arm64: dts: allwinner: a64: Enable audio on Teres-I
arm64: dts: allwinner: a64: bananapi-m64: Enable PMIC USB power supply
arm64: dts: allwinner: axp803: add USB power supply node
arm64: dts: allwinner: a64: Add pinmux for RGB666 LCD
arm64: dts: allwinner: a64: orangepi-win: Add wifi and bluetooth nodes
arm64: dts: allwinner: h6: add PIO VCC bank supplies for Pine H64
arm64: dts: allwinner: a64-oceanic-5205-5inmfd: Enable GT911 CTP
arm64: dts: allwinner: a64-amarula-relic: Add GT5663 CTP node
arm64: dts: allwinner: a64: move I2C pinctrl to dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
* Hi3660 SoC and related boards:
- Added CoreSight trace components
* Hi6220 SoC and related boards:
- Updated CoreSight funnel and replicator using new bindings to fix warning
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Merge tag 'hisi-arm64-dt-for-5.3' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon SoCs DT updates for v5.3
* Hi3660 SoC and related boards:
- Added CoreSight trace components
* Hi6220 SoC and related boards:
- Updated CoreSight funnel and replicator using new bindings to fix warning
* tag 'hisi-arm64-dt-for-5.3' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi3660: Add CoreSight support
arm64: dts: hi6220: Update coresight DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
W dniu 19.06.2019 o 16:21, Olof Johansson pisze:
> On Mon, Jun 17, 2019 at 06:04:09PM +0200, Marcin Juszkiewicz wrote:
>> Follow x86-64 defconfig on enabling basic LVM support.
>>
>> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
>
> Do you need this to be =y? If you use LVM, you usually boot with a ramdisk that
> will hold modules.
Right. Forgot to change.
From 63003d0047062949a1231f67e1efdcb96b54323a Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Mon, 27 May 2019 20:14:34 +0200
Subject: [PATCH 1/3] arm64 defconfig: enable LVM support
Follow x86-64 defconfig on enabling basic LVM support.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Otherwise, selecting it without MODULES leads to build failures.
Fixes: 58557e486f89 ("arm64: Allow user selection of ARM64_MODULE_PLTS")
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Add nodes for GPU (Mali T760) to Exynos7. Current support for Exynos7
misses a lot, including proper clocks, power domains, frequency and
voltage scaling and cooling. However this still can provide basic GPU
description. Not tested on HW.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add nodes for GPU (Mali T760) to Exynos5433. Missing element is the
cooling device. Not tested on HW.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The BPF code now takes care of mapping the code pages executable
after mapping them read-only, to ensure that no RWX mapped regions
are needed, even transiently. This means we can drop the executable
permissions from the mapping at allocation time.
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
In order to avoid transient inconsistencies where freed code pages
are remapped writable while stale TLB entries still exist on other
cores, mark the kprobes text pages with the VM_FLUSH_RESET_PERMS
attribute. This instructs the core vmalloc code not to defer the
TLB flush when this region is unmapped and returned to the page
allocator.
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Wire up the special helper functions to manipulate aliases of vmalloc
regions in the linear map.
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Now that the core code manages the executable permissions of code
regions of modules explicitly, it is no longer necessary to create
the module vmalloc regions with RWX permissions, and we can create
them with RW- permissions instead, which is preferred from a
security perspective.
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Make ARM64_MODULE_PLTS a selectable Kconfig symbol, since some people
might have very big modules spilling out of the dedicated module area
into vmalloc. Help text is copied from the ARM 32-bit counterpart and
modified to a mention of KASLR and specific ARM errata workaround(s).
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Some Qualcomm Snapdragon based laptops built to run Microsoft Windows
are clearly ACPI 5.1 based, given that that is the first ACPI revision
that supports ARM, and introduced the FADT 'arm_boot_flags' field,
which has a non-zero field on those systems.
So in these cases, infer from the ARM boot flags that the FADT must be
5.1 or later, and treat it as 5.1.
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Tested-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The external PCF8563 RTC chip's interrupt line is connected to the NMI
line on the SoC.
Add the interrupt line to the device tree.
Fixes: 17ebc33afc35 ("arm64: allwinner: h6: add PCF8563 RTC on Pine H64 board")
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
