6656 Commits

Author SHA1 Message Date
Bartosz Golaszewski
262abd2d17 pinctrl: intel: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
588ad2b1b6 pinctrl: cherryview: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
78329866ef pinctrl: ingenic: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
4125651b3d pinctrl: as3722: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
b2979a1786 pinctrl: cy8c95x0: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
f7fdb230ca pinctrl: vt8500: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
ddfba5bde6 pinctrl: axp209: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
47ad5c97ba pinctrl: mediatek: paris: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
6232d8b934 pinctrl: mediatek: common: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
1b5f829b17 pinctrl: mediatek: moore: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
3607ac37a4 pinctrl: cirrus: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
91dff6b66e pinctrl: rk805: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
da70bf79ef pinctrl: ocelot: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
fed493fce8 pinctrl: starfive: jh7110: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
7cdd1db6af pinctrl: starfive: jh7100: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
a330504905 pinctrl: spear: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
164fcf1eb3 pinctrl: stm32: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
0bea3e7c15 pinctrl: bcm: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
af80a91199 pinctrl: renesas: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
481a59fb3d pinctrl: nuvoton: npcm8xx: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
c54d686d7d pinctrl: nuvoton: npcm7xx: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
ec963d04ca pinctrl: provide new GPIO-to-pinctrl glue helpers
Currently the pinctrl GPIO helpers all take a number from the global
GPIO numberspace - of which we're trying to get rid of as argument.

These helpers are almost universally called from GPIOLIB driver
callbacks which take a pointer to the backing gpio_chip and the
controller-relative offset as arguments.

Let's provide improved variants of these functions that match the
GPIOLIB signatures as the first step in removing the older flavor.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:18 +01:00
Linus Torvalds
90b0c2b2ed Pin control changes for the v6.7 kernel cycle
New drivers:
 
 - Realtek RTD family pin control driver and RTD1619B,
   RTD1319D and RTD1315E subdrivers.
 
 - Nuvoton NPCM8xx combined pin control and GPIO driver.
 
 - Amlogic T7 pin control driver.
 
 - Renesas RZ/G3S pin control driver.
 
 Improvements:
 
 - A number of additional UART groups added to the Mediatek
   MT7981 driver.
 
 - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125
   and SDM660.
 
 - Extra GPIO banks for the Sunxi H616.
 
 - MLSP I2C6 function support in Qualcomm MSM8226.
 
 - Some __counted_by() annotations for dynamic arrays.
 
 - Ongoing work to make remove() return void.
 
 - LSBC groups and functions in the Renesas R8A7778.
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Merge tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No pin control core changes this time.

  New drivers:

   - Realtek RTD family pin control driver and RTD1619B, RTD1319D and
     RTD1315E subdrivers

   - Nuvoton NPCM8xx combined pin control and GPIO driver

   - Amlogic T7 pin control driver

   - Renesas RZ/G3S pin control driver

  Improvements:

   - A number of additional UART groups added to the Mediatek MT7981
     driver

   - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125 and SDM660

   - Extra GPIO banks for the Sunxi H616

   - MLSP I2C6 function support in Qualcomm MSM8226

   - Some __counted_by() annotations for dynamic arrays

   - Ongoing work to make remove() return void

   - LSBC groups and functions in the Renesas R8A7778"

* tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits)
  pinctrl: Use device_get_match_data()
  dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent
  dt-bindings: pinctrl: nuvoton,npcm845: Add missing additionalProperties on gpio child nodes
  dt-bindings: pinctrl: brcm: Ensure all child node properties are documented
  pinctrl: renesas: rzn1: Convert to platform remove callback returning void
  pinctrl: renesas: rzg2l: Add RZ/G3S support
  dt-bindings: pinctrl: renesas: Document RZ/G3S SoC
  pinctrl: renesas: rzg2l: Add support for different DS values on different groups
  pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration
  pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S
  pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets
  pinctrl: renesas: rzg2l: Index all registers based on port offset
  pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
  pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions
  pinctrl: intel: fetch community only when we need it
  pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
  pinctrl: cherryview: Convert to platform remove callback returning void
  pinctrl: sprd-sc9860: Convert to platform remove callback returning void
  pinctrl: qcom/msm: Convert to platform remove callback returning void
  pinctrl: qcom/lpi: Convert to platform remove callback returning void
  ...
2023-11-03 19:15:19 -10:00
Linus Torvalds
b05ddad009 gpio updates for v6.7-rc1
GPIOLIB core:
 - provide interfaces allowing users to retrieve, manage and query the
   reference counted GPIO device instead of accessing the private gpio_chip
   structure
 - replace gpiochip_find() with gpio_device_find()
 - remove unused acpi_get_and_request_gpiod()
 - improve the ignore_interrupt functionality in GPIO ACPI
 - correct notifier return codes in gpiolib-of
 - unexport gpiod_set_transitory() as it's unused outside of core GPIO code
 - while there are still external users accessing struct gpio_chip, let's
   make gpiochip_get_desc() public so that they at least use the preferred
   helper
 - improve locking for lookup tables
 - annotate struct linereq with __counted_by
 - improve GPIOLIB docs
 - add an OF quirk for LED trigger sources
 
 Driver improvements:
 - convert all GPIO drivers with .remove() callbacks to using the new
   variant returning void instead of int
 - stop accessing the GPIOLIB private structures in gpio-mockup,
   i2c-mux-gpio, hte-tegra194, gpio-sim
 - use the recommended pattern for autofree variables in gpio-sim
 - add support for more models to gpio-loongson
 - use a notifier chain to notify other blocks about interrupts in
   gpio-eic-sprd instead of looking up GPIO devices on every interrupt
 - convert gpio-pca953x and gpio-fx6408 to using the maple tree regmap
   cache
 - don't include GPIOLIB internal headers in drivers which don't need them
 - move the ingenic NAND quirk into gpiolib-of
 - add an ignore interrupt quirk for Peaq C1010
 - drop static GPIO base from gpio-omap, gpio-f7188x
 - use the preferred device_get_match_data() function in drivers that still
   don't
 - refactor gpio-pca953x: switch to using DEFINE_SIMPLE_DEV_PM_OPS(), use
   cleanup helpers, use dev_err_probe() where it makes sense, fully convert
   to using devres and some other minor tweaks
 
 DT bindings:
 - add support for a new model to gpio-vf610 and update existing properties
 - add support for more loongson models
 - add missing support for imx models that are used but undocumented
 - convert bindings for Intel IXP4xx to schema
 
 Minor stuff:
 - deprecate gpio-mockup in favor of gpio-sim
 - include missing headers here and there
 - stop using gpiochip_find() in OMAP1 board files
 - minor tweaks in gpio-vf610, gpio-hisi
 - remove unneeded 'extern' specifiers from headers
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Merge tag 'gpio-updates-for-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "We don't have any new drivers. The loongson driver is getting extended
  with support for new models. There's a big refactor of gpio-pca953x
  and many small improvements to others.

  The GPIO code in the kernel has acquired a lot of cruft over the years
  as well as many abusers of the API across the kernel tree. This
  release cycle we have started a major cleanup and improvement effort
  that will most likely span several releases. We have started by
  converting external users of struct gpio_chip to accessing the wrapper
  around it - struct gpio_device. This is because the latter is
  reference counted while the former is removed when the provider is
  unbound. We also removed several instances of drivers accessing
  private GPIOLIB structures and including the private header from
  drivers/gpio/.

  To that end you'll see several commits aimed at different subsystems
  (acked by relevant maintainers) as well as two merges from the
  x86/platform tree.

  We'll then rework the locking in GPIOLIB which currently uses a big
  spinlock for many different things and could use becoming more
  fine-grained, especially as it doesn't even get the locking right.
  We'll also use SRCU for protecting the gpio_chip pointer against
  in-kernel hot-unplug crashes similar to what we saw triggered from
  user-space and fixed with semaphores in gpiolib-cdev. The core GPIOLIB
  is still vulnerable to these use-cases. I'm just mentioning the plans
  here, this is not part of this PR.

  You'll see some new instances of using __free(). We've added a
  gpio_device_put cleanup helper similar to the put_device one
  introduced by Peter Zijlstra and used it according to the preferred
  pattern except where it didn't make sense.

  GPIOLIB core:
   - provide interfaces allowing users to retrieve, manage and query the
     reference counted GPIO device instead of accessing the private
     gpio_chip structure
   - replace gpiochip_find() with gpio_device_find()
   - remove unused acpi_get_and_request_gpiod()
   - improve the ignore_interrupt functionality in GPIO ACPI
   - correct notifier return codes in gpiolib-of
   - unexport gpiod_set_transitory() as it's unused outside of core GPIO
     code
   - while there are still external users accessing struct gpio_chip,
     let's make gpiochip_get_desc() public so that they at least use the
     preferred helper
   - improve locking for lookup tables
   - annotate struct linereq with __counted_by
   - improve GPIOLIB docs
   - add an OF quirk for LED trigger sources

  Driver improvements:
   - convert all GPIO drivers with .remove() callbacks to using the new
     variant returning void instead of int
   - stop accessing the GPIOLIB private structures in gpio-mockup,
     i2c-mux-gpio, hte-tegra194, gpio-sim
   - use the recommended pattern for autofree variables in gpio-sim
   - add support for more models to gpio-loongson
   - use a notifier chain to notify other blocks about interrupts in
     gpio-eic-sprd instead of looking up GPIO devices on every interrupt
   - convert gpio-pca953x and gpio-fx6408 to using the maple tree regmap
     cache
   - don't include GPIOLIB internal headers in drivers which don't need
     them
   - move the ingenic NAND quirk into gpiolib-of
   - add an ignore interrupt quirk for Peaq C1010
   - drop static GPIO base from gpio-omap, gpio-f7188x
   - use the preferred device_get_match_data() function in drivers that
     still don't
   - refactor gpio-pca953x: switch to using DEFINE_SIMPLE_DEV_PM_OPS(),
     use cleanup helpers, use dev_err_probe() where it makes sense,
     fully convert to using devres and some other minor tweaks

  DT bindings:
   - add support for a new model to gpio-vf610 and update existing
     properties
   - add support for more loongson models
   - add missing support for imx models that are used but undocumented
   - convert bindings for Intel IXP4xx to schema

  Minor stuff:
   - deprecate gpio-mockup in favor of gpio-sim
   - include missing headers here and there
   - stop using gpiochip_find() in OMAP1 board files
   - minor tweaks in gpio-vf610, gpio-hisi
   - remove unneeded 'extern' specifiers from headers"

* tag 'gpio-updates-for-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (108 commits)
  hte: tegra194: add GPIOLIB dependency
  hte: tegra194: don't access struct gpio_chip
  gpiolib: provide gpio_device_get_base()
  i2c: mux: gpio: don't fiddle with GPIOLIB internals
  gpiolib: provide gpiod_to_gpio_device()
  gpiolib: provide gpio_device_to_device()
  gpio: hisi: Fix format specifier
  gpiolib: provide gpio_device_find_by_fwnode()
  gpio: acpi: remove acpi_get_and_request_gpiod()
  gpio: Use device_get_match_data()
  gpio: vf610: update comment for i.MX8ULP and i.MX93 legacy compatibles
  platform/x86: int3472: Switch to devm_get_gpiod()
  platform/x86: int3472: Stop using gpiod_toggle_active_low()
  platform/x86: int3472: Add new skl_int3472_gpiod_get_from_temp_lookup() helper
  platform/x86: int3472: Add new skl_int3472_fill_gpiod_lookup() helper
  gpio: vf610: simplify code by dropping data check
  gpio: vf610: add i.MX8ULP of_device_id entry
  dt-bindings: gpio: vf610: add i.MX95 compatible
  dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93
  dt-bindings: gpio: vf610: update gpio-ranges
  ...
2023-10-31 17:21:54 -10:00
Rob Herring
63bffc2d3a pinctrl: Use device_get_match_data()
Use preferred device_get_match_data() instead of of_match_device() to
get the driver match data. With this, adjust the includes to explicitly
include the correct headers.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20231009172923.2457844-18-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-30 14:50:42 +01:00
Rafael J. Wysocki
e8c3c7f97a Merge branches 'acpi-ec', 'acpi-sysfs', 'acpi-misc' and 'acpi-uid'
Merge ACPI EC driver updates, ACPI sysfs interface updates, misc updates
related to ACPI and changes related to ACPI _UID handling for 6.7-rc1:

 - Add EC GPE detection quirk for HP 250 G7 Notebook PC (Jonathan
   Denose).

 - Fix and clean up create_pnp_modalias() and create_of_modalias()
   (Christophe JAILLET).

 - Modify 2 pieces of code to use acpi_evaluate_dsm_typed() (Andy
   Shevchenko).

 - Define acpi_dev_uid_match() for matching _UID and use it in several
   places (Raag Jadav).

 - Use acpi_device_uid() for fetching _UID in 2 places (Raag Jadav).

* acpi-ec:
  ACPI: EC: Add quirk for HP 250 G7 Notebook PC

* acpi-sysfs:
  ACPI: sysfs: Clean up create_pnp_modalias() and create_of_modalias()
  ACPI: sysfs: Fix create_pnp_modalias() and create_of_modalias()

* acpi-misc:
  ACPI: x86: s2idle: Switch to use acpi_evaluate_dsm_typed()
  ACPI: PCI: Switch to use acpi_evaluate_dsm_typed()

* acpi-uid:
  perf: arm_cspmu: use acpi_dev_hid_uid_match() for matching _HID and _UID
  ACPI: x86: use acpi_dev_uid_match() for matching _UID
  ACPI: utils: use acpi_dev_uid_match() for matching _UID
  pinctrl: intel: use acpi_dev_uid_match() for matching _UID
  ACPI: utils: Introduce acpi_dev_uid_match() for matching _UID
  perf: qcom: use acpi_device_uid() for fetching _UID
  ACPI: sysfs: use acpi_device_uid() for fetching _UID
2023-10-26 14:59:52 +02:00
Raag Jadav
2d5bd3cbb0 pinctrl: intel: use acpi_dev_uid_match() for matching _UID
Convert manual _UID references to use the standard ACPI helper.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-10-24 21:49:27 +02:00
Andy Shevchenko
62140a1e4d Revert "pinctrl: avoid unsafe code pattern in find_pinctrl()"
The commit breaks MMC enumeration on the Intel Merrifield
plaform.

Before:
[   36.439057] mmc0: SDHCI controller on PCI [0000:00:01.0] using ADMA
[   36.450924] mmc2: SDHCI controller on PCI [0000:00:01.3] using ADMA
[   36.459355] mmc1: SDHCI controller on PCI [0000:00:01.2] using ADMA
[   36.706399] mmc0: new DDR MMC card at address 0001
[   37.058972] mmc2: new ultra high speed DDR50 SDIO card at address 0001
[   37.278977] mmcblk0: mmc0:0001 H4G1d 3.64 GiB
[   37.297300]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10

After:
[   36.436704] mmc2: SDHCI controller on PCI [0000:00:01.3] using ADMA
[   36.436720] mmc1: SDHCI controller on PCI [0000:00:01.0] using ADMA
[   36.463685] mmc0: SDHCI controller on PCI [0000:00:01.2] using ADMA
[   36.720627] mmc1: new DDR MMC card at address 0001
[   37.068181] mmc2: new ultra high speed DDR50 SDIO card at address 0001
[   37.279998] mmcblk1: mmc1:0001 H4G1d 3.64 GiB
[   37.302670]  mmcblk1: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10

This reverts commit c153a4edff6ab01370fcac8e46f9c89cca1060c2.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231017141806.535191-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-19 10:12:48 +02:00
Linus Walleij
593bcf6889 intel-pinctrl for v6.7-1
* Merge "Drop runtime PM support for Baytrail and Lynxpoint pinctrl" (Raag)
 * Small improvements here and there in the Intel pin control drivers (Raag)
 * Switch to RAII for locking in the Intel core and Cherry View drivers
 * Enable non-ACPI enumeration in the Intel Denverton driver
 * Use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS() in a couple of drivers
 * Introduce array_size.h and use in in the Intel pin control drivers
 
 The following is an automated git shortlog grouped by driver:
 
 baytrail:
  -  Replace kernel.h by what is actually being used
  -  drop runtime PM support
  -  fix debounce disable case
 
 broxton:
  -  Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()
 
 cherryview:
  -  reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
  -  Convert to platform remove callback returning void
  -  Simplify code with cleanup helpers
  -  Avoid duplicated I/O
  -  Replace kernel.h by what is actually being used
 
 denverton:
  -  Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()
  -  Enable platform device in the absence of ACPI enumeration
 
 intel:
  -  fetch community only when we need it
  -  refine intel_config_set_pull() function
  -  Replace kernel.h by what is actually being used
  -  Simplify code with cleanup helpers
 
 lynxpoint:
  -  Replace kernel.h by what is actually being used
  -  drop runtime PM support
 
 merrifield:
  -  Replace kernel.h by what is actually being used
 
 moorefield:
  -  Replace kernel.h by what is actually being used
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Merge tag 'intel-pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v6.7-1

* Merge "Drop runtime PM support for Baytrail and Lynxpoint pinctrl" (Raag)
* Small improvements here and there in the Intel pin control drivers (Raag)
* Switch to RAII for locking in the Intel core and Cherry View drivers
* Enable non-ACPI enumeration in the Intel Denverton driver
* Use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS() in a couple of drivers
* Introduce array_size.h and use in in the Intel pin control drivers

The following is an automated git shortlog grouped by driver:

baytrail:
 -  Replace kernel.h by what is actually being used
 -  drop runtime PM support
 -  fix debounce disable case

broxton:
 -  Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()

cherryview:
 -  reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
 -  Convert to platform remove callback returning void
 -  Simplify code with cleanup helpers
 -  Avoid duplicated I/O
 -  Replace kernel.h by what is actually being used

denverton:
 -  Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()
 -  Enable platform device in the absence of ACPI enumeration

intel:
 -  fetch community only when we need it
 -  refine intel_config_set_pull() function
 -  Replace kernel.h by what is actually being used
 -  Simplify code with cleanup helpers

lynxpoint:
 -  Replace kernel.h by what is actually being used
 -  drop runtime PM support

merrifield:
 -  Replace kernel.h by what is actually being used

moorefield:
 -  Replace kernel.h by what is actually being used
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-16 22:00:13 +02:00
Krzysztof Kozlowski
c8befdc411 pinctrl: qcom: lpass-lpi: fix concurrent register updates
The Qualcomm LPASS LPI pin controller driver uses one lock for guarding
Read-Modify-Write code for slew rate registers.  However the pin
configuration and muxing registers have exactly the same RMW code but
are not protected.

Pin controller framework does not provide locking here, thus it is
possible to trigger simultaneous change of pin configuration registers
resulting in non-atomic changes.

Protect from concurrent access by re-using the same lock used to cover
the slew rate register.  Using the same lock instead of adding second
one will make more sense, once we add support for newer Qualcomm SoC,
where slew rate is configured in the same register as pin
configuration/muxing.

Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Cc: stable@vger.kernel.org
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231013145705.219954-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-16 14:56:49 +02:00
Linus Walleij
30d75d3c6f Samsung pinctrl drivers changes for v6.7
Few cleanups, improvements (use __counted_by annotation) and finally
 switch to dynamic allocation of GPIO numberspace.
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Merge tag 'samsung-pinctrl-6.7' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel

Samsung pinctrl drivers changes for v6.7

Few cleanups, improvements (use __counted_by annotation) and finally
switch to dynamic allocation of GPIO numberspace.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-16 11:41:53 +02:00
Linus Walleij
b4e10c3190 pinctrl: renesas: Updates for v6.7 (take two)
- Add pin groups for the Local Bus State Controller (LBSC) on R-Car
     M1A,
   - Add support for the RZ/G3S (R9A08G045) SoC,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.7 (take two)

  - Add pin groups for the Local Bus State Controller (LBSC) on R-Car
    M1A,
  - Add support for the RZ/G3S (R9A08G045) SoC,
  - Miscellaneous fixes and improvements.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-13 15:32:09 +02:00
Uwe Kleine-König
583d807320 pinctrl: renesas: rzn1: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231009083856.222030-20-u.kleine-koenig@pengutronix.de
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
c6a088e5a0 pinctrl: renesas: rzg2l: Add RZ/G3S support
Add basic support for RZ/G3S to be able to boot from SD card, have a
running console port, and use GPIOs.  RZ/G3S has 82 general-purpose IO
ports.  Support for the remaining pin functions (e.g. Ethernet, XSPI)
will be added along with controller-specific support.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-22-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
ae5b425faf pinctrl: renesas: rzg2l: Add support for different DS values on different groups
RZ/G3S supports different drive strength values for different power
sources and pin groups (A, B, C).  On each group there could be up to 4
drive strength values per power source.  Available power sources are
1v8, 2v5, 3v3.  Drive strength values are more fine tuned than what was
previously available on the driver thus the necessity of having
micro-amp support.  As drive strength and power source values are linked
together the hardware setup for these was moved at the end of
rzg2l_pinctrl_pinconf_set() to ensure proper validation of the new
values.

The drive strength values are expected to be initialized though the
SoC-specific hardware configuration data structure.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-19-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
cca38201b4 pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration
Move drive strength and output impedance values to the SoC-specific
configuration data structure (struct rzg2l_hwcfg).  This allows
extending the drive strength support for RZ/G3S.  Along with this the DS
values were converted to uA for simple integration with RZ/G3S support.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-18-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
35a3610e5a pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S
On RZ/G3S PFC register allow setting 8 functions for individual ports
(function1 to function8). For function1 the register need to be
configured with 0, for function8 the register need to be configured with
7.  We cannot use zero based addressing when requesting functions from
different code places as the documentation
(RZG3S_pinfunction_List_r1.0.xlsx) states explicitly that function0 is
GPIO.

Add a new member to struct rzg2l_hwcfg that will keep the offset that
needs to be substracted before applying a value to a PFC register.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-17-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
1f89aa906f pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets
SD, PWPR power registers have different offsets b/w RZ/G2L and RZ/G3S.
Add a per SoC configuration data structure that is initialized with the
proper register offsets for individual SoCs.  The rzg2l_hwcfg structure
will be extended further in later commits.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-16-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
77e18969da pinctrl: renesas: rzg2l: Index all registers based on port offset
To get the address that needs to be read/written for specific port
functionalities, the P(), PM(), PMC(), PFC(), PIN(), IOLH() IEN(),
ISEL() macros are used.  Some of these macros receive as argument the
hardware port identifier, some the hardware port offset address (e.g.
ISEL() received port identifier, IOLH() received port offset address).
This makes it hard to extend the current driver for SoCs where port
identifiers are not contiguous in the memory map of the pin controller.
This is the case for the RZ/G3S pin controller where ports are mapped as
follows:

    port offset    port identifier
    -----------    ---------------
    0x20           P0
    0x21           P5
    0x22           P6
    0x23           P11
    0x24           P12
    0x25           P13
    0x26           P14
    0x27           P15
    0x28           P16
    0x29           P17
    0x2a           P18
    0x30           P1
    0x31           P2
    0x32           P3
    0x33           P4
    0x34           P7
    0x35           P8
    0x36           P8
    0x37           P10

To make this achievable, change all the above macros used to get the
address of a port register for a specific port functionality based on
the port hardware address.  Summarized, all the above macros will get as
argument the port offset address listed in the above table.

With this RZG2L_SINGLE_PIN_GET_PORT_OFFSET(),
RZG2L_PIN_ID_TO_PORT_OFFSET() and RZG2L_GPIO_PORT_GET_INDEX() were
replaced by RZG2L_PIN_CFG_TO_PORT_OFFSET(); RZG2L_SINGLE_PIN_GET_CFGS()
and RZG2L_GPIO_PORT_GET_CFGS() were replaced by RZG2L_PIN_CFG_TO_CAPS().

Also rzg2l_pinctrl_set_pfc_mode() does not need the port argument
anymore.  Also rzg2l_gpio_direction_input() and
rzg2l_gpio_direction_output() do not need to translate port and bit
locally as this can be done by rzg2l_gpio_set_direction().

To use the same naming for port, bit/pin, and register offset, replace
the port_offset variable names in different places by variables named
off.  There is no longer a need to initialize cfg and bit in different
code places.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20230929053915.1530607-15-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Lad Prabhakar
c944d9dea7 pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
Validate the GPIO pin request in the rzg2l_gpio_request() callback using
the rzg2l_validate_gpio_pin() function.  This stops any accidental usage
of GPIO pins which are not supported by the SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/r/20230925154548.27048-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:04 +02:00
Geert Uytterhoeven
84ba513169 pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions
Add pins, groups, and functions for the Local Bus State Controller
(LBSC) on the Renesas R-Car M1A (R8A7778) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/347b9f7627871b45aec04a3351d50219d4d260fe.1694768311.git.geert+renesas@glider.be
2023-10-13 09:38:04 +02:00
Ralph Siemsen
f055ff23c3 pinctrl: renesas: rzn1: Enable missing PINMUX
Enable pin muxing (eg. programmable function), so that the RZ/N1 GPIO
pins will be configured as specified by the pinmux in the DTS.

This used to be enabled implicitly via CONFIG_GENERIC_PINMUX_FUNCTIONS,
however that was removed, since the RZ/N1 driver does not call any of
the generic pinmux functions.

Fixes: 1308fb4e4eae14e6 ("pinctrl: rzn1: Do not select GENERIC_PIN{CTRL_GROUPS,MUX_FUNCTIONS}")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231004200008.1306798-1-ralph.siemsen@linaro.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-12 09:10:40 +02:00
Raag Jadav
8d751da9f1 pinctrl: intel: fetch community only when we need it
We check community features only in case PIN_CONFIG_BIAS_PULL_DOWN while
setting/getting pad termination. No need to fetch the community otherwise.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-11 23:40:56 +03:00
Raag Jadav
6fe13aa7c8 pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
We have a couple of pinconfig cases inside the braces which are meant for
PIN_CONFIG_BIAS_HIGH_IMPEDANCE case. Although it is valid C, it makes the
code less readable and prone to misinterpretation. Limit the braces to
PIN_CONFIG_BIAS_HIGH_IMPEDANCE case to avoid this.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-11 23:40:56 +03:00
Uwe Kleine-König
e0ba7366a6 pinctrl: cherryview: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-11 23:40:49 +03:00
Uwe Kleine-König
c341ac65bf pinctrl: sprd-sc9860: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

To convert the sprd-sc9860 driver, make sprd_pinctrl_remove()
return void (instead of zero) and use .remove_new as callback.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009162510.335208-4-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:47:50 +02:00
Uwe Kleine-König
22ee670a8a pinctrl: qcom/msm: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

To convert all those qcom pinctrl drivers, make msm_pinctrl_remove()
return void (instead of zero) and use .remove_new in all drivers.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009162510.335208-3-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:47:49 +02:00
Uwe Kleine-König
776d54c137 pinctrl: qcom/lpi: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

To convert all those qcom pinctrl drivers, make msm_pinctrl_remove()
return void (instead of zero) and use .remove_new in all drivers.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009162510.335208-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:47:49 +02:00
Uwe Kleine-König
93650550df pinctrl: ti: ti-iodelay: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-21-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:45:35 +02:00
Uwe Kleine-König
a80252efb5 pinctrl: qcom: ssbi-mpp: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-19-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:43:56 +02:00