5 Commits

Author SHA1 Message Date
Yejune Deng
15ee627781 phy: amlogic: replace devm_reset_control_array_get()
devm_reset_control_array_get_exclusive() looks more readable

Signed-off-by: Yejune Deng <yejune.deng@gmail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/1605666995-16462-1-git-send-email-yejune.deng@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-30 16:32:37 +05:30
Vinod Koul
53cde0fe02 phy: amlogic: Revert "phy: amlogic: Replace devm_reset_control_array_get()"
This reverts commit 3cc8e86721ad ("phy: amlogic: Replace
devm_reset_control_array_get()") as it caused build failure

drivers/soc/amlogic/meson-ee-pwrc.c: In function 'meson_ee_pwrc_init_domain':
drivers/soc/amlogic/meson-ee-pwrc.c:416:65: error: expected ';' before 'if'

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-17 15:29:42 +05:30
Yejune Deng
3cc8e86721 phy: amlogic: Replace devm_reset_control_array_get()
devm_reset_control_array_get_exclusive() looks more readable

Signed-off-by: Yejune Deng <yejune.deng@gmail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/1604378274-6860-1-git-send-email-yejune.deng@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-16 13:04:47 +05:30
Chunfeng Yun
202de02556 phy: amlogic: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/1604642930-29019-2-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-16 12:47:46 +05:30
Remi Pommarel
e2463559ff phy: amlogic: Add Amlogic AXG PCIE PHY Driver
This adds support for the PCI PHY found in the Amlogic AXG SoC Family.
This will allow to mutualize code in pci-meson.c between AXG and G12A
SoC.

This PHY also uses and chains an analog PHY, which on AXG platform
is needed to have reliable PCIe communication.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
2020-03-04 10:53:30 +00:00