6 Commits

Author	SHA1	Message	Date
Thomas Gleixner	f38c02f3b3	arm: Fold irq_set_chip/irq_set_handler ... Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>	2011-03-29 14:47:58 +02:00
Thomas Gleixner	6845664a6a	arm: Cleanup the irq namespace ... Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>	2011-03-29 14:47:57 +02:00
Thomas Gleixner	cf0d6b76c1	arm: dove: Use proper irq accessor functions ... Remove the obsolete desc_handle_irq() helper. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>	2011-03-29 14:47:57 +02:00
Lennert Buytenhek	9eac6d0a4e	ARM: Remove dependency of plat-orion GPIO code on mach directory includes. ... This patch makes the various mach dirs that use the plat-orion GPIO code pass in GPIO-related platform info (GPIO controller base address, secondary base IRQ number, etc) explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>	2011-03-03 16:27:02 -05:00
Lennert Buytenhek	aa456a6eba	ARM: dove: irq_data conversion. ... Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Nicolas Pitre <nico@fluxnic.net>	2011-01-13 17:18:27 +01:00
Saeed Bishara	edabd38e1a	ARM: add base support for Marvell Dove SoC ... The Marvell Dove (88AP510) is a high-performance, highly integrated, low power SoC with high-end ARM-compatible processor (known as PJ4), graphics processing unit, high-definition video decoding acceleration hardware, and a broad range of peripherals. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>	2009-11-27 15:43:06 -05:00