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3 Commits

Author SHA1 Message Date
Alex Deucher
3426d66d3e drm/amdgpu/vega20: add CLK base offset 
In case we need to access CLK registers.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-11-06 16:25:51 -05:00
Evan Quan
bde0781561 drm/amdgpu: set correct base for THM/NBIF/MP1 IP 
Set correct address base for vega20.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-08-21 14:16:50 -05:00
Feifei Xu
8ee273e516 drm/amdgpu/soc15: dynamic initialize ip offset for vega20 
Vega20 need a seperate vega20_reg_init.c due to ip base
offset difference.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-05-17 10:13:17 -05:00