IF YOU WOULD LIKE TO GET AN ACCOUNT, please write an
email to Administrator. User accounts are meant only to access repo
and report issues and/or generate pull requests.
This is a purpose-specific Git hosting for
BaseALT
projects. Thank you for your understanding!
Только зарегистрированные пользователи имеют доступ к сервису!
Для получения аккаунта, обратитесь к администратору.
ability to get struct clk pointers from a struct clk_hw so that clk providers
can consume the clks they provide, if they need to do something like that. This
has been a long missing part of the clk provider API that will help us move
away from exposing a struct clk pointer in the struct clk_hw. Tracepoints are
added for the clk_set_rate() "range" functions, similar to the tracepoints we
already have for clk_set_rate() and we added a column to debugfs to help
developers understand the hardware enable state of clks in case firmware or
bootloader state is different than what is expected. Overall the core changes
are mostly improving the clk driver writing experience.
At the driver level, we have the usual collection of driver updates and new
drivers for new SoCs. This time around the Qualcomm folks introduced a good
handful of clk drivers for various parts of three or four SoCs. The SiFive
folks added a new clk driver for their FU740 SoCs, coming in second on the
diffstat and then Atmel AT91 and Amlogic SoCs had lots of work done after that
for various new features. One last thing to note in the driver area is that the
i.MX driver has gained a new binding to support SCU clks after being on the
list for many months. It uses a two cell binding which is sort of rare in clk
DT bindings. Beyond that we have the usual set of driver fixes and tweaks that
come from more testing and finding out that some configuration was wrong or
that a driver could support being built as a module.
Core:
- Add some trace points for clk_set_rate() "range" functions
- Add hardware enable information to clk_summary debugfs
- Replace clk-provider.h with of_clk.h when possible
- Add devm variant of clk_notifier_register()
- Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw
New Drivers:
- Bindings for Canaan K210 SoC clks
- Support for SiFive FU740 PRCI
- Camera clks on Qualcomm SC7180 SoCs
- GCC and RPMh clks on Qualcomm SDX55 SoCs
- RPMh clks on Qualcomm SM8350 SoCs
- LPASS clks on Qualcomm SM8250 SoCs
Updates:
- DVFS support for AT91 clk driver
- Update git repo branch for Renesas clock drivers
- Add camera (CSI) and video-in (VIN) clocks on Renesas R-Car V3U
- Add RPC (QSPI/HyperFLASH) clocks on Renesas RZ/G2M, RZ/G2N, and RZ/G2E
- Stop using __raw_*() I/O accessors in Renesas clk drivers
- One more conversion of DT bindings to json-schema
- Make i.MX clk-gate2 driver more flexible
- New two cell binding for i.MX SCU clks
- Drop of_match_ptr() in i.MX8 clk drivers
- Add arch dependencies for Rockchip clk drivers
- Fix i2s on Rockchip rk3066
- Add MIPI DSI clks on Amlogic axg and g12 SoCs
- Support modular builds of Amlogic clk drivers
- Fix an Amlogic Video PLL clock dependency
- Samsung Kconfig dependencies updates for better compile test coverage
- Refactoring of the Samsung PLL clocks driver
- Small Tegra driver cleanups
- Minor fixes to Ingenic and VC5 clk drivers
- Cleanup patches to remove unused variables and plug memory leaks
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl/f/ycRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSXjxg/7BJMFphpZmQb3iy/lZMYfgPh2yxZvrrBj
zJ2i1mMru/C3BkXTx29HCJvj6/VC2HgGLL6fzfwe7oY3XVRT1Vxlsvka9vNZSNc2
UYNa8GUwR0mSXDzp5KnzoAQfLwvSqWUIeT8WB+Z+CJ7WIAGWnXgBlqsf/d/mr9hg
JoAh+ROpbksL6hs61WJSm+7/Yu6efS0Yj0zzLZOINFWvDIOJ+Rp4g1u+qGH9tZyO
I2Bik75Sc8hqvLUP5SVzI/1H4yLB0On+ADgVRwjvrKPVX56alYquOUMsU+sy4SeY
ONQBki3vV5gtJHG1qvkwTC5/Yw20eUsrmrc7PNECvb1zo5Tp4QuOAR5nHCb4fg8u
n7RRd1MktTAUAQxTzBaNYtix3Q19fjSR44C/1B6lKk6xkN+w4uYLi2GHrADy9rXa
SwQVTKTGc8LjGywDaAOXdAyx2FMAtt1OvkTxZ238+aoHw5nQDHWKxu5TwYK6b5jG
aEFzTCIEYlzRLqcZyGONSD0WXmQWyoNiPwJ3B7RDRfpg7dPESyKIB4MzGWiX9eDy
lri/SoVH08c1sRf8AzIoi+CUNi8geTNAHHlJfiGznrv81ttVf3FioWyWLjr+SmBV
rNxn35WxeDWoCZqtrLJlg5skVgmD8BRXLZTI9udPG8u6D7OdWdJBuMZ6EelO+OZg
/n4w8tdo3cE=
=Wt9O
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The core framework got some nice improvements this time around. We
gained the ability to get struct clk pointers from a struct clk_hw so
that clk providers can consume the clks they provide, if they need to
do something like that. This has been a long missing part of the clk
provider API that will help us move away from exposing a struct clk
pointer in the struct clk_hw. Tracepoints are added for the
clk_set_rate() "range" functions, similar to the tracepoints we
already have for clk_set_rate() and we added a column to debugfs to
help developers understand the hardware enable state of clks in case
firmware or bootloader state is different than what is expected.
Overall the core changes are mostly improving the clk driver writing
experience.
At the driver level, we have the usual collection of driver updates
and new drivers for new SoCs. This time around the Qualcomm folks
introduced a good handful of clk drivers for various parts of three or
four SoCs. The SiFive folks added a new clk driver for their FU740
SoCs, coming in second on the diffstat and then Atmel AT91 and Amlogic
SoCs had lots of work done after that for various new features. One
last thing to note in the driver area is that the i.MX driver has
gained a new binding to support SCU clks after being on the list for
many months. It uses a two cell binding which is sort of rare in clk
DT bindings. Beyond that we have the usual set of driver fixes and
tweaks that come from more testing and finding out that some
configuration was wrong or that a driver could support being built as
a module.
Summary:
Core:
- Add some trace points for clk_set_rate() "range" functions
- Add hardware enable information to clk_summary debugfs
- Replace clk-provider.h with of_clk.h when possible
- Add devm variant of clk_notifier_register()
- Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw
New Drivers:
- Bindings for Canaan K210 SoC clks
- Support for SiFive FU740 PRCI
- Camera clks on Qualcomm SC7180 SoCs
- GCC and RPMh clks on Qualcomm SDX55 SoCs
- RPMh clks on Qualcomm SM8350 SoCs
- LPASS clks on Qualcomm SM8250 SoCs
Updates:
- DVFS support for AT91 clk driver
- Update git repo branch for Renesas clock drivers
- Add camera (CSI) and video-in (VIN) clocks on Renesas R-Car V3U
- Add RPC (QSPI/HyperFLASH) clocks on Renesas RZ/G2M, RZ/G2N, and RZ/G2E
- Stop using __raw_*() I/O accessors in Renesas clk drivers
- One more conversion of DT bindings to json-schema
- Make i.MX clk-gate2 driver more flexible
- New two cell binding for i.MX SCU clks
- Drop of_match_ptr() in i.MX8 clk drivers
- Add arch dependencies for Rockchip clk drivers
- Fix i2s on Rockchip rk3066
- Add MIPI DSI clks on Amlogic axg and g12 SoCs
- Support modular builds of Amlogic clk drivers
- Fix an Amlogic Video PLL clock dependency
- Samsung Kconfig dependencies updates for better compile test coverage
- Refactoring of the Samsung PLL clocks driver
- Small Tegra driver cleanups
- Minor fixes to Ingenic and VC5 clk drivers
- Cleanup patches to remove unused variables and plug memory leaks"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (134 commits)
dt-binding: clock: Document canaan,k210-clk bindings
dt-bindings: Add Canaan vendor prefix
clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts"
clk: ingenic: Fix divider calculation with div tables
clk: sunxi-ng: Make sure divider tables have sentinel
clk: s2mps11: Fix a resource leak in error handling paths in the probe function
clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9
clk: si5351: Wait for bit clear after PLL reset
clk: at91: sam9x60: remove atmel,osc-bypass support
clk: at91: sama7g5: register cpu clock
clk: at91: clk-master: re-factor master clock
clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz
clk: at91: sama7g5: decrease lower limit for MCK0 rate
clk: at91: sama7g5: remove mck0 from parent list of other clocks
clk: at91: clk-sam9x60-pll: allow runtime changes for pll
clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics
clk: at91: clk-master: add 5th divisor for mck master
clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT
dt-bindings: clock: at91: add sama7g5 pll defines
clk: at91: sama7g5: fix compilation error
...
- Bindings for Canaan K210 SoC clks
* clk-ingenic:
clk: ingenic: Fix divider calculation with div tables
* clk-vc5:
clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts"
* clk-cleanup:
clk: sunxi-ng: Make sure divider tables have sentinel
clk: s2mps11: Fix a resource leak in error handling paths in the probe function
clk: bcm: dvp: Add MODULE_DEVICE_TABLE()
clk: bcm: dvp: drop a variable that is assigned to only
* clk-canaan:
dt-binding: clock: Document canaan,k210-clk bindings
dt-bindings: Add Canaan vendor prefix
* clk-marvell:
clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9
- Add some trace points for clk_set_rate() "range" functions
- DVFS support for AT91 clk driver
* clk-ti:
clk: ti: omap5: Fix reboot DPLL lock failure when using ABE TIMERs
clk: ti: Fix memleak in ti_fapll_synth_setup
* clk-analog:
clk: axi-clkgen: move the OF table at the bottom of the file
clk: axi-clkgen: wrap limits in a struct and keep copy on the state object
dt-bindings: clock: adi,axi-clkgen: convert old binding to yaml format
* clk-trace:
clk: Trace clk_set_rate() "range" functions
* clk-at91:
clk: at91: sam9x60: remove atmel,osc-bypass support
clk: at91: sama7g5: register cpu clock
clk: at91: clk-master: re-factor master clock
clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz
clk: at91: sama7g5: decrease lower limit for MCK0 rate
clk: at91: sama7g5: remove mck0 from parent list of other clocks
clk: at91: clk-sam9x60-pll: allow runtime changes for pll
clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics
clk: at91: clk-master: add 5th divisor for mck master
clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT
dt-bindings: clock: at91: add sama7g5 pll defines
clk: at91: sama7g5: fix compilation error
* clk-silabs:
clk: si5351: Wait for bit clear after PLL reset
- Support for SiFive FU740 PRCI
- Add hardware enable information to clk_summary debugfs
* clk-tegra:
clk: tegra: Fix duplicated SE clock entry
clk: tegra: bpmp: Clamp clock rates on requests
clk: tegra: Do not return 0 on failure
* clk-imx: (24 commits)
clk: imx: scu: remove the calling of device_is_bound
clk: imx: scu: Make pd_np with static keyword
clk: imx8mq: drop of_match_ptr from of_device_id table
clk: imx8mp: drop of_match_ptr from of_device_id table
clk: imx8mn: drop of_match_ptr from of_device_id table
clk: imx8mm: drop of_match_ptr from of_device_id table
clk: imx: gate2: Remove unused variable ret
clk: imx: gate2: Add locking in is_enabled op
clk: imx: gate2: Add cgr_mask for more flexible number of control bits
clk: imx: gate2: Check if clock is enabled against cgr_val
clk: imx: gate2: Keep the register writing in on place
clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special case
clk: imx: scu: fix build break when compiled as modules
clk: imx: remove redundant assignment to pointer np
clk: imx: remove unneeded semicolon
clk: imx: lpcg: add suspend/resume support
clk: imx: clk-imx8qxp-lpcg: add runtime pm support
clk: imx: lpcg: allow lpcg clk to take device pointer
clk: imx: imx8qxp-lpcg: add parsing clocks from device tree
clk: imx: scu: add suspend/resume support
...
* clk-sifive:
clk: sifive: Add clock enable and disable ops
clk: sifive: Fix the wrong bit field shift
clk: sifive: Add a driver for the SiFive FU740 PRCI IP block
clk: sifive: Use common name for prci configuration
clk: sifive: Extract prci core to common base
dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI
* clk-mediatek:
clk: mediatek: Make mtk_clk_register_mux() a static function
* clk-summary:
clk: Add hardware-enable column to clk summary
Document the device tree bindings of the Canaan Kendryte K210 SoC clock
driver in Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml.
The header file include/dt-bindings/clock/k210-clk.h is modified to
include the complete list of IDs for all clocks of the SoC.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201220085725.19545-3-damien.lemoal@wdc.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Eliminate the following yamllint warnings:
./Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml
:32:13:[warning] wrong indentation: expected 14 but found 12 (indentation)
:35:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20201207045527.1607-2-thunder.leizhen@huawei.com
Signed-off-by: Rob Herring <robh@kernel.org>
This change converts the old binding for the AXI clkgen driver to a yaml
format.
As maintainers, added:
- Lars-Peter Clausen <lars@metafoo.de> - as original author of driver &
binding
- Michael Hennerich <michael.hennerich@analog.com> - as supporter of
Analog Devices drivers
Acked-by: Michael Hennerich <michael.hennerich@analog.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lore.kernel.org/r/20201013143421.84188-1-alexandru.ardelean@analog.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Across all platforms, there is a continued move towards DT schema for
validating the dts files. As a result there are bug fixes for mistakes
that are found using these schema, in addition to warnings from the
dtc compiler.
As usual, many changes are for adding support for additional on-chip
and on-board components in the machines we already support.
The newly supported SoCs for this release are:
- MStar Infinity2M, a low-end IP camera chip based on a dual-core
Cortex-A7, otherwise similar to the Infinity chip we already support.
This is also known as the SigmaStar SSD202D, and we add support for
the Honestar ssd201htv2 development kit.
- Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
(BMC), in the same family as the NPCM750. This gets used in the Ampere
Altra based "Fii Kudo" server and the Quanta GSJ, both of which are
added as well.
- Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
GT-AC5300 high-end WiFi router based on this chip.
- Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
meant for faster Chromebooks and tablets. It gets added along with
its reference design.
- Mediatek MT6779 (Helio P90) is a high-end phone chip from last year's
generation, also added along with its reference board. This one is
still based on Cortex-A75/A55.
- Mediatek MT8167 is a version of the already supported MT8516 chip,
both based on Cortex-A35. It gets added along with the "Pumpkin"
single board computer, but is likely to also make its way into low-end
tablets in the future.
For the already supported chips, there are a number of new boards.
Interestingly there are more 32-bit machines added this time than
64-bit. Here is a brief list of the new boards:
- Three new Mikrotik router variants based on Marvell Prestera
98DX3236, a close relative of the more common Armada XP
- A reference board for the Marvell Armada 382
- Three new servers using ASpeed baseboard management controllers,
the actual machines being from Bytedance, Facebook and IBM,
and one machine using the Nuvoton NPCM750 BMC.
- The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.
- The usual set of 32-bit i.MX industrial/embedded hardware:
* Protonic WD3 (tractor e-cockpit)
* Kamstrup OMNIA Flex Concentrator (smart grid platform)
* Van der Laan LANMCU (food storage)
* Altesco I6P (vehicle inspection stations)
* PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard
- DH electronics STM32MP157C DHCOM, a PicoITX carrier board
for the aleady supported DHCOM module
- Three new Allwinner SoC based single-board computers:
* NanoPi R1 (H3 based)
* FriendlyArm ZeroPi (H3 based)
* Elimo Initium SBC (S3 based)
- Ouya Game Console based on Nvidia Tegra 3
- Version 5 of the already supported Zynq Z-Turn MYIR Board
- LX2162AQDS, a reference platform for NXP Layerscape
LX2162A, which is a repackaged 16-core LX2160A
- A series of Kontron i.MX8M Mini baseboard/SoM versions
- Espressobin Ultra, a new variant of the popular Armada 3700 based board,
- IEI Puzzle-M801, a rackmount network appliance based on
Marvell Armada 8040
- Microsoft Lumia 950 XL, a phone
- HDK855 and HDK865 Hardware development kits for Qualcomm
sm8250 and sm8150, respectively
- Three new board variants of the "Trogdor" Chromebook
(sc7180)
- New board variants of the Renesas based "Kingfisher" and
"HiHope" reference boards
- Kobol Helios64, an open source NAS appliance based on Rockchips
RK3399
- Engicam PX30.Core, a SoM based on Rockchip PX30, along with
a few carrier boards.
There is one conflict in mt6577_auxadc.txt, which got replaced in
another tree and modified here, the modification is already part of
the new file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/ak/EACgkQmmx57+YA
GNmQwRAAtw5Z0qYI3vewX2CPUaHUWEeN50gRa63tR+AALqR5e+M+IbAttgOwlLDB
jmsiLRYXgYeS+nTCqxWX3O/KtDH+Ua3GfPoXch5Wt4k7jGV8XtHsWqltl9qxGmO7
pQSoafJa55S7iXX7j4PMWc2el07zjYAejyzVHz7sD+9ARPaG0cL8IuAWLqAirTSt
b9FhK2g7e/uUx2Jp5Cx/Ck4kZe27bTlpbhhcJMdypsw6ouue0wfq9gs68dQ6dAq5
/KyX8PNsjX/WCcgm6YhgOwqmEk73pc17dym2SVxi+jL/HFIyQyViOpFuPc20cCWv
9QirMsBw2Rw0yLHsIuHeeRl1KEn47vdfgP5A6e+BggpPjmtF0/S0kHR8yXWFyHfy
OUdS8W5OM3rlEUgGESaszh7P2kril8tMdw0212rAyTpyLPVRoKR7NtOo79WBclKq
L/2RPJNIQSotQuezhMpjH5zKgx6yOfATBZAEX0MiSU+jAEw/0Od5QCdhwu70bIAF
jHfjtqMGS50P/i1Ht0DpwOF9DvClAlKHvUKs3a7hK81MP2sOAaElpAP3iHwVPzsI
JU6Vn3AxnIfAsHdGh/FYwq7nxL9aVLCULUOeuLhwTbdAedXLkfFQDMIe1i8zgDtH
MpIrE4Un7kmkOxRG96v8f0IYu54OdQdudonravimpYD3uqRfxUQ=
=R47r
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM device tree updates from Arnd Bergmann:
"Across all platforms, there is a continued move towards DT schema for
validating the dts files. As a result there are bug fixes for mistakes
that are found using these schema, in addition to warnings from the
dtc compiler.
As usual, many changes are for adding support for additional on-chip
and on-board components in the machines we already support.
The newly supported SoCs for this release are:
- MStar Infinity2M, a low-end IP camera chip based on a dual-core
Cortex-A7, otherwise similar to the Infinity chip we already
support. This is also known as the SigmaStar SSD202D, and we add
support for the Honestar ssd201htv2 development kit.
- Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
(BMC), in the same family as the NPCM750. This gets used in the
Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of
which are added as well.
- Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
GT-AC5300 high-end WiFi router based on this chip.
- Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
meant for faster Chromebooks and tablets. It gets added along with
its reference design.
- Mediatek MT6779 (Helio P90) is a high-end phone chip from last
year's generation, also added along with its reference board. This
one is still based on Cortex-A75/A55.
- Mediatek MT8167 is a version of the already supported MT8516 chip,
both based on Cortex-A35. It gets added along with the "Pumpkin"
single board computer, but is likely to also make its way into
low-end tablets in the future.
For the already supported chips, there are a number of new boards.
Interestingly there are more 32-bit machines added this time than
64-bit. Here is a brief list of the new boards:
- Three new Mikrotik router variants based on Marvell Prestera
98DX3236, a close relative of the more common Armada XP
- A reference board for the Marvell Armada 382
- Three new servers using ASpeed baseboard management controllers,
the actual machines being from Bytedance, Facebook and IBM, and one
machine using the Nuvoton NPCM750 BMC.
- The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.
- The usual set of 32-bit i.MX industrial/embedded hardware:
* Protonic WD3 (tractor e-cockpit)
* Kamstrup OMNIA Flex Concentrator (smart grid platform)
* Van der Laan LANMCU (food storage)
* Altesco I6P (vehicle inspection stations)
* PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard
- DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the
aleady supported DHCOM module
- Three new Allwinner SoC based single-board computers:
* NanoPi R1 (H3 based)
* FriendlyArm ZeroPi (H3 based)
* Elimo Initium SBC (S3 based)
- Ouya Game Console based on Nvidia Tegra 3
- Version 5 of the already supported Zynq Z-Turn MYIR Board
- LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which
is a repackaged 16-core LX2160A
- A series of Kontron i.MX8M Mini baseboard/SoM versions
- Espressobin Ultra, a new variant of the popular Armada 3700 based
board,
- IEI Puzzle-M801, a rackmount network appliance based on Marvell
Armada 8040
- Microsoft Lumia 950 XL, a phone
- HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and
sm8150, respectively
- Three new board variants of the "Trogdor" Chromebook (sc7180)
- New board variants of the Renesas based "Kingfisher" and "HiHope"
reference boards
- Kobol Helios64, an open source NAS appliance based on Rockchips
RK3399
- Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few
carrier boards"
* tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits)
arm64: dts: sparx5: Add SGPIO devices
arm64: dts: sparx5: Add reset support
dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
ARM: mstar: SMP support
ARM: mstar: Wire up smpctrl for SSD201/SSD202D
ARM: mstar: Add smp ctrl registers to infinity2m dtsi
ARM: mstar: Add dts for Honestar ssd201htv2
ARM: mstar: Add chip level dtsi for SSD202D
ARM: mstar: Add common dtsi for SSD201/SSD202D
ARM: mstar: Add infinity2m support
dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards
dt-bindings: vendor-prefixes: Add honestar vendor prefix
dt-bindings: mstar: Add binding details for mstar,smpctrl
ARM: mstar: Fill in GPIO controller properties for infinity
ARM: mstar: Add gpio controller to MStar base dtsi
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
ARM: zynq: Convert at25 binding to new description on zc770-xm013
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
ARM: zynq: Fix leds subnode name for zc702/zybo-z7
ARM: zynq: Rename bus to be align with simple-bus yaml
...
- New phy drivers:
- Mediatek MT7621 PCIe PHY (promoted from staging)
- Ingenic USB phy driver supporting JZ4775 and X2000
- Intel Keem Bay USB PHY driver
- Marvell USB HSIC PHY driver supporting MMP3 SoC
- AXG MIPI D-PHY driver
- Updates:
- Conversion to YAML binding for:
- Broadcom SATA PHY
- Cadence Sierra PHY bindings
- STM32 USBC Phy
- Support for Exynos5433 PCIe PHY
- Support for Qualcomm SM8250 PCIe QMP PHY
- Support for Exynos5420 USB2 phy
- devm_platform_ioremap_resource conversion for bunch of drivers
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAl/QyKEACgkQfBQHDyUj
g0dlsQ/9FR80zeSI/9+DPmnTLu4GvK80dybhk5qOCKenmWeiVsNq2j7s0HQ1nCm9
khKZ1FysKlx1Bg1DBr3OEdM9TxLG0+An4w/rjo48gTvR+6o/YStAU1tC9ZYT76Dh
Qnx0jx5QxTu9mimYSDQdJs8u74iKsNKAkQIXrVuFgNnABgPxOm0ysCJomGth/9zl
p5hj+21g519+DMzivzkjXcMA2mmIjaWtKKnZQatrRjLIuSpcbgjZMjjNdeUfJ+m0
N/89L9w5uuM9cu0JKs8MNBDN/WSNEwZw7bot6lA2JaG/Wnhmm/qLuIDCeFCr0Ado
jJkuunDidbel7FAE4O+ViMOmCaN0mDBm+fohZGT+kDUuv3d8w0ID+z1x1hj11SLQ
ejF855dfLpvmDkh8XVPTb1+euJB04Msm3LMy9puBqxittEJyRvIcX/d1IL1EZ1sN
Y0KYcY7HtN9QwUjUCWO2zU1xuFJ7CiJLCnvbIUzTPL5Em1be5cqaujsBGdHJpfeH
cQGTqLC8NcgK+eTalLbvXmDG62kllr6EWRy5KNkkP0VfIwsfaGYzdYGJZ4waUXCp
MAa500XOufzIrGakYWqIttUbA3EimMKrLakvPV6VCH+qATe2xLRRHNEY1cBQH6tK
FzEZzmS1H0mA8TtDhSKFTaciG3gBLmQDRMEeVJY6GFlel6N0Kg8=
=EFMp
-----END PGP SIGNATURE-----
Merge tag 'phy-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next
Vinod writes:
phy-for-5.11
- New phy drivers:
- Mediatek MT7621 PCIe PHY (promoted from staging)
- Ingenic USB phy driver supporting JZ4775 and X2000
- Intel Keem Bay USB PHY driver
- Marvell USB HSIC PHY driver supporting MMP3 SoC
- AXG MIPI D-PHY driver
- Updates:
- Conversion to YAML binding for:
- Broadcom SATA PHY
- Cadence Sierra PHY bindings
- STM32 USBC Phy
- Support for Exynos5433 PCIe PHY
- Support for Qualcomm SM8250 PCIe QMP PHY
- Support for Exynos5420 USB2 phy
- devm_platform_ioremap_resource conversion for bunch of drivers
* tag 'phy-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits)
drm/mediatek: avoid dereferencing a null hdmi_phy on an error message
phy: ingenic: depend on HAS_IOMEM
phy: mediatek: statify mtk_hdmi_phy_driver
dt-bindings: phy: Convert Broadcom SATA PHY to YAML
devicetree: phy: rockchip-emmc add output-tapdelay-select
phy: rockchip-emmc: output tap delay dt property
PHY: Ingenic: Add USB PHY driver using generic PHY framework.
dt-bindings: USB: Add bindings for Ingenic JZ4775 and X2000.
USB: PHY: JZ4770: Remove unnecessary function calls.
devicetree: phy: rockchip-emmc: pulldown property
phy: rockchip: set pulldown for strobe line in dts
phy: renesas: rcar-gen3-usb2: disable runtime pm in case of failure
phy: mediatek: allow compile-testing the hdmi phy
phy/rockchip: Make PHY_ROCKCHIP_INNO_HDMI depend on HAS_IOMEM to fix build error
phy: samsung: Merge Kconfig for Exynos5420 and Exynos5250
phy: ralink: phy-mt7621-pci: set correct name in MODULE_DEVICE_TABLE macro
phy: ralink: phy-mt7621-pci: drop 'COMPILE_TEST' from Kconfig
phy: mediatek: Make PHY_MTK_{XSPHY, TPHY} depend on HAS_IOMEM and OF_ADDRESS to fix build errors
phy: tegra: xusb: Fix usb_phy device driver field
phy: amlogic: replace devm_reset_control_array_get()
...
- Quite some patches that update vendor-prefixes.yaml and fsl.yaml to
document missing board compatibles and add new board compatibles.
- A couple of patches from Dong Aisheng to update imx-scu firmware and
imx-lpcg clock bindings for new SCU two cells clock support.
- A couple of net bindings update from Ioana Ciornei to complete the
MAC/PCS/PHY representation on DPAA2 devices.
- Document watchdog compatibles for all i.MX and Layerscape devices.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl/HlOYUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM4yegf/eP6henuph6c+Ay/y7Ia4V51UY4ot
Sb9pJatgaX4GmFowfztltd//gJMtpHnYbqAsXhk2hkRZ7h0hFIIji2Dp7knq3naD
rQykAmT4eWy1CuQFq86XvFaqHc5AVuygBpMmP6nSFDBzBeqDRQ+q813aUpQdUlUH
iAeN2Ov62U+4kEc0AxF2mNNcGW1/ikKcFT5nJmJGmgUKuwSUSJ0l09MvXHhQeEjr
//gswg/5XU4tweEjAHeEJKM60XLtRFdmoLnz/0nDlLY0BXfBYRpicvNXzxDWEPOd
qdf20NOWyz2UUcmMgy1vpVJKHQumSDNxB9M0FwtkcB8+x0YjE4gB8AxUNA==
=YiM1
-----END PGP SIGNATURE-----
Merge tag 'imx-bindings-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX DT bindings update for 5.11:
- Quite some patches that update vendor-prefixes.yaml and fsl.yaml to
document missing board compatibles and add new board compatibles.
- A couple of patches from Dong Aisheng to update imx-scu firmware and
imx-lpcg clock bindings for new SCU two cells clock support.
- A couple of net bindings update from Ioana Ciornei to complete the
MAC/PCS/PHY representation on DPAA2 devices.
- Document watchdog compatibles for all i.MX and Layerscape devices.
* tag 'imx-bindings-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (35 commits)
dt-bindings: arm: fsl: add Protonic WD3 board
dt-bindings: vendor-prefixes: add "virtual" prefix
dt-bindings: fsl: add kamstrup flex concentrator to schema
dt-bindings: arm: fsl: document i.MX7S boards
dt-bindings: arm: fsl: document SolidRun LX2160A boards
dt-bindings: arm: fsl: document LS1012A FRWY board
dt-bindings: arm: fsl: add Van der Laan LANMCU board
dt-bindings: arm: fsl: add Altesco I6P board
dt-bindings: vendor-prefixes: Add an entry for Altus-Escon-Company
dt-bindings: net: add the 10gbase-r connection type
dt-bindings: net: add the DPAA2 MAC DTS definition
dt-bindings: fsl: add compatible for LX2162A QDS Board
dt-bindings: vendor-prefixes: Add an entry for Van der Laan b.v.
dt-bindings: arm: fsl: document i.MX7D boards
dt-bindings: arm: fsl: document i.MX6ULL boards
dt-bindings: arm: fsl: document i.MX6UL boards
dt-bindings: arm: fsl: document i.MX6SX boards
dt-bindings: arm: fsl: document i.MX6SL boards
dt-bindings: arm: fsl: document i.MX6QP boards
dt-bindings: arm: fsl: document i.MX6Q boards
...
Link: https://lore.kernel.org/r/20201202142717.9262-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add device tree bindings for global clock controller on SDX55 SoCs.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201126072844.35370-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Move Ingenic USB PHY bindings from Documentation/devicetree/bindings/usb
to Documentation/devicetree/bindings/phy, and add bindings for JZ4775 SoC
and X2000 SoC.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20201116141906.11758-3-zhouyanjie@wanyeetech.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Since commit:
0e030a373df3 ("can: flexcan: fix endianess detection")
the fsl,imx53-flexcan isn't compatible with the fsl,p1010-flexcan any more. As
the former accesses the IP core in Little Endian mode and the latter uses Big
Endian mode.
With the conversion of the flexcan DT bindings to yaml, the dt_binding_check
this throws the following error:
Documentation/devicetree/bindings/clock/imx5-clock.example.dt.yaml: can@53fc8000: compatible: 'oneOf' conditional failed, one must be fixed:
['fsl,imx53-flexcan', 'fsl,p1010-flexcan'] is too long
Additional items are not allowed ('fsl,p1010-flexcan' was unexpected)
'fsl,imx53-flexcan' is not one of ['fsl,imx7d-flexcan', 'fsl,imx6ul-flexcan', 'fsl,imx6sx-flexcan']
'fsl,imx53-flexcan' is not one of ['fsl,ls1028ar1-flexcan']
'fsl,imx6q-flexcan' was expected
'fsl,lx2160ar1-flexcan' was expected
From schema: /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
The error is fixed by replacing the "fsl,p1010-flexcan" compatible
(which turned out the be incompatible) with "fsl,imx25-flexcan" in the
binding example.
Reported-by: Rob Herring <robh+dt@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20201111213548.1621094-1-mkl@pengutronix.de
[robh: Add "fsl,imx25-flexcan" as fallback]
Signed-off-by: Rob Herring <robh@kernel.org>
Always ON Clock controller is a block inside LPASS which controls
1 Glitch free muxes to LPASS codec Macros.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20201026120221.18984-3-srinivas.kandagatla@linaro.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The Camera Subsystem clock provider have a bunch of generic properties
that are needed in a device tree. Add a YAML schemas for those.
Add clock ids for camera clocks which are required to bring the camera
subsystem out of reset.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1602873815-1677-4-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
MX8QM and MX8QXP LPCG Clocks are mostly the same except they may reside
in different subsystems across CPUs and also vary a bit on the availability.
Same as SCU clock, we want to move the clock definition into device tree
which can fully decouple the dependency of Clock ID definition from device
tree and make us be able to write a fully generic lpcg clock driver.
And we can also use the existence of clock nodes in device tree to address
the device and clock availability differences across different SoCs.
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
of various clk driver updates. The biggest driver updates in terms of lines of
code is the Allwinner driver, closely followed by the Qualcomm and Mediatek
drivers. All of those hit high because we add so many lines of clk data. Coming
in fourth place is i.MX which also adds a bunch of clk data. This accounts for
the new driver additions this time around.
Otherwise the patches are lots of little cleanups and fixes for various clk
drivers that have baked in linux-next for a while. I suppose one highlight or
theme is that more clk drivers are being updated to work as modules, which is
interesting to see such critical SoC infrastructure work as a loadable module.
New Drivers:
- Support qcom SM8150/SM8250 video and display clks
- Support Mediatek MT8167 clks
- Add clock for CRC block found on vf610 SoCs
- Add support for the Renesas R-Car V3U (R8A779A0) SoC
- Add support for the VSP for Resizing clock on Renesas RZ/G1H
- Support Allwinner A100 SoC clks
Removed Drivers:
- Remove i.MX21 clock driver, as i.MX21 platform support is being dropped
Updates:
- Change how qcom's display port clks work
- Small non-critical fixes for TI clk driver
- Remove various unused variables in clk drivers
- Allow Rockchip clk driver to be a module
- Remove most __clk_lookup() calls in Samsung drivers (yay!)
- Support building i.MX ARMv8 platforms clock driver as module
- Some kerneldoc fixes here and there
- A couple of minor i.MX clk data corrections
- Update audio clock inverter and fdiv2 flag on Amlogic g12
- Make amlogic clk drivers configurable in Kconfig
- Fix Renesas VSP clock names to match corrected hardware documentation
- Sigma-delta modulation on Allwinner R40
- Various fixes for at91 clk driver
- Use semicolons instead of commas in some places
- Mark some variables const so they can move to RO memory
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl+R0K0RHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSU9xw/+KRDZ/xo7GKeC7QrRt4q5eWIW4l/HzjYH
yeht/i7cEXy+jSJuOTBj4sIpOdvzdBQfsqMiNg7RKdtYs0HbYFywxWtnvetptuM1
BCgSMDHHJ59EJSPEWAvE6bsl9xaVl4o0XEI2+qAoJ4OIcJVzVz+vRGQ7pDyEk2XT
zTXRw4W+HftZXFB8Nw0JTj9YzBoZJzpnAB/vu2HzMYVAvoeQ8RhcdbipdSTjI+zY
++zkt8cmGP0iKloHbi3rk1A7w/ORJ//UjT24xmkwAO6t1CWEErVzXBtGkQ9K4ijy
F2w5CzJb/szGCfnGlcchQ5kjB/FfgIKuLNlhTiptY+UZGIvSAbndhMSS3JFsqGbl
aYUk5fpjdpneSsIPvHnnz1jIaK6OmHSoxmq7FgwaU+YDX6ZK6UKalMHbHUEpiNX+
3a+FeKe2IVMZ0uVqpJGnd/o4Kud2CeRM1ufqu15ygbujfSH6xcO7fbUi/C8XJLMX
7PR0Ze0PhwkMezdlxb3WpK+4MrOny3JT0DTAbAQDdAwsKFP/Sex4QMWP8PUdTmGY
dQcrgvuXYC1hufOaY1JzxjfGrhEBuJAr7BsjBI+etUpnJ9Z5Uhguti/lnKm7oAlI
EceBJ4B5M1iUYTkKXYxLWWzUlkIKNzgHvjRM2Q6Nn5LbyVlzM4i284C/E4M8AmVB
nSXy1nWkSAU=
=sKI8
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This contains no changes to the core framework. It is a collection of
various clk driver updates.
The biggest driver updates in terms of lines of code is the Allwinner
driver, closely followed by the Qualcomm and Mediatek drivers. All of
those hit high because we add so many lines of clk data. Coming in
fourth place is i.MX which also adds a bunch of clk data. This
accounts for the new driver additions this time around.
Otherwise the patches are lots of little cleanups and fixes for
various clk drivers that have baked in linux-next for a while. I
suppose one highlight or theme is that more clk drivers are being
updated to work as modules, which is interesting to see such critical
SoC infrastructure work as a loadable module.
New Drivers:
- Support qcom SM8150/SM8250 video and display clks
- Support Mediatek MT8167 clks
- Add clock for CRC block found on vf610 SoCs
- Add support for the Renesas R-Car V3U (R8A779A0) SoC
- Add support for the VSP for Resizing clock on Renesas RZ/G1H
- Support Allwinner A100 SoC clks
Removed Drivers:
- Remove i.MX21 clock driver, as i.MX21 platform support is being
dropped
Updates:
- Change how qcom's display port clks work
- Small non-critical fixes for TI clk driver
- Remove various unused variables in clk drivers
- Allow Rockchip clk driver to be a module
- Remove most __clk_lookup() calls in Samsung drivers (yay!)
- Support building i.MX ARMv8 platforms clock driver as module
- Some kerneldoc fixes here and there
- A couple of minor i.MX clk data corrections
- Update audio clock inverter and fdiv2 flag on Amlogic g12
- Make amlogic clk drivers configurable in Kconfig
- Fix Renesas VSP clock names to match corrected hardware
documentation
- Sigma-delta modulation on Allwinner R40
- Various fixes for at91 clk driver
- Use semicolons instead of commas in some places
- Mark some variables const so they can move to RO memory"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (102 commits)
clk: imx8mq: Fix usdhc parents order
clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on
clk: Restrict CLK_HSDK to ARC_SOC_HSDK
clk: at91: sam9x60: support only two programmable clocks
clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT
clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL
clk: ingenic: Use readl_poll_timeout instead of custom loop
clk: ingenic: Use to_clk_info() macro for all clocks
clk: bcm2835: add missing release if devm_clk_hw_register fails
clk: at91: clk-sam9x60-pll: remove unused variable
clk: at91: clk-main: update key before writing AT91_CKGR_MOR
clk: at91: remove the checking of parent_name
clk: clk-prima2: fix return value check in prima2_clk_init()
clk: mmp2: Fix the display clock divider base
clk: pxa: Constify static struct clk_ops
clk: baikal-t1: Mark Ethernet PLL as critical
clk: qoriq: modify MAX_PLL_DIV to 32
clk: axi-clkgen: Set power bits for fractional mode
clk: axi-clkgen: Add support for fractional dividers
...
- Support qcom SM8150/SM8250 video and display clks
- Change how qcom's display port clks work
* clk-ingenic:
clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT
clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL
clk: ingenic: Use readl_poll_timeout instead of custom loop
clk: ingenic: Use to_clk_info() macro for all clocks
* clk-at91:
clk: at91: sam9x60: support only two programmable clocks
clk: at91: clk-sam9x60-pll: remove unused variable
clk: at91: clk-main: update key before writing AT91_CKGR_MOR
clk: at91: remove the checking of parent_name
* clk-kconfig:
clk: Restrict CLK_HSDK to ARC_SOC_HSDK
* clk-imx:
clk: imx8mq: Fix usdhc parents order
clk: imx: imx21: Remove clock driver
clk: imx: gate2: Fix a few typos
clk: imx: Fix and update kerneldoc
clk: imx: fix i.MX7D peripheral clk mux flags
clk: imx: fix composite peripheral flags
clk: imx: Correct the memrepair clock on imx8mp
clk: imx: Correct the root clk of media ldb on imx8mp
clk: imx: vf610: Add CRC clock
clk: imx: Explicitly include bits.h
clk: imx8qxp: Support building i.MX8QXP clock driver as module
clk: imx8m: Support module build
clk: imx: Add clock configuration for ARMv7 platforms
clk: imx: Support building i.MX common clock driver as module
clk: composite: Export clk_hw_register_composite()
clk: imx6sl: Use BIT(x) to avoid shifting signed 32-bit value by 31 bits
* clk-qcom:
clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on
clk: qcom: Add display clock controller driver for SM8150 and SM8250
dt-bindings: clock: add QCOM SM8150 and SM8250 display clock bindings
clk: qcom: add video clock controller driver for SM8250
clk: qcom: add video clock controller driver for SM8150
dt-bindings: clock: add SM8250 QCOM video clock bindings
dt-bindings: clock: add SM8150 QCOM video clock bindings
dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc
clk: qcom: gcc-msm8994: Add missing clocks, resets and GDSCs
clk/qcom: fix spelling typo
clk: qcom: gcc-sdm660: Fix wrong parent_map
clk: qcom: dispcc: Update DP clk ops for phy design
clk: qcom: gcc-msm8939: remove defined but not used variables
clk: qcom: ipq8074: make pcie0_rchng_clk_src static
* clk-prima2:
clk: clk-prima2: fix return value check in prima2_clk_init()
* clk-bcm:
clk: bcm2835: add missing release if devm_clk_hw_register fails
clk: bcm: rpi: Add register to control pixel bvb clk
- Update dtc to upstream version v1.6.0-31-gcbca977ea121
- dtx_diff help text reformatting
- Speed-up validation time for binding and dtb checks using json for
intermediate files
- Add support for running yamllint on DT schema files
- Remove old booting-without-of.rst
- Extend the example schema to address common issues
- Cleanup handling of additionalProperties/unevaluatedProperties
- Ensure all DSI controller schemas reference dsi-controller.yaml
- Vendor prefixes for Zealz, Wandbord/Technexion, Embest RIoT, Rex, DFI,
and Cisco Meraki
- Convert at25, SPMI bus, TI hwlock, HiSilicon Hi3660 USB3 PHY, Arm
SP805 watchdog, Arm SP804, and Samsung 11-pin USB connector to DT
schema
- Convert HiSilicon SoC and syscon bindings to DT schema
- Convert SiFive Risc-V L2 cache, PLIC, PRCI, and PWM to DT schema
- Convert i.MX bindings for w1, crypto, rng, SIM, PM, DDR,
SATA, vf610 GPIO, and UART to DT schema
- Add i.MX 8M compatible strings
- Add LM81 and DS1780 as trivial devices
- Various missing properties added to fix dtb validation warnings
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAl+HCHMQHHJvYmhAa2Vy
bmVsLm9yZwAKCRD6+121jbxhw6eKD/wNIzs0Jhwp9SCLws7OHj/S1gDkkCouwGQs
ThQzNpZptYzC2srUOpDsycVj7dBjCn2B4SieYOnlVk3cWk4ZBtB96fLHgwYK8iT3
nlr1FbY+mXIx9Gcf6I4ZTuvvXGkRD+55mgEuJo9pwfLFio6eCvHOSCnCiVLHNWEe
fdy5YqLlsiPvhIvwbE1C3wrfmAjw45w1AWAYa7vkXUzWX6CLNkcmMyZHJ0HbtiGj
MJpjZdWb1w7OVrNPXTZFr3RI0ljtTFQ3XanJ57sqV/6WHEfYdfIvPHnMqF6Sm3Uh
cxkG5ds0ZWqYkDVdq2dTgSCtOUQq48L/etsxZyUkMO+iEboMNo8jlCP9CqhAP3Tt
8o8YFWKbv27AdejkFHWp+vVjBU4XNvvjGyEIeftxOhgTdoATwVwgE7IBg8TZ8QVJ
6zbFbh5S5txX0mOCNccIB8GkiHBC1OCeIYxfOYLZ8wk+84XencUnsN9rd/oFhb47
QdDeuTGUQLiMasElJG02wlWjX+Lb8Vw1uh9qfyQPzqjrPwiCN2GME3XkVyO6KDMy
pNYj8HRtayl3U8LsgwJWNZqJ3w+emRVerq/M6gtIrXEdINtSMCNAZ1rogxSdnQjg
dRVIQe/BCI0IVcCmiRYDZ+uldd/GzSvmCJ5NpzpFpQelxfQlIR9V6T2w3Stiw8ja
TOVF6rhqtw==
=gL4K
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
- Update dtc to upstream version v1.6.0-31-gcbca977ea121
- dtx_diff help text reformatting
- Speed-up validation time for binding and dtb checks using json for
intermediate files
- Add support for running yamllint on DT schema files
- Remove old booting-without-of.rst
- Extend the example schema to address common issues
- Cleanup handling of additionalProperties/unevaluatedProperties
- Ensure all DSI controller schemas reference dsi-controller.yaml
- Vendor prefixes for Zealz, Wandbord/Technexion, Embest RIoT, Rex,
DFI, and Cisco Meraki
- Convert at25, SPMI bus, TI hwlock, HiSilicon Hi3660 USB3 PHY, Arm
SP805 watchdog, Arm SP804, and Samsung 11-pin USB connector to DT
schema
- Convert HiSilicon SoC and syscon bindings to DT schema
- Convert SiFive Risc-V L2 cache, PLIC, PRCI, and PWM to DT schema
- Convert i.MX bindings for w1, crypto, rng, SIM, PM, DDR, SATA, vf610
GPIO, and UART to DT schema
- Add i.MX 8M compatible strings
- Add LM81 and DS1780 as trivial devices
- Various missing properties added to fix dtb validation warnings
* tag 'devicetree-for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (111 commits)
dt-bindings: misc: explicitly add #address-cells for slave mode
spi: dt-bindings: spi-controller: explicitly require #address-cells=<0> for slave mode
dt: Remove booting-without-of.rst
dt-bindings: update usb-c-connector example
dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml
dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml
dt-bindings: pwm: imx: document i.MX compatibles
scripts/dtc: Update to upstream version v1.6.0-31-gcbca977ea121
dt-bindings: Add running yamllint to dt_binding_check
dt-bindings: powerpc: Add a schema for the 'sleep' property
dt-bindings: pinctrl: sirf: Fix typo abitrary
dt-bindings: pinctrl: qcom: Fix typo abitrary
dt-bindings: Explicitly allow additional properties in common schemas
dt-bindings: Use 'additionalProperties' instead of 'unevaluatedProperties'
dt-bindings: Add missing 'unevaluatedProperties'
Docs: Fixing spelling errors in Documentation/devicetree/bindings/
dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to json-schema
dt-bindings: riscv: convert pwm bindings to json-schema
dt-bindings: riscv: convert plic bindings to json-schema
dt-bindings: fu540: prci: convert PRCI bindings to json-schema
...
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM8150 and SM8250 SoCs.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> (SM8250)
Link: https://lore.kernel.org/r/20200927190653.13876-2-jonathan@marek.ca
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add device tree bindings for video clock controller for SM8250 SoCs.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200923160635.28370-4-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add device tree bindings for video clock controller for SM8150 SoCs.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200923160635.28370-3-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
These two bindings are almost identical, so combine them into one. This
will make it easier to add the sm8150 and sm8250 videocc bindings.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200923160635.28370-2-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
In cases where we don't reference another schema, 'additionalProperties'
can be used instead. This is preferred for now as 'unevaluatedProperties'
support isn't implemented yet.
In a few cases, this means adding some missing property definitions of
which most are for SPI bus properties. 'unevaluatedProperties' is not going
to work for the SPI bus properties anyways as they are evaluated from the
parent node, not the SPI child node.
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20201005183830.486085-3-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
The clock controller schemas for i.MX 8M Mini, 8M Nano, 8M Plus and 8M
Quad are basically the same. The only minor difference appears on 8M
Quad which needs one more clock.
There is no point to have four schemas for almost the same binding. Any
fixes or changes would have to be duplicated four times.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
The i.MX 8 DTSes use two compatibles so update the binding to fix
dtbs_check warnings like:
arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: mmc@30b40000:
compatible: ['fsl,imx8mn-usdhc', 'fsl,imx7d-usdhc'] is too long
From schema: Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: mmc@30b40000:
compatible: Additional items are not allowed ('fsl,imx7d-usdhc' was unexpected)
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dt.yaml: mmc@30b40000:
compatible: ['fsl,imx8mn-usdhc', 'fsl,imx7d-usdhc'] is too long
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200829062505.4642-1-krzk@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Update the i.MX23 clock example to align with MXS AUART binding doc to
avoid below build error:
Documentation/devicetree/bindings/clock/imx23-clock.example.dt.yaml:
serial@8006c000: clocks: [[4294967295, 32]] is too short
Documentation/devicetree/bindings/clock/imx23-clock.example.dt.yaml:
serial@8006c000: 'dmas' is a required property
Documentation/devicetree/bindings/clock/imx23-clock.example.dt.yaml:
serial@8006c000: 'dma-names' is a required property
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1597721685-9280-2-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Rob Herring <robh@kernel.org>
Update the i.MX28 clock example to align with MXS AUART binding doc to
avoid below build error:
Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml:
serial@8006a000: clocks: [[4294967295, 45]] is too short
Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml:
serial@8006a000: compatible: Additional items are not allowed
('fsl,imx23-auart' was unexpected)
Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml:
serial@8006a000: compatible: ['fsl,imx28-auart', 'fsl,imx23-auart']
is too long
Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml:
serial@8006a000: 'dmas' is a required property
Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml:
serial@8006a000: 'dma-names' is a required property
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1597721685-9280-1-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Rob Herring <robh@kernel.org>
happened to tag the tree at an earlier point in the history of clk-next.
I must have fat fingered it and checked out an older version of clk-next
on this second computer I'm using.
This time it actually includes more code for Qualcomm SoCs, the AT91
major updates, and some Rockchip SoC clk driver updates as well. I've
corrected this flow so this shouldn't happen again.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl80J28RHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSVEkRAArVaHkGME9FLC2eOtfh5JSBAITIyvUxXh
6+DVGxt29Rfp24/IL7P05DfDtw402qDnkfeeF7dljgSqS9BimsF5DP2EnLec9j6y
EZqZzThMyuS6+UyZ/QSyzpDITqemA9dOccmtve3QPOkgn6BZcfUJGqwIk47Dd/wA
udOZCPm+HR4d7H8nzhsfDBIOCPueOV/zDVKPWNSDuuRVLKHOW7OPUvTNo5ZBrOBj
3w6Q3KqHBNVHfrl9b5MdPSEatlTU3hlmm2bskTyVpwMAHKq6H0M0jqCh03jVNRr7
woUtgRzo5KEfM52pZGQTO6U9ifIv4nKv9lIhrZAR4ql3tXGag6hQ3YMahd0sjyUc
poJ13JqgLmwTw4B4mbxTS8yW86tlEBXcTc33sT22jt2TrSc5zimoavBzn7NNdzv/
AnPUyAXPJLKFQ2Rx2DNnZ87hSimpPz64MszFcuD2XZpsmohFTretyCUvjaiwQqrL
37Yt/NPo2NVx3yM6BDBs1oXFNMzYrEHpnOEKMfF4JYFHQO8bo5QCwqgiZX8sf1l2
7mQSeae7tDtrWysbJ6L+rSzOcyqCsOoWcM3H2/ydyDgSE4tA+2lU0/AD9jIs8D0U
fXHRWJ4eCzGJ8hcdUUhYCMjrsQuerze4neNjYYAZRGbs8PhBKMAVbTl/TAay9rLV
QesIjVqhN1o=
=/8EM
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull more clk updates from Stephen Boyd:
"Here's some more updates that missed the last pull request because I
happened to tag the tree at an earlier point in the history of
clk-next. I must have fat fingered it and checked out an older version
of clk-next on this second computer I'm using.
This time it actually includes more code for Qualcomm SoCs, the AT91
major updates, and some Rockchip SoC clk driver updates as well. I've
corrected this flow so this shouldn't happen again"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (83 commits)
clk: bcm2835: Do not use prediv with bcm2711's PLLs
clk: drop unused function __clk_get_flags
clk: hsdk: Fix bad dependency on IOMEM
dt-bindings: clock: Fix YAML schemas for LPASS clocks on SC7180
clk: mmp: avoid missing prototype warning
clk: sparx5: Add Sparx5 SoC DPLL clock driver
dt-bindings: clock: sparx5: Add bindings include file
clk: qoriq: add LS1021A core pll mux options
clk: clk-atlas6: fix return value check in atlas6_clk_init()
clk: tegra: pll: Improve PLLM enable-state detection
clk: X1000: Add support for calculat REFCLK of USB PHY.
clk: JZ4780: Reformat the code to align it.
clk: JZ4780: Add functions for enable and disable USB PHY.
clk: Ingenic: Add RTC related clocks for Ingenic SoCs.
dt-bindings: clock: Add tabs to align code.
dt-bindings: clock: Add RTC related clocks for Ingenic SoCs.
clk: davinci: Use fallthrough pseudo-keyword
clk: imx: Use fallthrough pseudo-keyword
clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clk
clk: qcom: gcc-sdm660: Add missing modem reset
...
framework we just have some minor tweaks and a debugfs feature, so not much to
see there. The driver updates are fairly well split between AT91 and Qualcomm
clk support. Adding those two drivers together equals about 50% of the
diffstat. Otherwise, the big amount of work this time was on supporting
Broadcom's Raspberry Pi firmware clks. See below for some more highlights.
Core:
- Document clk_hw_round_rate() so it gets some more use
- Remove unused __clk_get_flags()
- Add a prepare/enable debugfs feature similar to rate setting
New Drivers:
- Add support for SAMA7G5 SoC clks
- Enable CPU clks on Qualcomm IPQ6018 SoCs
- Enable CPU clks on Qualcomm MSM8996 SoCs
- GPU clk support for Qualcomm SM8150 and SM8250 SoCs
- Audio clks on Qualcomm SC7180 SoCs
- Microchip Sparx5 DPLL clk
- Add support for the new Renesas RZ/G2H (R8A774E1) SoC
Updates:
- Make defines for bcm63xx-gate clks to use in DT
- Support BCM2711 SoC firmware clks
- Add HDMI clks for BCM2711 SoCs
- Add RTC related clks on Ingenic SoCs
- Support USB PHY clks on Ingenic SoCs
- Support gate clks on BCM6318 SoCs
- RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs
- Use poll_timeout functions in Rockchip clk driver
- Support Rockchip rk3288w SoC variant
- Mark mac_lbtest critical on Rockchip rk3188
- Add CAAM clock support for i.MX vf610 driver
- Add MU root clock support for i.MX imx8mp driver
- Amlogic g12: add neural network accelerator clock sources
- Amlogic meson8: remove critical flag for main PLL divider
- Amlogic meson8: add video decoder clock gates
- Convert one more Renesas DT binding to json-schema
- Enhance critical clock handling on Renesas platforms to only consider
clocks that were enabled at boot time
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl8tspERHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSX0og//TXp134IBXVZ2Z5Wca4J41itv7tPGJFsX
EslQ/eMm6xhGEqqrA6BVsQ228JF9rUmg1fbvdl82UPK7Zyp9P2fo6CMC65ngDTky
B1rLZOaKitER9JdL9DmmnIR772pI//rAMdIeVC/Jn5RR7OpP4lgY6+qvK0pJjVFl
8aK3uHY+UWVFtqZxuJEAAyZBq1+bREqmVwNC1my6kmMIf0j0KwcGhrZgASWWtjQK
4TRmroehLC4FBqnJ78Y3E6UAOBlz6C7XnP38qJge2672Ef7QhXZU7AGrGiTtxc4h
5fB6MNMF+5QGel54qR1eH+JxaEoKsAjLaX1VBr7hAHrGIQ26dBFHFPsPvWDA+VVR
4bwXJKz2objAWyqlMVM/cVV3q6uDixuScdrw2aAiojmV7ZvdZXflacdmZuS5v7e4
sh86llN+lF0YrViYz33z+up0risCAi089xVo7Z99VgyLe2DR8TE+4/d6DQTFRNxl
m66m6mlB9pPPgIV028SAf/zmzyoVWEarwdEAQPjJC6KVRbnR9mFlhSiTQMmCsSvU
zHRxVcInc+8qIJY6VJ552UFu/JAan/AFl5knb+kW21a7hM8p81H9HuSnS4aHDDq4
yETPU3XSMYz8ARHX4lKo1UIB6+k9iF2CWdCP+gXHNP+QYSAsRBIJsonjul9lLUCi
8i6mUGkS0OU=
=QLRg
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"It looks like a smaller batch of clk updates this time around.
In the core framework we just have some minor tweaks and a debugfs
feature, so not much to see there. The driver updates are fairly well
split between AT91 and Qualcomm clk support. Adding those two drivers
together equals about 50% of the diffstat.
Otherwise, the big amount of work this time was on supporting
Broadcom's Raspberry Pi firmware clks.
Highlights:
Core:
- Document clk_hw_round_rate() so it gets some more use
- Remove unused __clk_get_flags()
- Add a prepare/enable debugfs feature similar to rate setting
New Drivers:
- Add support for SAMA7G5 SoC clks
- Enable CPU clks on Qualcomm IPQ6018 SoCs
- Enable CPU clks on Qualcomm MSM8996 SoCs
- GPU clk support for Qualcomm SM8150 and SM8250 SoCs
- Audio clks on Qualcomm SC7180 SoCs
- Microchip Sparx5 DPLL clk
- Add support for the new Renesas RZ/G2H (R8A774E1) SoC
Updates:
- Make defines for bcm63xx-gate clks to use in DT
- Support BCM2711 SoC firmware clks
- Add HDMI clks for BCM2711 SoCs
- Add RTC related clks on Ingenic SoCs
- Support USB PHY clks on Ingenic SoCs
- Support gate clks on BCM6318 SoCs
- RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs
- Use poll_timeout functions in Rockchip clk driver
- Support Rockchip rk3288w SoC variant
- Mark mac_lbtest critical on Rockchip rk3188
- Add CAAM clock support for i.MX vf610 driver
- Add MU root clock support for i.MX imx8mp driver
- Amlogic g12: add neural network accelerator clock sources
- Amlogic meson8: remove critical flag for main PLL divider
- Amlogic meson8: add video decoder clock gates
- Convert one more Renesas DT binding to json-schema
- Enhance critical clock handling on Renesas platforms to only
consider clocks that were enabled at boot time"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (79 commits)
clk: qcom: gcc: Make disp gpll0 branch aon for sc7180/sdm845
ipq806x: gcc: add support for child probe
clk: qcom: msm8996: Make symbol 'cpu_msm8996_clks' static
clk: qcom: ipq8074: Add correct index for PCIe clocks
clk: <linux/clk-provider.h>: drop a duplicated word
clk: renesas: cpg-mssr: Add r8a774e1 support
dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1
clk: Drop duplicate selection in Kconfig
clk: qcom: smd: Add support for MSM8992/4 rpm clocks
clk: qcom: ipq8074: Add missing clocks for pcie
dt-bindings: clock: qcom: ipq8074: Add missing bindings for PCIe
Replace HTTP links with HTTPS ones: Common CLK framework
clk: qcom: Add CPU clock driver for msm8996
dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996
soc: qcom: Separate kryo l2 accessors from PMU driver
clk: meson: meson8b: add the vclk2_en gate clock
clk: meson: meson8b: add the vclk_en gate clock
clk: qcom: Fix return value check in apss_ipq6018_probe()
clk: bcm: dvp: Add missing module informations
clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
...
- Improve device links cycle detection and breaking. Add more
bindings for device link dependencies.
- Refactor parsing 'no-map' in __reserved_mem_alloc_size()
- Improve DT unittest 'ranges' and 'dma-ranges' test case to check
differing cell sizes
- Various http to https link conversions
- Add a schema check to prevent 'syscon' from being used by itself
without a more specific compatible
- A bunch more DT binding conversions to schema
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAl8pjPoQHHJvYmhAa2Vy
bmVsLm9yZwAKCRD6+121jbxhw33aD/48a9wymbzf0r6mpXJyzO5zspcvcDgT7/si
Eeucbp7diRX3Ei0YkfvQH3s7bEA7JM2DlPDmXBieWZqpXS9tvbX9P6VxId6bfTiI
oSg/e4NNqxtHpaf4Nn6EwFFILbbi10LKvwodYDy9agePApc+wJWLI2WwlvdEsSsF
vv9nnF23NdJnSjsEXwiAB+ouX8EilqB80+s9W/TUaA/RS+xEOinAkXab4qjCvTlH
yUHpqe/mXDd6c4gb0EsIuAPkG7GE9/pc39iwxQ7IWz/qnSSfExjEac8j0QU4zD8u
zD2EkIQMEZR7IDsQOOkEQ4gbbzl3SjrMlQSZp/VWcjcn9uVrE5VPddH/NMdb8L7m
m5pgH1TFheYBPaqRIVuzrRcfW7KVjjeUuoG7xfDQy+ELWmHAMlb3uyH2CNDqmgYM
ESEQgSH5w4cabP5qeXvXyZci3Zbajw2Dd555gWNC2ot6yPToJEXkesnrcpuwZZV5
Wyn5IOAuf7rri4TEpl5CsR6iJnAJsNnN+23gMaemxz2qDgBCBhY7CSoRVeP7Xxpw
ymCIna6p7i/ufiP4QauTTafw03AMZz6Le8iujIaN3dmq8SbQc7BYeFNwFNjs+lyO
B1gvJOt3xTXTdfqqQWpEQMg659IGguOu6MGecxN+nteTBYqQ3Ol77zNn+a0n4BA7
+rGqybfiFg==
=6f3o
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring:
- Improve device links cycle detection and breaking. Add more bindings
for device link dependencies.
- Refactor parsing 'no-map' in __reserved_mem_alloc_size()
- Improve DT unittest 'ranges' and 'dma-ranges' test case to check
differing cell sizes
- Various http to https link conversions
- Add a schema check to prevent 'syscon' from being used by itself
without a more specific compatible
- A bunch more DT binding conversions to schema
* tag 'devicetree-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits)
of: reserved-memory: remove duplicated call to of_get_flat_dt_prop() for no-map node
of: unittest: Use bigger address cells to catch parser regressions
dt-bindings: memory-controllers: Convert mmdc to json-schema
dt-bindings: mtd: Convert imx nand to json-schema
dt-bindings: mtd: Convert gpmi nand to json-schema
dt-bindings: iio: io-channel-mux: Fix compatible string in example code
of: property: Add device link support for pinctrl-0 through pinctrl-8
of: property: Add device link support for multiple DT bindings
dt-bindings: phy: ti: phy-gmii-sel: convert bindings to json-schema
dt-bindings: mux: mux.h: drop a duplicated word
dt-bindings: misc: Convert olpc,xo1.75-ec to json-schema
dt-bindings: aspeed-lpc: Replace HTTP links with HTTPS ones
dt-bindings: drm/bridge: Replace HTTP links with HTTPS ones
drm/tilcdc: Replace HTTP links with HTTPS ones
dt-bindings: iommu: renesas,ipmmu-vmsa: Add r8a774e1 support
dt-bindings: fpga: Replace HTTP links with HTTPS ones
dt-bindings: virtio: Replace HTTP links with HTTPS ones
dt-bindings: media: imx274: Add optional input clock and supplies
dt-bindings: i2c-gpio: Use 'deprecated' keyword on deprecated properties
dt-bindings: interrupt-controller: Fix typos in loongson,liointc.yaml
...
There are three SoC families newly dded to the 32-bit and
64-bit Arm architecture code in the kernel this time:
- Daniel Palmer adds initial support for two chips made by MStar, a
taiwanese SoC manufacturer that became part of Mediatek in 2012. For
now, the added support is fairly minimal, with just two of its
Cortex-A7 based 32-bit camera chips getting support for a limited
set of on-chip peripherals.
- Lars Povlsen from Microchip adds support for their new Sparx5
family of ethernet switch chips using 64-bit Cortex-A53 cores.
These are descended from earlier VSC7xxx SparX and Ocelot chips
using 32-bit MIPS cores.
- Daniele Alessandrelli from Intel adds support for the new Keem Bay
SoC for computer vision, built around a Movidius VPU with Linux
running on Arm Cortex-A53 cores.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8j31MACgkQmmx57+YA
GNnS7Q//achCOtBeIblV8Fyfp/lTYNpT9hFTQ5cGaoyjl9Lm1rcVCISCEGqIEJAV
FRQBz3YcQWA9pIWIf79oh6QphcoW/wUTCE+cjnHP+EOkqvw9aGFBm4nOUt4Gz92a
+gGs9HqcrxB+3ysQEDGugwRrE6htrOoCnWyurh5zZNvAEry+MV6LBwfxSUrLKy8b
iwnwl/KvWI47mWAj5nJ7fbXAgxRjFdEz+mvNBjqKhJ/OELsnWRXcxmJxF651DEb6
e/ydD7OtrWI1+81/yQxS7SeDlatFHE0JvP4WZHBGm6TB7Z3pdqIZI598UN0lVvbR
jvtljiAa2UA7h6NjscD6ECWktrF8LO8i/8ref7Fr3za/FKiLTYP2BQymnlk5nLAj
RuCvR8oriqBbseZlkGrs4afjpfwurUKNhhjVse/M3ORYYK++Bra6GZWL4gnlA2wB
GbFZ6MAw2bnbKrO6rRTu+F1NFq5/l71LP1r3Li3xbyfZ7I/XJ5aiE6knQ+vtk6Np
pfvCYSILOSnulYZvdaL/W4HV98mzjHSE4eUegGDTMKNv2dVNRGI3Mnnur7+kSXLu
550qg+GXv8JkQlkFkT2BsuaiPULOUKHFtK42fo2XhQL/zoaFlBU7HehtSBdtcKPy
XIlEEk32q+QyABKav2QJnGJMcWzfq2SSmsUliVU72zD38dG/0Fw=
=Yy3D
-----END PGP SIGNATURE-----
Merge tag 'arm-newsoc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new ARM SoC support from Arnd Bergmann:
"There are three SoC families newly dded to the 32-bit and 64-bit Arm
architecture code in the kernel this time:
- Daniel Palmer adds initial support for two chips made by MStar, a
taiwanese SoC manufacturer that became part of Mediatek in 2012.
For now, the added support is fairly minimal, with just two of its
Cortex-A7 based 32-bit camera chips getting support for a limited
set of on-chip peripherals.
- Lars Povlsen from Microchip adds support for their new Sparx5
family of ethernet switch chips using 64-bit Cortex-A53 cores.
These are descended from earlier VSC7xxx SparX and Ocelot chips
using 32-bit MIPS cores.
- Daniele Alessandrelli from Intel adds support for the new Keem Bay
SoC for computer vision, built around a Movidius VPU with Linux
running on Arm Cortex-A53 cores"
* tag 'arm-newsoc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits)
ARM: mstar: Correct the compatible string for pmsleep
dt-bindings: arm: mstar: remove the binding description for mstar,pmsleep
dt-bindings: mfd: syscon: add compatible string for mstar,msc313-pmsleep
ARM: mstar: Add reboot support
ARM: mstar: Add "pmsleep" node to base dtsi
ARM: mstar: Add PMU
ARM: mstar: Adjust IMI size for infinity3
ARM: mstar: Adjust IMI size for mercury5
ARM: mstar: Adjust IMI size of infinity
ARM: mstar: Add IMI SRAM region
dt-bindings: arm: mstar: Move existing MStar binding descriptions
dt-bindings: arm: mstar: Add binding details for mstar, pmsleep
ARM: mstar: Fix dts filename for 70mai midrive d08
ARM: mstar: Add dts for 70mai midrive d08
ARM: mstar: Add dts for msc313(e) based BreadBee boards
ARM: mstar: Add mercury5 series dtsis
ARM: mstar: Add infinity/infinity3 family dtsis
ARM: mstar: Add Armv7 base dtsi
ARM: mstar: Add binding details for mstar,l3bridge
ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs
...