2 Commits

Author	SHA1	Message	Date
Laxman Dewangan	b861c275ea	ARM: tegra: apbio access using dma for tegra20 only ... The Tegra20 HW issue with accessing APBIO registers (such as fuse registers) directly from the CPU concurrently with APB DMA accesses has been fixed in Tegra30 and later chips. Access these registers directly from the CPU on Tegra30 and later, and apply the workaround only for Tegra20. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Chaitanya Bandi <bandik@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>	2012-07-06 11:48:56 -06:00
Olof Johansson	e2f91578b3	ARM: tegra: use APB DMA for accessing APB devices ... Tegra2 hangs if APB registers are accessed from the cpu during an apb dma operation. The workaround is to use apb dma to read/write the registers instead. There is a dependency loop between fuses, clocks, and APBDMA. If dma is enabled, fuse reads must go through APBDMA to avoid corruption due to a hw bug. APBDMA requires a clock to be enabled. Clocks must read a fuse to determine allowable cpu frequencies. Separate out the fuse DMA initialization, and allow the fuse read and write functions to be called without using DMA before the DMA initialization has been completed. Access to the fuses before APBDMA is initialized won't hit the hardware bug because nothing else can be using DMA. Original fuse registar access code from Varun Wadekar <vwadekar@nvidia.com>, improved by Colin Cross <ccross@android.com> and later moved to separate driver by Jon Mayo <jmayo@nvidia.com>. Major refactoring/cleanup by Olof Johansson <olof@lixom.net>. Changes since v1: * fix 'return false' on error condition * dequeue dma ops in case of timeout From: Jon Mayo <jmayo@nvidia.com>. Signed-off-by: Jon Mayo <jmayo@nvidia.com>. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com>	2012-02-06 18:24:58 -08:00