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3 Commits

Author SHA1 Message Date
Peter De Schrijver
8bf9437a4e clk: tegra: dfll: build clk-dfll.c for Tegra124 and Tegra210 
Tegra210 has a DFLL as well and can share the majority of the code with
the Tegra124 implementation. So build the same code for both platforms.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2019-02-06 14:29:37 +01:00
Thierry Reding
ca6f2796ee clk: tegra: Add BPMP clock driver 
This driver uses the services provided by the BPMP firmware driver to
implement a clock driver based on the MRQ_CLK request. This part of the
BPMP ABI provides a means to enumerate and control clocks and should
allow the driver to work on any chip that supports this ABI.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 2017-02-03 12:36:36 -08:00
Thierry Reding
31b52ba42d clk: tegra: EMC clock driver depends on EMC driver 
The EMC clock driver uses symbols exported by the EMC driver, so it
needs the corresponding dependency to avoid build breakage.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2015-05-13 15:17:13 +02:00