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* Add support for RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1) SoCs
* Enable Compare Match Timer (CMT) and Timer Unit (TMU)
for Renesas SoCs
* Remove no longer needed ARCH_SHMOBILE Kconfig symbol
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlut9qYACgkQ189kaWo3
T76xVg/9GLAY6zTyb7L5sYXL77cBuP74hFKTSDVCii3oNEQcPg5faEKRt/wb4yub
aivYWrOsH3O107e1jlmtXzOc2GOPu3dZuivrn8rw0YRHdDjZNTUxsfZEgFXwX747
nuQ0IUhk6Tah3vJY9PtvNlcNt1DMFRSzwlfbxlFMKH9LyPulKkkwa43qq/O8HboZ
m1BPRlV3sJwmPi1ll8CXkl0u7PUxBQjKD36rSU/nueV4zLuzIfyglSiMmYxw/8fR
4rtHApxw2bDzFTkYHmMxWdhT1kUkL/d4uogiSGhqhd3AfPlrj2oOxAqeWcLZIbx3
hA5T/bZQK4WC2Gjlkvt4Q5C+LltbIvI0zjow9+Yb6m57kzwOsbXKxPzdEz7PTCsh
z1DdZTdsWswM/EQKv5VxYXSeRtXZkoWT30VKVqFfq7TQb8q1Z/2IAovXUf0zs6vw
d0diRtb8UguCN9q8EUbfbz4+fbXHAQzbZ/mCfVhkBdR1qJOaHk5+fxCM+RsjlQWJ
5EPzOM4NtvV+EypPe5903vkTquOvsatIpuNFyd7niwYQ8w3XA/Sr4+ZD7hAF1JQu
yqVGSzDZZeQneodElWRmapNlu/C9D0hwb1KahHp3Gfs9aaMcngQNmKClMf3YWeFK
+zobTE3gZkslshpw+VcMob0xtpFPSZJkD/mjRQcs/588LCjzmVg=
=Ai7T
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-soc-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Renesas ARM64 Based SoC SoC Updates for v4.20
* Add support for RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1) SoCs
* Enable Compare Match Timer (CMT) and Timer Unit (TMU)
for Renesas SoCs
* Remove no longer needed ARCH_SHMOBILE Kconfig symbol
* tag 'renesas-arm64-soc-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: Add Renesas R8A774C0 support
arm64: Add Renesas R8A774A1 support
arm64: enable CMT/TMU support for Renesas SoC
arm64: renesas: Remove the ARCH_SHMOBILE Kconfig symbol
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
as the Vamrs Rock960. Another big feature is display support including hdmi
and the Innosilicon hdmiphy on the rk3328, right now enabled on the rock64.
The rock64 also got its spi-nor and spdif enabled. On the px30 we can see
dwc2-based usb support now and finally some misc fixes, like for a new dtc
warning, missing address and size cells and microSD fix on sapphire.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAluyLSYQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgSyPB/4y5G/sz6xboaYAj1G14gZDgBeG3PKI2ek1
klDXRhIETCBhwrxic5XErraF2PY+2KJybw85zUBt+d3Bnmixo85qqTKrAEzefvvw
A9cDtzCl1qOjMUcuYKOVjiyl0k5QsEr1Rsl77DCrupNHsOqE6jDQzZbCMSdWIxrG
5e6jyYYVPRibjOFS3AYBGJ5S026fHd/mq9GvUWPcOaOpDngQIvo26PD8H0vKWqXn
py61c0WkOp/revpv9x8Tazz1D9w+xn60jrnXSkKXyKn/sDpixZSPslR2u0oZXP58
lA+ku9XatjFkG1n2d00UQtb7QLpJod0Jrzcy/n5hSdY3C3mHjEE4
=7qWr
-----END PGP SIGNATURE-----
Merge tag 'v4.20-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Some additional new boards, the rk3399-based RockPro64 from Pine64, as well
as the Vamrs Rock960. Another big feature is display support including hdmi
and the Innosilicon hdmiphy on the rk3328, right now enabled on the rock64.
The rock64 also got its spi-nor and spdif enabled. On the px30 we can see
dwc2-based usb support now and finally some misc fixes, like for a new dtc
warning, missing address and size cells and microSD fix on sapphire.
* tag 'v4.20-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: enable display nodes on rk3328-rock64
arm64: dts: rockchip: add rk3328 display nodes
arm64: dts: rockchip: add Innosilicon hdmi phy node to rk3328
arm64: dts: rockchip: add missing address and size cells for rk3399 mipi dsi
arm64: dts: rockchip: Enable SPI NOR flash on Rock64
arm64: dts: rockchip: add initial dts support for Rockpro64
arm64: dts: rockchip: enable dwc2-based otg controller on px30-evb
arm64: dts: rockchip: add dwc2 otg controller on px30
dt-bindings: usb: dwc2: add description for px30
arm64: dts: rockchip: Enable SD card detection for Rock960 boards
arm64: dts: rockchip: Add support for Rock960 board
dt-bindings: arm: rockchip: Add binding for Rock960 board
arm64: dts: rockchip: Split out common nodes for Rock960 based boards
arm64: dts: rockchip: add spdif sound node for rock64
arm64: dts: rockchip: Fix microSD in rk3399 sapphire board
arm64: dts: rockchip: Fix I2C bus unit-address error on rk3399-puma-haikou
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add USB3 controller nodes including usb-core, resets, regulator, ss-phy
and hs-phy. This supports for LD20, PXs3 and the boards. This includes
additional efuse nodes for obtaining PHY trimming values.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
While it is possible to rework the s400 board to solder an eMMC on it,
it is not the default option and most boards are fitted with a NAND
instead.
Let's disable the emmc device by default to reflect this. The board
equipped with an eMMC will just have to alter the DT in the
bootloader, like we do for the reserved memory regions.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
eMMC pwrseq is defined in the s400 dts but not used in the emmc node.
This is probably just a copy/paste error
Fixes: 221cf34bac54 ("ARM64: dts: meson-axg: enable the eMMC controller")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds support for the PCIe interface on the CON4 mini-PCIe
connector.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The status of interrupts might depend on more than just pstate. Use
interrupts_disabled() instead of raw_irqs_disabled_flags() to take the full
context into account.
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
For EL0 entries requiring bp_hardening, daif status is kept at
DAIF_PROCCTX_NOIRQ until after hardening has been done. Then interrupts
are enabled through local_irq_enable().
Before using local_irq_* functions, daifflags should be properly restored
to a state where IRQs are enabled.
Enable IRQs by restoring DAIF_PROCCTX state after bp hardening.
Acked-by: James Morse <james.morse@arm.com>
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Some of the work done in daifflags save/restore is already provided
by irqflags functions. Daifflags should always be a superset of irqflags
(it handles irq status + status of other flags). Modifying behaviour of
irqflags should alter the behaviour of daifflags.
Use irqflags_save/restore functions for the corresponding daifflags
operation.
Reviewed-by: James Morse <james.morse@arm.com>
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Rework the defintion of struct siginfo so that the array padding
struct siginfo to SI_MAX_SIZE can be placed in a union along side of
the rest of the struct siginfo members. The result is that we no
longer need the __ARCH_SI_PREAMBLE_SIZE or SI_PAD_SIZE definitions.
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
There are some extra semicolon in kvm_target_cpu, remove it.
Signed-off-by: zhong jiang <zhongjiang@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
VM tends to be a very overloaded term in KVM, so let's keep it
to describe the virtual machine. For the virtual memory setup,
let's use the "stage2" suffix.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Allow specifying the physical address size limit for a new
VM via the kvm_type argument for the KVM_CREATE_VM ioctl. This
allows us to finalise the stage2 page table as early as possible
and hence perform the right checks on the memory slots
without complication. The size is encoded as Log2(PA_Size) in
bits[7:0] of the type field. For backward compatibility the
value 0 is reserved and implies 40bits. Also, lift the limit
of the IPA to host limit and allow lower IPA sizes (e.g, 32).
The userspace could check the extension KVM_CAP_ARM_VM_IPA_SIZE
for the availability of this feature. The cap check returns the
maximum limit for the physical address shift supported by the host.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <cdall@kernel.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Since we are about to remove the lower limit on the IPA size,
make sure that we do not go to 1 level page table (e.g, with
32bit IPA on 64K host with concatenation) to avoid splitting
the host PMD huge pages at stage2.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <cdall@kernel.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
So far we have restricted the IPA size of the VM to the default
value (40bits). Now that we can manage the IPA size per VM and
support dynamic stage2 page tables, we can allow VMs to have
larger IPA. This patch introduces a the maximum IPA size
supported on the host. This is decided by the following factors :
1) Maximum PARange supported by the CPUs - This can be inferred
from the system wide safe value.
2) Maximum PA size supported by the host kernel (48 vs 52)
3) Number of levels in the host page table (as we base our
stage2 tables on the host table helpers).
Since the stage2 page table code is dependent on the stage1
page table, we always ensure that :
Number of Levels at Stage1 >= Number of Levels at Stage2
So we limit the IPA to make sure that the above condition
is satisfied. This will affect the following combinations
of VA_BITS and IPA for different page sizes.
Host configuration | Unsupported IPA ranges
39bit VA, 4K | [44, 48]
36bit VA, 16K | [41, 48]
42bit VA, 64K | [47, 52]
Supporting the above combinations need independent stage2
page table manipulation code, which would need substantial
changes. We could purse the solution independently and
switch the page table code once we have it ready.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <cdall@kernel.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64_1188873_read_cntvct_el0() is protected by the correct
CONFIG_ARM64_ERRATUM_1188873 #ifdef, but the only reference to it is
also inside of an CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND section,
and causes a warning if that is disabled:
drivers/clocksource/arm_arch_timer.c:323:20: error: 'arm64_1188873_read_cntvct_el0' defined but not used [-Werror=unused-function]
Since the erratum requires that we always apply the workaround
in the timer driver, select that symbol as we do for SoC
specific errata.
Fixes: 95b861a4a6d9 ("arm64: arch_timer: Add workaround for ARM erratum 1188873")
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The ICU handles several interrupt groups, each of them being a subpart
of the ICU node.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Create an ICU subnode for the NSR interrupts. This subnode becomes the
CP110 interrupt parent, removing the need for the ICU_GRP_NSR parameter.
Move all DT110 nodes to use these new bindings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add SD controller nodes for LD20 and PXs3.
LD20 does not support the UHS mode, while PXs3 supports it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add the System Error Interrupt node, representing an IRQ chip which is
part of the GIC. The SEI node aggregates interrupts from the AP through
wired interrupts, and from the CPs through MSIs.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds CPU deep Idle and Cluster deep Idle states BUT it defines
the idle state for each cpu (defined under cpu-idle-states parameter)
only for the quad version therefore it does NOT activate CPU Idle
capability for the other version.
[gregory: extract from a larger patch]
Signed-off-by: orenbh <orenbh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Aligned with what we have done for the others nodes. It will also allow
to easily modify the cpu configuration at board (or sub-SoC) level.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
There is nothing arch specific about building dtb files other than their
location under /arch/*/boot/dts/. Keeping each arch aligned is a pain.
The dependencies and supported targets are all slightly different.
Also, a cross-compiler for each arch is needed, but really the host
compiler preprocessor is perfectly fine for building dtbs. Move the
build rules to a common location and remove the arch specific ones. This
is done in a single step to avoid warnings about overriding rules.
The build dependencies had been a mixture of 'scripts' and/or 'prepare'.
These pull in several dependencies some of which need a target compiler
(specifically devicetable-offsets.h) and aren't needed to build dtbs.
All that is really needed is dtc, so adjust the dependencies to only be
dtc.
This change enables support 'dtbs_install' on some arches which were
missing the target.
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Acked-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Michal Marek <michal.lkml@markovi.net>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Chris Zankel <chris@zankel.net>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: linux-kbuild@vger.kernel.org
Cc: linux-snps-arc@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: uclinux-h8-devel@lists.sourceforge.jp
Cc: linux-mips@linux-mips.org
Cc: nios2-dev@lists.rocketboards.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-xtensa@linux-xtensa.org
Signed-off-by: Rob Herring <robh@kernel.org>
Enable the newly introduced Marvell SEI driver for the 64-bit Marvell
EBU platforms.
Suggested-by: Haim Boot <hayim@marvell.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
- Add watchdog node on Armada 37xx
- Update PPv2 interrupts name
- Add support for the SolidRun Clearfog GT 8K (Aramda 8040 based)
- Add thermal-zone nodes for Aramda 7K/8K
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCW7HpQwAKCRALBhiOFHI7
1a8HAJ4tUZNYmuo9AWVWLj+FJaTBgQSJYgCaA+tkbl2J+bsZfL7JFpHGVukKmzc=
=4cF/
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.20-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt64 for 4.20 (part 1)
- Add watchdog node on Armada 37xx
- Update PPv2 interrupts name
- Add support for the SolidRun Clearfog GT 8K (Aramda 8040 based)
- Add thermal-zone nodes for Aramda 7K/8K
* tag 'mvebu-dt64-4.20-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: armada-37xx: add nodes to support watchdog
arm64: dts: marvell: armada-cp110: describe more PPv2 interrupts
arm64: dts: marvell: armada-cp110: change the PPv2 IRQ names
arm64: dts: add support for SolidRun Clearfog GT 8K
arm64: dts: marvell: add thermal-zone node in cp110 DTSI file
arm64: dts: marvell: add macro to make distinction between node names
arm64: dts: marvell: add thermal-zone node in ap806 DTSI file
arm64: dts: marvell: move AP806/CP110 thermal nodes into a new syscon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add the second Dual UART device for LS208xA SoCs.
- Add necessary big-endian property for NOR device on LS104xA based
boards, remove unneeded big-endian property from IFC controller.
- DTC has new checks for I2C and SPI buses to land into 4.20. A patch
from Rob to fix the bus node names and warnings in unit-addresses.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbscRcAAoJEFBXWFqHsHzOxVQIALdjNChTrg5K0GBRTavdl+Hq
sOjW0W6Hh5MN4r1wKpSsKAPD/XsPmjMpsreC/qlR+uFGleKzhrHWRtbmR/FG7Aut
Sv052Yew5Fc8mWzNGNwQes6rpagRioqnLD6L6bPFoelgGsVFxrysDhAWhBgp7Zj8
HhQvgVaP2t2FDJX6O3Vbve4OgUNrmg5fp6bm19X3BSDa8Bsm6+9QU1w0ulCeWA/R
HXiGtECO+N1td3ViVh2iZMoQgvXSxY0twn2srMlFP+TsfOxKvC8lN2/RhwqtrbQs
AIWTbCuJHukGUQfRuIhVYhPUVZomPuaBUIBm8Semjn/dhjmBK7eXytFKY7AQcKM=
=BFcP
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Freescale arm64 device tree update for 4.20:
- Add the second Dual UART device for LS208xA SoCs.
- Add necessary big-endian property for NOR device on LS104xA based
boards, remove unneeded big-endian property from IFC controller.
- DTC has new checks for I2C and SPI buses to land into 4.20. A patch
from Rob to fix the bus node names and warnings in unit-addresses.
* tag 'imx-dt64-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: fsl: Fix I2C and SPI bus warnings
arm64: dts: ls208xa: add second duart
arm64: dts: fsl: remove big-endian field from IFC controller
arm64: dts: Add big-endian in nor node for ls104xa
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Our usual set of DT changes for the arm64 Allwinner SoCs.
The most notable things are:
- HDMI support on the A64
- New boards: OrangePi One Plus
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAluvknEACgkQ0rTAlCFN
r3QcChAAh48PP26x4cemD+dmtOhXEPIBw1PRDHCwxIYXxlk//1pi2mbW3EJcgDF4
boL1nANP+X06cveQqI28TImQWCOMTOXd7AWxyFZS+0QoORWXYwZMnrYydrscFvBr
7eoBOou805RNLHeTn0w0TFHwRCSsh6XSLitGzec1NMh5v9YJMZamFWgUkCod7J8k
uKfLuL7BqdBfAGJr83vwTds7y+r9bvZTDSIw1neAn2dfi8z3j5DortYcMp76jPJc
51z64RSna9o4nYe9nLl4bORq9rTfH/CJf5cc+/Br6RTWzA4SlAGzyWBdwCH4fbWv
BKVc5aDUpkoMkgNJmZP27L4tbsV7cH5sZ4s820yHioUn2ghUWjq585KyR7/1yqI5
MGZDNzlUxbzGPBgObg8K8dl7ZL9f09ziDsoWF3ysL/vtYpkjxBML4mCsIiUgblkR
kpleA1Zv8uL864MQBF0gUixRSeU4Lq4xu4fBI4Vi7CvzYrX1ZDEoiUvFd3OzxJmL
ZeKmd0mOWu1y8oUyw4S4nvzrtklAAjU2pukfpUC5J66JFlcyJQ7ic7gZ3UMsyWTW
5xsAWmqhToYQNKGdEsHoFtDI9clM/+0wpyedc655020biMP8/Wf7gHexVsM3+x6W
fUbTqWHNkc7jD8lc0qZFQGZiGRMToZkTHALD0/kb+gvLYEblXtk=
=sPs9
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt64-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner arm64 DT changes for 4.20
Our usual set of DT changes for the arm64 Allwinner SoCs.
The most notable things are:
- HDMI support on the A64
- New boards: OrangePi One Plus
* tag 'sunxi-dt64-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (28 commits)
arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay
arm64: dts: allwinner: a64: Enable HDMI output on A64 boards w/ HDMI
arm64: dts: allwinner: a64: Add display pipeline
arm64: dts: allwinner: h6: add system controller device tree node
arm64: dts: allwinner: h6: Add OrangePi One Plus initial support
arm64: dts: allwinner: a64: Rename r_i2c_pins_a label to r_i2c_pl89_pins
arm64: dts: allwinner: a64: Rename uart0_pins_a label to uart0_pb_pins
arm64: dts: allwinner: a64: Split out data strobe pin from mmc2 pinmux
arm64: dts: allwinner: a64: NanoPi-A64: Add blue status LED
arm64: dts: allwinner: a64: NanoPi-A64: Add Wifi chip
arm64: dts: allwinner: a64: NanoPi-A64: Add Ethernet
arm64: dts: allwinner: a64: NanoPi-A64: Fix DCDC1 voltage
arm64: dts: allwinner: a64: Olinuxino: enable USB
arm64: dts: allwinner: a64: Olinuxino: add Ethernet nodes
arm64: dts: allwinner: a64: Olinuxino: fix DRAM voltage
arm64: dts: allwinner: a64: Orange Pi Win: Adjust CSI power rails
arm64: dts: allwinner: a64: Orange Pi Win: Add SPI flash node
arm64: dts: allwinner: a64: Orange Pi Win: Add SDIO node
arm64: dts: allwinner: a64: Orange Pi Win: Add LED node
arm64: dts: allwinner: a64: Orange Pi Win: Add UARTs
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is our usual H3/H5 pull request
The most notable changes are:
- the video decoding / encoding unit is finally enabled on the H3
- Mali support for the H5
- New boards: BananaPi M2+ v1.2, Orange Pi Zero Plus 2 H3 support
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAluvhigACgkQ0rTAlCFN
r3SHzA/+IsYaAQgvy8NE7Ok1rhy/OU7eLPjd2JVqBgJ6SwCkcM4eW7Zol6SoMawG
Wt9Bh+1JFvyzi4GiftwL/rPzOh2rxjuuDZMmLo5sZBztTLoFmKv9XIYgjnv8kVJY
WXQ5Z3BOKA0H6lyIw6jinS6uotTGiWhtvihOpoAeus8pHJ/AWo3lbntb0tdPob7b
fA95Dsm5ddqhPonrkqq1WEJ+Yepetoa7m2U2dJLOUHPaX8AmIm4GgQNoA6MEVYRJ
0sZ/FDhe+5yvDRKbebVRrlqITGgwEYuTPYO1zQEQleQo6SPEvJuUOo+CW5R3Pgqc
sKk5UxohaAvxbATt5gYhqTl4GwSKkMrNdJroVTc3bf8CekwxgpnNoV2nszGQSrjH
yU2Nwy0d2ok4ZacxoFBjosbGWYh2UuqAlv7lX/UPr79GbeJpA9IUDXQxBGJoodTH
0Wy3rUSgAUU/nRfsaDZtkLqIB8/keiSZzWV97aCnIUGHWk00MfnB8nzhkU1YEel0
8Lbqh+9NY4+P3Ps4UxsnOIL0LQZt2Twf738GF/boa4RftYQOUJJQmvNO8TpFL0OK
VKe10hX0trfsNOv2Ws7oTsGrLZXqLsB8r6jjsSX84NR2Dft2CYj8s7u2lpnmFTxd
ciBjzeyFb4TbYW2iYOsYLRaei0w8GSNMdHShNU04fO/zh1dP8lU=
=AJmQ
-----END PGP SIGNATURE-----
Merge tag 'sunxi-h3-h5-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3 and H5 DT additions for 4.20
This is our usual H3/H5 pull request
The most notable changes are:
- the video decoding / encoding unit is finally enabled on the H3
- Mali support for the H5
- New boards: BananaPi M2+ v1.2, Orange Pi Zero Plus 2 H3 support
* tag 'sunxi-h3-h5-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees
ARM: dts: sun8i-h3: Add Video Engine and reserved memory nodes
arm64: dts: allwinner: h5: Add device tree for Bananapi M2 Plus H5
ARM: dts: sun8i: h3: Split out non-SoC-specific parts of Bananapi M2 Plus
ARM: dts: sun8i: h3: bpi-m2-plus: Fix address for external RGMII Ethernet PHY
ARM: dts: sun8i: h3-h5: ir register size should be the whole memory block
arm64: dts: allwinner: h5: Add device node for Mali-450 GPU
ARM: dts: sun8i: Add initial Orangepi Zero Plus 2 H3 support
nvmem: sunxi-sid: add support for H5's SID controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Here is a single config change to enable the DRM driver in the arm64
defconfig.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAluvh/UACgkQ0rTAlCFN
r3QS1A//bYiQuFEcWbHOKQ7/WpPCyaHaENanOTvX0JluLakwq32/wFXkzJ4ioD9C
cHUwLtwKBv4hxAzKkmrtWcFnSAOzaZio3EPgrsjlq5vi3hPVQVhW6VsezQiIRJ+3
kgdEXU0n+zniYSNxAOuBB8N0Z2HjI5imBiqPO7663ID15ZwS/N2ERAr675G7iIac
g5oN1W89XIf3dS1DmNDwohfgBXzQU9CuVJPKe/RravaRSy8q+2R214OUBRCZVC2F
kJHr/HqL4Kj98M6qchqe6jS5HELIRMM1ihMc+Q5ysMVLgIDW1T8Ur2HAexb7xoK+
OJqLx3AIXuLKilHSs6wjvR32RUJoiq1pWPNxrOnPP+Hk6SeXwao/Wcwr1YxUJ6Sl
PRYxkLe/ae0c2dqJno2m0U4tQ2R9MvL+KIUdh8e5r0zgzMMk0i2MFNI5cmb6j0U+
nycmc9ioCEaGibDeTm6pNg48xAg464uWDjnkM89+8PjPxEO2uVjQoMO8uk68kvWP
urYiwsTirJz1xIeNYTZ0zXlDjkDTnJzUPmpXv1OZ46+iz0kq8rKrg1uCS9pSl2tH
8WGV3ejWu+K3QA4XjbHwQd/4K8nexiPAkAFXcSjgJFy6t9QTakJfahrIN3LJ+5pi
bH+WKardfjlGxMACQkS6tiXhyG2Nze9KTdJVctz5RtjaHH2PMaQ=
=MBKv
-----END PGP SIGNATURE-----
Merge tag 'sunxi-config64-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/defconfig
Allwinner arm64 config changes for 4.20
Here is a single config change to enable the DRM driver in the arm64
defconfig.
* tag 'sunxi-config64-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: defconfig: Enable CONFIG_DRM_SUN4I
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the USB3 and USB2 phys implemented in UniPhier SoCs.
These phys are necessary for dwc3 and ehci controllers driving
the USB ports on arm64 UniPhier SoCs.
Since the USB host drivers are already built-in, so only the phy
driver are missing to allow booting with USB devices.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It recently came to light that userspace can execute WFI, and that
the arm64 kernel doesn't trap this event. This sounds rather benign,
but the kernel should decide when it wants to wait for an interrupt,
and not userspace.
Let's trap WFI and immediately return after having skipped the
instruction. This effectively makes WFI a rather expensive NOP.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAluw4MIACgkQONu9yGCS
aT7+8xAAiYnc4khUsxeInm3z44WPfRX1+UF51frTNSY5C8Nn5nvRSnTUNLuKkkrz
8RbwCL6UYyJxF9I/oZdHPsPOD4IxXkQY55tBjz7ZbSBIFEwYM6RJMm8mAGlXY7wq
VyWA5MhlpGHM9DjrguB4DMRipnrSc06CVAnC+ZyKLjzblzU1Wdf2dYu+AW9pUVXP
j4r74lFED5djPY1xfqfzEwmYRCeEGYGx7zMqT3GrrF5uFPqj1H6O5klEsAhIZvdl
IWnJTU2coC8R/Sd17g4lHWPIeQNnMUGIUbu+PhIrZ/lDwFxlocg4BvarPXEdzgYi
gdZzKBfovpEsSu5RCQsKWG4IGQxY7I1p70IOP9eqEFHZy77qT1YcHVAWrK1Y/bJd
UA08gUOSzRnhKkNR3+PsaMflUOl9WkpyHECZu394cyRGMutSS50aWkavJPJ/o1Qi
D/oGqZLLcKFyuNcchG+Met1TzY3LvYEDgSburqwqeUZWtAsGs8kmiiq7qvmXx4zV
IcgM8ERqJ8mbfhfsXQU7hwydIrPJ3JdIq19RnM5ajbv2Q4C/qJCyAKkQoacrlKR4
aiow/qvyNrP80rpXfPJB8/8PiWeDtAnnGhM+xySZNlw3t8GR6NYpUkIzf5TdkSb3
C8KuKg6FY9QAS62fv+5KK3LB/wbQanxaPNruQFGe5K1iDQ5Fvzw=
=dMl4
-----END PGP SIGNATURE-----
Merge tag 'v4.19-rc6' into for-4.20/block
Merge -rc6 in, for two reasons:
1) Resolve a trivial conflict in the blk-mq-tag.c documentation
2) A few important regression fixes went into upstream directly, so
they aren't in the 4.20 branch.
Signed-off-by: Jens Axboe <axboe@kernel.dk>
* tag 'v4.19-rc6': (780 commits)
Linux 4.19-rc6
MAINTAINERS: fix reference to moved drivers/{misc => auxdisplay}/panel.c
cpufreq: qcom-kryo: Fix section annotations
perf/core: Add sanity check to deal with pinned event failure
xen/blkfront: correct purging of persistent grants
Revert "xen/blkfront: When purging persistent grants, keep them in the buffer"
selftests/powerpc: Fix Makefiles for headers_install change
blk-mq: I/O and timer unplugs are inverted in blktrace
dax: Fix deadlock in dax_lock_mapping_entry()
x86/boot: Fix kexec booting failure in the SEV bit detection code
bcache: add separate workqueue for journal_write to avoid deadlock
drm/amd/display: Fix Edid emulation for linux
drm/amd/display: Fix Vega10 lightup on S3 resume
drm/amdgpu: Fix vce work queue was not cancelled when suspend
Revert "drm/panel: Add device_link from panel device to DRM device"
xen/blkfront: When purging persistent grants, keep them in the buffer
clocksource/drivers/timer-atmel-pit: Properly handle error cases
block: fix deadline elevator drain for zoned block devices
ACPI / hotplug / PCI: Don't scan for non-hotplug bridges if slot is not bridge
drm/syncobj: Don't leak fences when WAIT_FOR_SUBMIT is set
...
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Not all execution modes are valid for a guest, and some of them
depend on what the HW actually supports. Let's verify that what
userspace provides is compatible with both the VM settings and
the HW capabilities.
Cc: <stable@vger.kernel.org>
Fixes: 0d854a60b1d7 ("arm64: KVM: enable initialization of a 32bit vcpu")
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
We currently allow userspace to access the core register file
in about any possible way, including straddling multiple
registers and doing unaligned accesses.
This is not the expected use of the ABI, and nobody is actually
using it that way. Let's tighten it by explicitly checking
the size and alignment for each field of the register file.
Cc: <stable@vger.kernel.org>
Fixes: 2f4a07c5f9fe ("arm64: KVM: guest one-reg interface")
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
[maz: rewrote Dave's initial patch to be more easily backported]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
There is an extra semicolon in arch_prepare_kprobe, remove it.
Signed-off-by: zhong jiang <zhongjiang@huawei.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Add support for handling 52bit addresses in PAR to HPFAR
conversion. Instead of hardcoding the address limits, we
now use PHYS_MASK_SHIFT.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <cdall@kernel.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Now that we can manage the stage2 page table per VM, switch the
configuration details to per VM instance. The VTCR is updated
with the values specific to the VM based on the configuration.
We store the IPA size and the number of stage2 page table levels
for the guest already in VTCR. Decode it back from the vtcr
field wherever we need it.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <cdall@kernel.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
VTCR_EL2 holds the following key stage2 translation table
parameters:
SL0 - Entry level in the page table lookup.
T0SZ - Denotes the size of the memory addressed by the table.
We have been using fixed values for the SL0 depending on the
page size as we have a fixed IPA size. But since we are about
to make it dynamic, we need to calculate the SL0 at runtime
per VM. This patch adds a helper to compute the value of SL0
for a VM based on the IPA size.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <cdall@kernel.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
