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The skcipher conversion for ARM missed the select on CRYPTO_SIMD,
causing build failures if SIMD was not otherwise enabled.
Fixes: da40e7a4ba4d ("crypto: aes-ce - Convert to skcipher")
Fixes: 211f41af534a ("crypto: aesbs - Convert to skcipher")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Currently the memory controller and master priorities drivers are
enabled in da850.dtsi. For boards for which there are no settings
defined, this makes these drivers emit error messages.
Disable the nodes in da850.dtsi and only enable them for da850-lcdk -
the only board that currently needs them.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Currently the mmc driver is polling the gpio to know if the
card was removed.
By using a gpio descriptor instead of the platform callbacks,
the driver will be able to register the gpio using the mmc core
APIs designed for this purpose.
This has the advantage that an irq will be registered, and
polling is no longer needed. Also, a dependency on platform
callbacks is removed for this board.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
[nsekhar@ti.com: minor commit message edit]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Currently the mmc driver is polling the gpio to know if the
card was removed.
By using a gpio descriptor instead of the platform callbacks,
the driver will be able to register the gpio using the mmc core
APIs designed for this purpose.
This has the advantage that an irq will be registered, and
polling is no longer needed. Also, a dependency on platform
callbacks is removed for this board.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
[nsekhar@ti.com: minor commit message edit]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Currently the mmc driver is polling the gpio to know if the
card was removed.
By using a gpio descriptor instead of the platform callbacks,
the driver will be able to register the gpio using the mmc core
APIs designed for this purpose.
This has the advantage that an irq will be registered, and
polling is no longer needed. Also, a dependency on platform
callbacks is removed for this board.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
In order to avoid Linux generating a random mac address on every boot,
add an ethernet0 alias that will allow u-boot to patch the dtb with
the MAC address programmed into the EEPROM.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
udplite conflict is resolved by taking what 'net-next' did
which removed the backlog receive method assignment, since
it is no longer necessary.
Two entries were added to the non-priv ethtool operations
switch statement, one in 'net' and one in 'net-next, so
simple overlapping changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
Pull ARM fix from Russell King:
"This resolves the ksyms issues by reverting the commit which
introduced the breakage"
There was what I consider to be a better fix, but it's late in the rc
game, so I'll take the revert.
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
Revert "arm: move exports to definitions"
The usual bunch of DT additions, but most notably:
- A31 DRM driver
- A31 audio codec
- WiFi for the A80-Based boards and the CHIP
- Support for the NextThing Co CHIP Pro (the first board with NAND
enabled)
- New board: NanoPi M1
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYNFgQAAoJEBx+YmzsjxAg8zAP/0j7VH8Vs0cPqk2fjS8g+aKH
26vHXWVWmBPjoUXHn+EtGxQZdWR8IU80nwrg2ZYfNqK6/4Z4krFTkfATY1EstNeL
Ps8O00P+sUoDV/VTeT4j9fby5kdsHod6fSGZD5aA7UL5s1jfCnp8ZrGqjeWs3LIB
fVMpqMwWBSOs6o0aw73eKv7K5sM+fDkGx7ziQg8f9SzTuAHj4gRocbJO8XwbcAvh
3JJ9SQnQV3CGaOP2d6vAWi457zAFF0nqo1IrsxLiMj0l3lq3taTPAEm9VH1SZwoD
UT2lQiOD3oggUCNJ6K+KN5EdqktLz+l0qkSyZHuKxxk49NvbKt2H78rGFuF1wa0d
cOPAXq+N3jzrZTzkFLxWTzaCLYBy48keVvSFMRZPZqsiMwuujEo6/UY5tBbwbq6u
4aVd3FaUIAM8sY65uj+lvZjdZvPZT0vh6lWDMNtAMT6jt6ZKaaIvLiXwAHsjntPa
WL9k2OOs47H6DVOFnL5nQm88bblHBVtMzTv4ouFIOLSiMAGsKlbR0uG5B6M0h6QB
nZ+kcWlpMVkHXfDnypvDGZiD3FHdatagkw5V5uGiYjB1CyH0r9DZRpiGhKSPFK7L
Mx0GSbWOLS+q0obCZ2DPhXGviRmYibLetKqBlZyxsOZjMDujDbDEjm2ZmRVBw7az
Qd9tS3YtTiWOXmL7HulQ
=cln8
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.10-bis' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT additions for 4.10, bis" from Maxime Ripard:
The usual bunch of DT additions, but most notably:
- A31 DRM driver
- A31 audio codec
- WiFi for the A80-Based boards and the CHIP
- Support for the NextThing Co CHIP Pro (the first board with NAND
enabled)
- New board: NanoPi M1
* tag 'sunxi-dt-for-4.10-bis' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (41 commits)
ARM: dts: sun6i: hummingbird-a31: Enable display output through VGA bridge
ARM: dts: sun5i: Add touchscreen node to reference-design-tablet.dtsi
ARM: sunxi: Add the missing clocks to the pinctrl nodes
ARM: dts: sun7i: bananapi-m1-plus: Enable USB OTG
ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators
ARM: dts: sun7i: bananapi-m1-plus: Enable USB PHY for USB host support
ARM: sun8i: sina33: Enable USB gadget
ARM: dts: sun8i: reference-design-tablet: ldo_io1 is vcc-touchscreen
ARM: dts: sun8i: replace enable-sdio-wakeup with wakeup-source for BananaPi M1+
ARM: gr8: evb: Add i2s codec
ARM: dts: sun6i: sina31s: Enable internal audio codec
ARM: dts: sun6i: hummingbird: Enable internal audio codec
ARM: dts: sun6i: Add audio codec device node
ARM: gr8: evb: Enable SPDIF
ARM: dts: sun8i: Add SPI controller node in H3
ARM: dts: sun8i: Add SPI pinctrl node in H3
ARM: dts: sun8i: Add dts file for NanoPi M1 SBC
ARM: dts: sun8i: Use the common file in NanoPi NEO SBC
ARM: dts: sun8i: Add common dtsi file for NanoPi SBCs
ARM: dts: sun9i: cubieboard4: Enable AP6330 WiFi
...
remove legacy support of orion5x ls-chl
-----BEGIN PGP SIGNATURE-----
iGoEABECACoFAlgwDyEjHGdyZWdvcnkuY2xlbWVudEBmcmVlLWVsZWN0cm9ucy5j
b20ACgkQCwYYjhRyO9XvjwCffCGDTTvUAn1iBzbI+ijo3Zx1+iwAnAt3aa2pXiSI
Aya4ElGbmbfODIbo
=cSoP
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.10-1' of git://git.infradead.org/linux-mvebu into next/soc
Pull "mvebu soc for 4.10 (part 1)" from Gregory CLEMENT:
remove legacy support of orion5x ls-chl
* tag 'mvebu-soc-4.10-1' of git://git.infradead.org/linux-mvebu:
ARM: orion5x: remove legacy support of ls-chl
Add missing pinmux declaration for netgear NASes
Fix i2c compatible string for netgear NASes
Fix on a wrong comment about PLL frequency
Fix spelling mistake of the manufacturer's name of the Topkick
Add dt support for the orion5x ls-chl Linkstation device
First step of fixing DTC warning for Armada 370, 375 and XP
-----BEGIN PGP SIGNATURE-----
iGoEABECACoFAlgwC9wjHGdyZWdvcnkuY2xlbWVudEBmcmVlLWVsZWN0cm9ucy5j
b20ACgkQCwYYjhRyO9VAsgCfdqwKz5V7XP/xfkIUxoykhtrLL4QAoJlAAwV+UG2U
Gbvc3BMoymvienDl
=06ld
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.10-1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.10 (part 1)" from Gregory CLEMENT:
Add missing pinmux declaration for netgear NASes
Fix i2c compatible string for netgear NASes
Fix on a wrong comment about PLL frequency
Fix spelling mistake of the manufacturer's name of the Topkick
Add dt support for the orion5x ls-chl Linkstation device
First step of fixing DTC warning for Armada 370, 375 and XP
* tag 'mvebu-dt-4.10-1' of git://git.infradead.org/linux-mvebu: (30 commits)
ARM: dts: armada-375: Fixup ethernet child DT warning
ARM: dts: armada-375: Fixup memory DT warning
ARM: dts: armada-375: Remove skeleton.dtsi
ARM: dts: armada-375: Fixup pinctrl DT warnings
ARM: dts: armada-375: Fixup pcie DT warnings
ARM: dts: armada-375: Fixup mdio DT warning
ARM: dts: armada-375: Use the node labels
ARM: dts: armada-375: Add node labels
ARM: dts: armada-370-xp: Fixup regulator DT warning
ARM: dts: armada-370-xp: Remove button address and fixup names
ARM: dts: armada-370-xp: Remove address from dsa unit name
ARM: dts: armada-370-xp: Fixup memory DT warning
ARM: dts: armada-370-xp: Fixup l2-cache DT warning
ARM: dts: armada-370-xp: Remove skeleton.dtsi
ARM: dts: armada-370: Fixup pcie DT warnings
ARM: dts: armada-xp: Fixup pcie DT warnings
ARM: dts: armada-370-xp: Fixup mdio DT warning
ARM: dts: armada-370-xp: Use the node labels
ARM: dts: armada-370-xp: add node labels
ARM: dts: armada-370-xp: move the cpurst node in the common file
...
from http://lkml.kernel.org/r/20161021085848.1754-1-narmstrong@baylibre.com
Changes since v1 Pull Request at : http://lkml.kernel.org/r/1305c61f-b1ef-7caf-7788-67e2b907e873@baylibre.com
- Clarify copyright dates in commit message
- Remove linux/arch/... lines from the top of the files
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNVmZAAoJEHfc29rIyEnRzhcQAKeMdvEHMAduI94jnQNK8i8g
rF0zXYb3h2WUHi/aCtUG13wQtgJibWeruwSVKFq/G18KkAD78tb+sSu7njFeYSXF
30D9jANzbqOY6p+R8SKBnbasw6Z5yO5wNpIHSng2FThTSfZL/rlBhmx9AJ431/Hy
eiosyyDAnwNef71mbrK9g7hw8iwTzuHpUkWILqSf48mkq8Sgn3nSyX1SP33CQaqT
BI1MSYXcDJGvu5iJ6l3JwVxeJ0NbS77vz3xL93t9vMS0kx+nj+r5Rfa+t0nFwJLg
xqyG8qIM8NRf2isZaH/mzIZt3r1GZkuOtL7zOmK8kq0U+Epdt5FQPk8Hs3H55SuC
xqn9s5xqPul3kxAERZQGXvBHfI0q7By5jX1TkR904mBvzAdYDrZk8/Tfql5pEyAD
U3KkjE7XAOYbiiUlJmqAMzklbEL387XnWej+1+Fs1/wqbNuNAhFSEnzyQt1V1RSD
CLz5nksDNxYlqUFxIGxjhc05Gfy6nyHvf1NO4gGEB630TacATJ/F6HfwYrM4AU3k
eyaakQo+FKeM1onrbnrX5+VFLcstmKb43P2yAdWyz2Y/EAAkvFuQy55pRRlW6WgD
dTqERUpHGnlTNzsSZbcovh3JQ0PQTWUYamH6HNmWcKmjt3HHAdhG6eER7ITzxvsp
Eu4A+iuHtRXeAVSFNmWB
=Xa6Z
-----END PGP SIGNATURE-----
Merge tag 'oxnas-arm-soc-for-4.10-v2' of https://github.com/OXNAS/linux into next/soc
Pull "ARM: OXNAS SoC updates for 4.10" from Neil Armstrong:
- Add SMP support for the Oxford Semiconductor OX820 SoC
from http://lkml.kernel.org/r/20161021085848.1754-1-narmstrong@baylibre.com
Changes since v1 Pull Request at : http://lkml.kernel.org/r/1305c61f-b1ef-7caf-7788-67e2b907e873@baylibre.com
- Clarify copyright dates in commit message
- Remove linux/arch/... lines from the top of the files
* tag 'oxnas-arm-soc-for-4.10-v2' of https://github.com/OXNAS/linux:
ARM: oxnas: Add OX820 config and makefile entry
ARM: oxnas: Add OX820 SMP support
Add PCIe support to the ARTPEC-6 SoC. This uses the existing
pcie-artpec6 driver.
So, all that is needed is device tree entries in the DTS.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Jesper Nilsson <jespern@axis.com>
Since the ARTPEC-6 machine port already uses syscon,
MACH_ARTPEC6 should select MFD_SYSCON.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Jesper Nilsson <jespern@axis.com>
Merge "IDE to PATA change in ARM defconfigs from Bartlomiej Zolnierkiewicz:
On Monday, October 31, 2016 07:14:13 PM Bartlomiej Zolnierkiewicz wrote:
> On Monday, October 31, 2016 03:46:22 PM Russell King - ARM Linux wrote:
> > On Wed, Oct 26, 2016 at 07:01:12PM +0200, Bartlomiej Zolnierkiewicz wrote:
> > > On Wednesday, July 13, 2016 04:37:31 PM Arnd Bergmann wrote:
> > > > I'd be fine with just getting a pull request with all the patches that
> > > > had no negative feedback and that were not already applied (if any).
> > >
> > > Here it is (sorry for taking so long).
> >
> > I've just been digging in the dmesg logs from when I was using the
> > Assabet+Neponset as my firewall, and it was having to use the IDE
> > ide-cs driver rather than the pata pcmcia driver.
> >
> > I don't recall whether the pata pcmcia driver was a problem or not,
> > as the PCMCIA interface can't cope with _any_ 32-bit accesses. I
> > think PATA tries to use the "highest" possible access size by
> > default...
>
> It doesn't actually - it defaults to 16-bits for PIO data access and
> you must explicitly enable 32-bits using ATA_PFLAG_PIO32 port flag
> (pata_pcmcia doesn't set it so it should be okay). Also taskfile
> registers are accessed using 8-bits access by default transport
> functions (which are used by pata_pcmcia).
Please also note that:
- assebet_defconfig currently doesn't even enable ide-cs
(CONFIG_BLK_DEV_IDECS) in the mainline kernel
- neponset_defconfig doesn't even enable IDE (CONFIG_IDE)
in the mainline kernel
so there is no risk of breaking anything..
* 'v4.9-rc2-arm-configs-pata' of https://github.com/bzolnier/linux:
arm: spitz_defconfig: convert to use libata PATA drivers
arm: s3c2410_defconfig: convert to use libata PATA drivers
arm: netwinder_defconfig: convert to use libata PATA drivers
arm: jornada720_defconfig: convert to use libata PATA drivers
arm: ixp4xx_defconfig: convert to use libata PATA drivers
arm: h3600_defconfig: convert to use libata PATA drivers
arm: corgi_defconfig: convert to use libata PATA drivers
arm: am200epdkit_defconfig: convert to use libata PATA drivers
arm: omap1_defconfig: convert to use libata PATA drivers
arm: collie_defconfig: convert to use libata PATA drivers
arm: shannon_defconfig: disable IDE subsystem
arm: mainstone_defconfig: disable IDE subsystem
arm: lart_defconfig: disable IDE subsystem
arm: cerfcube_defconfig: disable IDE subsystem
arm: badge4_defconfig: disable IDE subsystem
arm: assabet_defconfig: disable IDE subsystem
The I2C nodes are missing #address-cells and #size-cells.
This is causing warning at device tree compilation when
some I2C device sub-nodes are defined.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNVbiAAoJEMrHeC97M/+mg60P/0laAv/QETu1tkkvB8ENWyKO
xNcZWajM7xvBR7WcuDeAFWh7tFJpEJJ8GCk+yBeqeHGvn+ElIOfWl/VOcx5rDPGW
OVuJfX3eZ/FXl5QY51pPLZ4ZZ92NygEqPx58AucwJZz4t/4pzNUxGADG+iFKfj3f
HBUOZqQiq1s+ensORpp/eWwZD0vW8UoDgYyfc4vA8UwyYlifw0VgVXSQi8u+OhR+
b1UmEvz5Wk03bOp5jXBGMewLM1soU5nKaTPtPGWSJBmVbrYOKYB7xO3jd64u9Mxy
dK+H+swQjJTMEMQSRq0fftOBy6Z0jzYCHM4L6HijLiPQkFjL3sgbO63pXslyGrS5
3QoEnPQZtZRZ36PFvUyDOF1AG5MEMzx+AXiHbClV1Si3jRPADjj5+ZkawOlu6joZ
OZnxTPs3C7dHZUMzIOoD+ykRmlpkrGMdzim7wSfBOY+8Glz7c0Bs8TtgHpcYFv5q
jN6m/0sQvZPhheewFJg1A4y1zaObVJ28Ixbx4e/ojh6kj4cdGFAdFyDJt691jb7K
Nt08JaxS7DuwJGgb3toN5h6RKWI1bXj6+piphRtmUdIc1DXamtpoNVkSoJux/k/1
0UQcQR/B7K+IAiEw8m72u4eJvBnZ83tTCC3Ww5wCUq19aE/YTbvCEYg9o8K3SgQ7
ZSNFp3+DHQnP4fMa8UHX
=nQve
-----END PGP SIGNATURE-----
Merge tag 'sti-dt-for-v4.9-rc-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into fixes
Pull "STi DT fix" from Patrice Chotard:
The I2C nodes are missing #address-cells and #size-cells.
This is causing warning at device tree compilation when
some I2C device sub-nodes are defined.
* tag 'sti-dt-for-v4.9-rc-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: dts: STiH407-family: fix i2c nodes
A renaming of the GR8 DTSI and DTS to make it explicitly part of the sun5i
family.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYNFYiAAoJEBx+YmzsjxAgvJgP/if3YKhBkqVvQLaK2FPgnbtO
zOJjkfEVDYk1GsJAta+9Oti1LQgaP67zPjawfeUVLDyzHW0AtQIdStPXuu5WxVcG
x24MLrmlyOIVcop8RniC5TZbiZCZ7t3Yw/t7+320yZglsWj0YsAlJOv8MuAAupFm
6lL+JgtCzBo2Isa2r1VCREksCU9AbS+IagzD6W7lVHJUg6+NCAYn5kebEjtpF6I3
cLdqKNz06OcX82CRWn8ANO3XMpyJQT2+zAyb8aBRVh9kfGNkRCVqj//JIAntYh7e
vo3jhaHjVtgaKyWQhQKw5O+EFunFhTICKhEdo7knyzYJCk7aztFa8n64fDDtQwP/
DXJFOPjzRWVlUGKvvSxm8oVkPVjD9ZFPxXydHWrcHkCqQWU8nvhq0DJ/wdY1IcCh
q+Cl38k5+8EM1YgiUmCrAe1jV81DKe/LDvAO3cCdzQf4d4AmZuMCf8LB19VDWABm
5Xg/S5oOEwfvYjKjtMkBhp6G11iDy82XuABMmmCV3GkAS9FiBRwQUbDxWuySt3O2
mU+pR0LnlsowtfOzbhLxPNlHa3YZ/WIEFUJqTgTRV9RXXwZXDldMvOiG1UNI5+qb
xO6X1YCD+iBJ92ZcttBKB4UK1brOP6jNiTiPPiolplW/c2XzywdgW0UvgrIpm0Jz
mkPifSrbtwTbAKigHez6
=Mw6R
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Pull "Allwinner fixes for 4.9, second iteration" from Maxime Ripard:
A renaming of the GR8 DTSI and DTS to make it explicitly part of the sun5i
family.
* tag 'sunxi-fixes-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: gr8: Rename the DTSI and relevant DTS
This machine is an open hardware router by cz.nic driven by a
Marvell Armada 385.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Tomas Hlavacek <tmshlvck@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch fixes the following DTC warnings with W=1:
Warning (unit_address_vs_reg): Node /regulators/regulator@0 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /regulators/regulator@1 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /regulators/regulator@2 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /regulators/regulator@3 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /regulators/regulator@4 has a unit
name, but no reg property
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Add xo entry to sdhc clock node on all qcom platforms.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the SK-RZG1E board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7745 SoC based SK-RZG1E board.
The board has 1 debug serial port (SCIF2); include support for it,
so that the serial console can work.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the IRQC interrupt controller in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7745 part of the Ether device node.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe [H]SCIF{|A|B} ports in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe SYS-DMAC0/1 in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the SK-RZG1M board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7743 SoC based SK-RZG1M board.
The board has one debug serial port (SCIF0); include support for it, so
that the serial console can work.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the IRQC interrupt controller in the R8A7743 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7743 part of the Ether device node.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe [H]SCIF{|A|B} ports in the R8A7743 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
