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Usage of DTS macros instead of hard-coded numbers makes code easier
to read. One does not have to remember which value means pull-up/down
or specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier
to read. One does not have to remember which value means pull-up/down
or specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier
to read. One does not have to remember which value means pull-up/down
or specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Replace duplicated macros in each DTSI file with a common macro coming
from header. Include the header in each pinctrl DTSI so further changes
could use it.
Although PIN_FUNC_SPC_2 does not bring much information about the
function itself, it still is more descriptive then hard-coded
number <2>.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl drive strength register on exynos4415 is 2-bit wide for each
pin. The pins for SD2 were configured with value of 4. The driver does
not validate the value so this overflow effectively set a bit 1 in
adjacent pins thus configuring them to drive strength 2x.
The author's intention was probably to set drive strength of 4x.
All other SD pins are configured with drive strength of 4x. Fix these
with same pattern.
Fixes: 9246e7ff24c5 ("ARM: dts: Add dts files for exynos4415 SoC")
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl pull up/down register on exynos4210 is 2-bit wide for each
pin and it accepts only values of 0, 1 and 3. The pins sd4-bus-width8
were configured with value of 4. The driver does not validate the value
so this overflow effectively set a bit 1 in adjacent pins thus
configuring them to pull down.
The author's intention was probably to set drive strength of 4x. All
other bus-widths pins are configured with pull up and drive strength of
4x. Fix this one with same pattern.
Fixes: 87711d8c7c70 ("ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC")
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Replace duplicated macros in each DTSI file with a common macro coming
from header. Include the header in each pinctrl DTSI so further changes
could use it.
Although PIN_FUNC_SPC_2 does not bring much information about the
function itself, it still is more descriptive then hard-coded
number <2>.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
It is necessary to properly configure these clocks in order
to address 720p and 1080p HDMI resolution.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
It is necessary to properly configure these clocks in order
to address 720p and 1080p HDMI resolution.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch enables the synchronous clock mode for video clocks
on STiH418 board.
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch enables the synchronous clock mode for video clocks
on STiH410 board.
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch enables the synchronous clock mode for video clocks
on STiH407 board.
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH418
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH410
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH407
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Commit d20f997b4d1f ("ARM: dts: am57xx-beagle-x15: Remove pinmux
configurations for erratum i869") fat fingered a change in which
basically replaced mmc2_pinctrl_default with mmc1_pinctrl_default. And
kernel dutifully reports conflict of usage.
[...]
pinctrl-single 4a003400.pinmux: pin 4a00376c.0 already requested by
4809c000.mmc; cannot claim for 480b4000.mmc
pinctrl-single 4a003400.pinmux: pin-219 (480b4000.mmc) status -22
pinctrl-single 4a003400.pinmux: could not request pin 219 (4a00376c.0)
from group mmc1_pins_default on device pinctrl-single
omap_hsmmc 480b4000.mmc: Error applying setting, reverse things back
omap_hsmmc 480b4000.mmc: could not initialize pin control state
[...]
But, thanks to the fact that we were in fact setting all the muxes in
U-Boot, all the MMC devices were still properly detected.
Fix the typo.
Fixes: d20f997b4d1f ("ARM: dts: am57xx-beagle-x15: Remove pinmux
configurations for erratum i869")
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: removed timestamps and wrapped description]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds DT support for the NAND connected to the SoC AEMIF.
Passed torture hashing a 40MB file on top of UBIFS using subpages.
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
[khilman: add back default partitions from an earlier patch]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
- Support for new board OMAP-L138 LCDK
- Add AEMIF node on DA850 EVM and use it for NAND
- Audio support for LCDK
- Cleanups for PWM and UART
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Merge tag 'davinci-for-v4.9/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "DaVinci DA850 device-tree enhancements include" from Sekhar Nori:
- Support for new board OMAP-L138 LCDK
- Add AEMIF node on DA850 EVM and use it for NAND
- Audio support for LCDK
- Cleanups for PWM and UART
* tag 'davinci-for-v4.9/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-lcdk: Audio support via simple-card
ARM: dts: da850,da850-evm: Add an aemif node and use it for the NAND
ARM: dts: da850: Add basic DTS for the LCDK
ARM: dts: da850: Add missing pin muxing for the UARTs
ARM: dts: da850: Add new ECAP and EPWM bindings
This reverts commit f80bc97fd0a9711ef11bdb3e63c2c01115a82c47.
The original commit updated the cpufreq operating points tables for
dra7xx but was merged before the driver making use of the node was
merged, which breaks the existing cpufreq implementation on the system,
so revert the patch until the ti-cpufreq driver is merged.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This reverts commit 4317be1162108bcdf50dc53dfb48eac94dcff25c.
The original commit updated the cpufreq operating points tables for
am33xx but was merged before the driver making use of the node was
merged, which breaks the existing cpufreq implementation on the system,
so revert the patch until the ti-cpufreq driver is merged.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This reverts commit c36e6ec904876de1935b1d74d2d711e6f5ceb572.
The original commit updated the cpufreq operating points tables for
am335x-boneblack but was merged before the driver making use of the node
was merged, which breaks the existing cpufreq implementation on the
system, so revert the patch until the ti-cpufreq driver is merged.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
please pull the following:
- Jon adds support for the Ethernet MAC DT nodes (AMAC) and provides the
following updates for Broadcom references boards:
* New Northstar Plus reference boards added: BCM958525er, BCM958522er,
BCM988312hr, BCM958623hr and BCM958622hr
* Add SATA nodes to the BCM958625hr and XMC boards
* Add I2C nodes to the XMC board
* Fixes the amount of RAM on BCM958625HR, BCM958625K and BCM958525XMC boards
* Add the GPIO reboot method for BCM958625hr and XMC boards
- Dhanajay adds PWM nodes for the Northstar Plus SoCs
- Rafal adds the USB 2.0 PHY to the BCM5301x Device Tree file include
- Stefan adds a missing USB clock to the BCM283x DT files, adds a DTSI file for
the USB host mode on BCM283x and finally documents and adds support for the
Raspberry Pi Zero
- Florian adds support for the Northstar Plus Switch Register Access block which
enables the integrated switch on these SoCs and enables the switch ports on the
BCM958625HR reference board
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Merge tag 'arm-soc/for-4.9/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM-based Device Tree changes for v4.9,
please pull the following:
- Jon adds support for the Ethernet MAC DT nodes (AMAC) and provides the
following updates for Broadcom references boards:
* New Northstar Plus reference boards added: BCM958525er, BCM958522er,
BCM988312hr, BCM958623hr and BCM958622hr
* Add SATA nodes to the BCM958625hr and XMC boards
* Add I2C nodes to the XMC board
* Fixes the amount of RAM on BCM958625HR, BCM958625K and BCM958525XMC boards
* Add the GPIO reboot method for BCM958625hr and XMC boards
- Dhanajay adds PWM nodes for the Northstar Plus SoCs
- Rafal adds the USB 2.0 PHY to the BCM5301x Device Tree file include
- Stefan adds a missing USB clock to the BCM283x DT files, adds a DTSI file for
the USB host mode on BCM283x and finally documents and adds support for the
Raspberry Pi Zero
- Florian adds support for the Northstar Plus Switch Register Access block which
enables the integrated switch on these SoCs and enables the switch ports on the
BCM958625HR reference board
* tag 'arm-soc/for-4.9/devicetree' of http://github.com/Broadcom/stblinux: (22 commits)
ARM: dts: bcm2835: Add Raspberry Pi Zero
DT: bindings: bcm: Add Raspberry Pi Zero
ARM: dts: bcm283x: Add dtsi for USB host mode
ARM: dts: bcm283x: Add missing USB clock
ARM: dts: NSP: Add new DT file for bcm958622hr
ARM: dts: NSP: Add new DT file for bcm958623hr
ARM: dts: NSP: Add new DT file for bcm988312hr
ARM: dts: NSP: Add new DT file for bcm958522er
ARM: dts: NSP: Add new DT file for bcm958525er
ARM: dts: NSP: Add GPIO reboot method to bcm958625xmc DTS file
ARM: dts: NSP: Add GPIO reboot method to bcm958625hr DTS file
ARM: dts: NSP: Specify RAM amount for BCM958525XMC board
ARM: dts: NSP: Specify RAM amount for BCM958625K board
ARM: dts: NSP: Enable SATA and add i2c devices on XMC
ARM: dts: NSP: Enable SATA on bcm958625hr
ARM: dts: NSP: Correct RAM amount for BCM958625HR board
ARM: dts: NSP: Add PWM Support to DT
ARM: BCM5301X: Specify PHY of USB 2.0 in DT
ARM: dts: NSP: Add BCM958625HR switch ports
ARM: dts: NSP: Add Switch Register Access Block node
...
This helps to get 100% intensity closer to "always on".
It compensates for an effect of dmtimer which at 100% still emits short
"off" impulses and the startup-time of the DC/DC converter makes
backlight intensity not reach full scale. The lower the PWM frequency
is, the smaller is this effect.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
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Merge tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/late
Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij:
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
* tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: read counter using syscon/regmap
ARM: integrator: cut down on static maps
ARM: integrator: delete some auxdata
ARM: integrator: move CP CLCD display to DTS
ARM: dts: add the core module clocks to Integrator/CP
ARM: dts: Add the core module clocks to Integrator/AP
ARM: dts: add the Integrator/AP baseboard clocks
ARM: dts: set the 24MHz xtal as parent of the UART clock
The default PHY configuration disables most of the LEDs. The following
configures the ethernet activity LEDs as Netgear intended.
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This is a router based on the mv88f5181 chipset.
http://www.netgear.com/support/product/WNR854T.aspxhttp://wiki.openwrt.org/toh/netgear/wnr854t
[gregory.clement@free-electrons.com:
- extract dt part from "arm: orion5x: Add DT-based support for Netgear
WNR854T"
- squashed "arm: orion5x: Alias uart0 to serial0 for all orion5x" into
this commit and move serial0 alias from dtsi to dts]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Common definitions for the SoC for board definitions to use.
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
orion-wdt refuses to start without these properties defined, so lift
definitions out of kirkwood/dove.dtsi
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch enables the uniperif players 2 & 3 for b2120 boards
and also adds the "simple-audio-card" device node to interconnect
the SoC sound device and the codec.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the DT node for the uniperif reader
IP block found on STiH407 family silicon.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the DT nodes for the uniperif player
IP blocks found on STiH407 family silicon.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the dt node for the internal audio
codec IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the pinctrl config for the spidf out
pins used by the sasg codec IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
This patch adds the pinctrl config for the i2s_in pins
used by the uniperif reader IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
This patch adds the pinctrl config for the i2s_out pins
used by the uniperif player IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
These nodes are required to get the fdma driver working
on STiH407 based silicon.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Some omap5 variants have more than 2GB of memory available as
optional models. Let's update the dts files to use two address
cells similar to what dra7 is using with commit dae320ec3173
("ARM: dts: DRA7: change address-cells and size-cells").
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Latest update to the BeagleBoard-X15 platform (revision B1)[1] updates
for allowing UHS SD cards to function with the split of supply to SD
card from a dedicated LDO.
As a result of this, AM57xx BeagleBoard-X15 now uses gpio2_30 instead
of gpio6_28 for HDMI because HDMI_LS_OE should now be switched from
GPIO6_28(Y9) to GPIO2_30 (AG8) to avoid a 1.8V GPIO toggling a 3.3V
SoC input when the SD card is in UHS 1.8V mode.
NOTE: For UHS mode to function, we need full fledged IODelay support
in kernel to be functional. IODelay support is yet to be added.
Further, It does not make much sense to spin off a new board
compatible flag since there is no real functional benefit for the
same.
Note: Even though production version is supposed to be B1, there is
over ~200 boards of previous version (A2)[2] out there which continue
to get supported with the existing dts file (to maintain compatibility
with existing bootloaders for A2) and the production board is now
supported as revb1.
[1] https://github.com/beagleboard/beagleboard-x15/blob/master/BEAGLEBOARD_X15_REV_B1.pdf
[2] http://marc.info/?l=linux-arm-kernel&m=147273929820708&w=2
Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
