IF YOU WOULD LIKE TO GET AN ACCOUNT, please write an
email to Administrator. User accounts are meant only to access repo
and report issues and/or generate pull requests.
This is a purpose-specific Git hosting for
BaseALT
projects. Thank you for your understanding!
Только зарегистрированные пользователи имеют доступ к сервису!
Для получения аккаунта, обратитесь к администратору.
Initialize the PMIC voltage regulators and provide the supply map for
PCI-e clock supply. The rest of the supplies should be added together
with the drivers that use them.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
CC: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Enable TPS6586x PMIC driver
* Enable RealTek 8169 used on TrimSlice
* Allow booting with root on NFS
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Olof Johansson <olof@lixom.net>
On Harmony board PCI-e subsystem can be enabled only after certain
voltage regulators are on. One of the regulators is an internal
regulator on the PMIC and another one is controlled by a PMIC GPIO.
Addition of the voltage control to the Harmony PCI-e initialization
allows booting of kernel with CONFIG_TEGRA_PCI even if the PMIC driver
is not loaded. In this case the PCI-e initialization will fail
gracefully intead of hanging the system.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Olof Johansson <olof@lixom.net>
TrimSlice has MicroSD and standard MMC/SD slots.
Register sdhci devices and enable GPIOs for MMC/SD slot.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Enable new platforms and tegra drivers in tegra_defconfig. Also enable
some of the common devices several platforms, and GUID partition tables
to make it possible to boot a tegra_defconfig kernel with a ChromiumOS
filesystem.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
This patch adds the config infrastructure, the pinmux and basic
board setup code for PAZ00 (name of board inside the AC100/AZ).
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is the final patch to enable audio support on Harmony. It additionally
relies on the latest ASoC branch being merged in, which provides the header
defining the gpio_base field in the WM8903 platform data.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch is the portion of the audio-related setup that relies additionally
on the latest Tegra I2C driver being merged.
* Define platform data for WM8903 audio codec
* Register WM8903 as an I2C device
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Register the base i2c busses on harmony. Devices coming at a later date,
but this allows for hand-probing of some of them at least.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
Register the base i2c devices on seaboard. A few more are pending,
but it's a start.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
This change includes everything required to enable audio on Harmony, except
those parts which rely on code not currently in Tegra's for-next branch, i.e.
except those parts which rely on merges of the Tegra I2C driver or latest
ASoC subsystem.
* Define GPIO names for audio-related GPIOs
* Set up platform data and platform device for ASoC machine driver
* Register audio-related platform devices
* Initialize audio-related clocks
* Correctly configure pinmux and GPIO enables for audio-related pins
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This ensures they're kept in sync between platform_data definitions and
the GPIO table initialization.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Currently tegra_pcie_init is effectively called as subsys_initcall. With
multiplatform kernel this may cause hangs on boards that don't intend to
support Tegra2 PCI-e. Ensure that TrimSlice board code initializes PCI-e
only when actually running on the TrimSlice.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Colin Cross <ccross@android.com>
Move tegra_pcie_power_off before tegra_pcie_power_on for clean addition
of PCIE power gating
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Colin Cross <ccross@android.com>
tegra_dma_init currently simply bails out early if any initialization fails.
This skips various data-structure initialization. In turn, this means that
tegra_dma_allocate_channel can still hand out channels. In this case, when
tegra_dma_free_channel is called, which calls tegra_dma_cancel, the walking
on ch->list will OOPS since the list's next/prev pointers may still be
NULL.
To solve this, add an explicit "initialized" flag, only set this once _init
has fully completed successfully, and have _allocate_channel refuse to hand
out channels if this is not set.
While at it, simplify _init:
* Remove redundant memsets
* Use bitmap_fill to mark all channels as in-use up-front, and remove
some now-redundant bitmap initialization loops.
* Only mark a channel as free once all channel-related initialization has
completed.
Finally, the successful exit path from _init always has ret==0, so just
hard-code that return. The error path still returns ret.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
The ASoC machine driver was written assuming my previous patch to add
complete support for these clocks, which named them cdev1/2. Rename
the clocks to match that, to avoid churn in the ASoC driver.
This rename also makes the clocks more consistent with other Tegra
clocks irrespective of any of that.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
The driver is tegra-i2s not just i2s. Rename the clocks to match, so that
clk_get_sys can look up by driver name.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
The following commit makes the Tegra APB DMA engine fail to initialize
correctly: 0cf6230af909a86f81907455eca2a5c9b8f68fe6
ARM: tegra: Move tegra_common_init to tegra_init_early
The reason is that tegra_init_early_ calls tegra_dma_init which calls
request_threaded_irq, which fails since the IRQ hasn't yet been marked
valid; that only happens in tegra_init_irq, which gets called after
tegra_init_early.
This used to work OK, since tegra_init_early was tegra_common_init, which
got called after tegra_init_irq, basically from the beginning of
tegra_harmony_init.
Solve this by converting tegra_dma_init to a postcore_initcall. This makes
it execute late enough that IRQs are marked valid, and avoids having to
add it back to every machine's init function.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
This adds board support for the Seaboard eval platform and some of the
derivatives that are very similar. Since they only differ in some very
minor ways, most of the code is shared.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Colin Cross <ccross@android.com>
Turns out MMC2 (the bayonet 4-lane port) wasn't enabled in the
original pinmux. Fix that.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Colin Cross <ccross@android.com>
Add the 3 sdhci devices that are available on Harmony as
platform devices. Two go to slots (one 4-lane, one 8-lane),
and one goes to onboard wifi.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Colin Cross <ccross@android.com>
Add a common location to register resources for used on-chip devices
that are commonly configured on boards. Devices will be added to this file
as more drivers are added that can make use of them.
This is based on work contributed by several people, most of it from
Colin Cross and Erik Gilling.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Colin Cross <ccross@android.com>
Move harmony over to use the new gpio config table instead of having
separate settings in various parts of the code.
(The tegra sdhci driver should have the tegra_gpio_* ops removed, but
that will be done separately from this change.)
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Erik Gilling <konkers@android.com>
To give one place to setup the pins that are used as GPIOs instead
of as their pinmuxed functions. Specifying enabled as false explicitly
disables the gpio mode of that pin (if left on by firmware).
This should remove the need for calling these from specific drivers and
thus reduce tegra-specific code from them.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Erik Gilling <konkers@android.com>
The option isn't terribly useful on other ARM platforms.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
Enable the cpu, emc (memory controller) and csite (debug and
trace controller) clocks during init to prevent them from
being disabled by the bootloader clock disabling code.
Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Olof Johansson <olof@lixom.net>
Enable the timer and rtc clocks to prevent them being
turned off by the bootloader clock disabling code.
Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Olof Johansson <olof@lixom.net>
Move tegra_common_init to tegra_init_early, and set it
as the init_early entry in the machine struct.
Initializes the clocks earlier so that timers can enable
their clocks.
Also reorders the members in the Harmony and Trimslice
boards' machine structs to match the order they are
called in.
Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Olof Johansson <olof@lixom.net>
Peripheral clocks that have no clock enable bit in the
enable registers have their clk_num set to 0. Bit 0
in the clock enable registers is the CPU clock.
Prevent disables on these peripheral clocks from
accidentally disabling the CPU clock.
Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Olof Johansson <olof@lixom.net>
Call the clock's round_rate op, if it exists, before calling
the set_rate op. This will help later when dvfs is added,
dvfs needs to know what the final rate will be before the
frequency changes.
Also requires fixes to the round rate functions to ensure
calling round rate and then set rate will not cause the
frequency to be rounded down twice. When picking clock
divider values, the clock framework picks the closest
frequency that is lower than the requested frequency. If
the new frequency calculated from the divider value is
rounded down, and then passed to set_rate, it will get
rounded down again, possibly resulting in a frequency two
steps lower than the original requested frequency.
Fix the problem by rounding up when calculating the frequency
coming out of a clock divider, so if that frequency is
requested again, the same divider value will be picked.
Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Olof Johansson <olof@lixom.net>
Some peripheral clocks share enable bits. Refcount the enables so
that calling clk_disable on one clock will not turn off another
clock.
Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Olof Johansson <olof@lixom.net>
Marcin Slusarz says:
> In arch/arm/kernel/kprobes-decode.c there's a function
> arm_kprobe_decode_insn which does:
>
> } else if ((insn & 0x0e000000) == 0x0c400000) {
> ...
>
> This is always false, so code below is dead.
> I found this bug by coccinelle (http://coccinelle.lip6.fr/).
Reported-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There's no need to noMMU to put tlb_flush() in asm/tlbflush.h - it's
part of the tlb shootdown interface. Move it to asm/tlb.h instead, as
per x86.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We need to delay freeing any mapped page on SMP and ARMv7 systems to
ensure that the data is not accessed by other CPUs, or is used for
speculative prefetch with ARMv7. This includes not only mapped pages
but also pages used for the page tables themselves.
This avoids races with the MMU/other CPUs accessing pages after they've
been freed but before we've invalidated the TLB.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When SMP_ON_UP is used and the spinlocks are inlined, we end up with
inline spinlocks in the exit code, with references from the SMP
alternatives section to the exit sections. This causes link time
errors. Avoid this by placing the exit sections in the init-discarded
region.
Cc: <stable@kernel.org>
Tested-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Ensure a predictable endian state when entering signal handlers. This
avoids programs which use SETEND to momentarily switch their endian
state from having their signal handlers entered with an unpredictable
endian state.
Cc: <stable@kernel.org>
Acked-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 18991197b4b588255ccabf472ebc84db7b66a19c added --build-id
linker option when toolchain supports it. ARM one does, but for some
reason places the section at 0 when linker script doesn't mention it
explicitly.
The 1e621a8e3752367d4aae78a8ab00a18fb2793f34 worked around the problem
removing this section from binary image with explicit objcopy options,
but it still exists in vmlinux, confusing tools like debuggers and perf.
This problem was discussed here:
http://lists.infradead.org/pipermail/linux-arm-kernel/2010-May/015994.htmlhttp://lists.infradead.org/pipermail/linux-arm-kernel/2010-May/015994.html
but the proposed changes to the linker script were substantial.
This patch simply places NOTES (36 bytes long, at least when compiled
with CodeSourcery toolchain) between data and bss, which seem to be
the right place (and suggested by the sample linker script in
include/asm-generic/vmlinux.lds.h).
It is enough to place it correctly in vmlinux (so debuggers are happy):
Section Headers:
[11] .data PROGBITS c07ce000 7ce000 020fc0 00 WA 0 0 32
[12] .notes NOTE c07eefc0 7eefc0 000024 00 AX 0 0 4
[13] .bss NOBITS c07ef000 7eefe4 01e628 00 WA 0 0 32
Program Headers:
LOAD 0x008000 0xc0008000 0xc0008000 0x7e6fe4 0x805628 RWE 0x8000
NOTE 0x7eefc0 0xc07eefc0 0xc07eefc0 0x00024 0x00024 R E 0x4
Section to Segment mapping:
Segment Sections...
00 <...> .data .notes .bss
01 .notes
and to get it exposed as /sys/kernel/notes used by perf tools.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
SPEAR320_SOC_CONFIG_BASE was wrong, causing the wrong registers to be
accessed.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In sysctl_soft_reset(), switch to slow mode before resetting the system
via the system controller. This is required.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
readl() and writel() calls the outer cache maintainance operations
which are not available during Linux uncompression. This patch replaces
readl() and writel() with readl_relaxed() and writel_relaxed() to avoid
the link time errors.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch fixes following warning:
arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int'
by appending UL to VMALLOC_END's Number.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Correct max rates for pclk and sclk (Originally fixed by
Dima Zavin <dima@android.com>)
Correct max rate for plla (Originally fixed by
Stephen Warren <swarren@nvidia.com>)
Remove unnecessary no-op set_rate on audio clocks
Add clock lookup entries for grhost, bsea, and vde clocks
Update clock clookup entries for vcp, bsea, and vde clocks
Add shared clock entries for sclk and emc
Add a virtual cop clock to provide a reset op (Originally fixed by
Dima Zavin <dima@android.com>)
Pass set_rate on super clocks through to parent
Fix pllx frequency table entry for 608 MHz
Remove incorrect plla frequency table entries
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>