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7 Commits

Author SHA1 Message Date
Matt Kline
e39381770e can: m_can: Disable IRQs on FIFO bus errors 
If FIFO reads or writes fail due to the underlying regmap (e.g., SPI)
I/O, propagate that up to the m_can driver, log an error, and disable
interrupts, similar to the mcp251xfd driver.

While reworking the FIFO functions to add this error handling,
add support for bulk reads and writes of multiple registers.

Link: https://lore.kernel.org/r/20210817050853.14875-2-matt@bitbashing.io
Signed-off-by: Matt Kline <matt@bitbashing.io>
[mkl: re-wrap long lines, remove WARN_ON, convert to netdev block comments]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
 2021-08-19 15:07:04 +02:00
Marc Kleine-Budde
fede1ae2d3 can: tcan4x5x: cdev_to_priv(): remove stray empty line 
This patch removes a stray empty line in the cdev_to_priv() function.

Fixes: ac33ffd3e2 ("can: m_can: let m_can_class_allocate_dev() allocate driver specific private data")
Link: https://lore.kernel.org/r/20210819111703.599686-1-mkl@pengutronix.de
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
 2021-08-19 15:07:04 +02:00
Torin Cooper-Bennun
2712625200 can: tcan4x5x: tcan4x5x_init(): fix initialization - clear MRAM before entering Normal Mode 
This patch prevents a potentially destructive race condition. The
device is fully operational on the bus after entering Normal Mode, so
zeroing the MRAM after entering this mode may lead to loss of
information, e.g. new received messages.

This patch fixes the problem by first initializing the MRAM, then
bringing the device into Normale Mode.

Fixes: 5443c226ba ("can: tcan4x5x: Add tcan4x5x driver to the kernel")
Link: https://lore.kernel.org/r/20210226163440.313628-1-torin@maxiluxsystems.com
Suggested-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Torin Cooper-Bennun <torin@maxiluxsystems.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
 2021-03-01 11:45:15 +01:00
Jakub Kicinski
833d22f2f9 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 
Trivial conflict in CAN on file rename.

Conflicts:
	drivers/net/can/m_can/tcan4x5x-core.c

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 2021-01-08 13:28:00 -08:00
Marc Kleine-Budde
1c5d0fc48b can: tcan4x5x: rework SPI access 
This patch reworks the SPI access and fixes several probems:
- tcan4x5x_regmap_gather_write(), tcan4x5x_regmap_read():
  Do not place variable "addr" on stack and use it as buffer for SPI
  transfer. Buffers for SPI transfers must be allocated from DMA save
  memory.
- tcan4x5x_regmap_gather_write(), tcan4x5x_regmap_read():
  Halfe number of SPI transfers by using a single buffer + memcpy().
  This improves the performance, especially on SPI controllers, which
  use interrupt based transfers.
- Use "8" bits per word, not "32". This makes it possible to use this
  driver on SoCs like the Raspberry Pi, which SPI host controller
  drivers only support 8 bits per word.

Note: this breaks half duplex only controllers. Support for them will be
re-added in the next patch.

Reviewed-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Sean Nyekjaer <sean@geanix.com>
Link: https://lore.kernel.org/r/20201215231746.1132907-16-mkl@pengutronix.de
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
 2021-01-06 15:15:41 +01:00
Marc Kleine-Budde
67def4ef8b can: tcan4x5x: move regmap code into seperate file 
This patch moves the regmap code into a seperate file.

Reviewed-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Sean Nyekjaer <sean@geanix.com>
Link: https://lore.kernel.org/r/20201215231746.1132907-5-mkl@pengutronix.de
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
 2021-01-06 15:15:37 +01:00
Marc Kleine-Budde
7813887ea9 can: tcan4x5x: rename tcan4x5x.c -> tcan4x5x-core.c 
This is a preparation patch to move the regmap related code into a seperate
file. This patch removes the tcan4x5x.c to tcan4x5x-core.c.

Reviewed-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Sean Nyekjaer <sean@geanix.com>
Link: https://lore.kernel.org/r/20201215231746.1132907-4-mkl@pengutronix.de
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
 2021-01-06 15:15:37 +01:00