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All 3 properties are required by sram.yaml. Fixes the dtbs_check warning:
sram@900000: '#address-cells' is a required property
sram@900000: '#size-cells' is a required property
sram@900000: 'ranges' is a required property
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
All 3 properties are required by sram.yaml. Fixes the dtbs_check warning:
sram@900000: '#address-cells' is a required property
sram@900000: '#size-cells' is a required property
sram@900000: 'ranges' is a required property
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The clock name should be per clock, not ipg clock.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DDR pinmux which may be used in U-Boot after synchronising all
them device trees (and includes) from Linux.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move gpio suspend/resume execution local to driver and let it execute as
close as possible to the moment the machine specific PM code is executed
(by setting it to .noirq member of dev_pm_ops). With this the
at91_pinctrl_gpio_suspend()/at91_pinctrl_gpio_resume() calls were removed
from arch/arm/mach-at91/pm.c and also a header has been removed.
The patch has been checked on sama5d3_xplained, sam9x60ek,
sama5d2_xplained, sama7g5ek boards.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220831135636.3176406-3-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
GPIOs are configured by pinmux driver, so add corresponding references.
Fixes: 0d3d96ab0059 ("ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
First PCIe controller on Dove SoC reports error interrupt via IRQ 15
and second PCIe controller via IRQ 17.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
First PCIe controller on Kirkwood SoC reports error interrupt via IRQ 44
and second PCIe controller via IRQ 45.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Both the Linkstation LS-CHLv2 and the LS-XHL have only one ethernet
port. This has always been wrong, i.e. the board code used to set up
both ports, but the driver will play nice and return -ENODEV if the
assiciated PHY is not found. Nevertheless, it is wrong. Remove it.
Fixes: 876e23333511 ("ARM: kirkwood: add gigabit ethernet and mvmdio device tree nodes")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Commit 327e15428977 ("ARM: dts: kirkwood: consolidate common pinctrl
settings") unknowingly broke the serial output on this board. Before
this commit, the pinmux was still configured by the bootloader and the
kernel didn't reconfigured it again. This was an oversight by the
initial board support where the pinmux for the serial line was never
configured by the kernel. But with this commit, the serial line will be
reconfigured to the wrong pins. This is especially confusing, because
the output still works, but the input doesn't. Presumingly, the input is
reconfigured to MPP10, but the output is connected to both MPP11 and
MPP5.
Override the pinmux in the board device tree.
Fixes: 327e15428977 ("ARM: dts: kirkwood: consolidate common pinctrl settings")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The node names should be generic and DT schema expects certain pattern.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.
Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
- Refresh shmobile_defconfig for v6.0-rc1,
- Enable additional support for Renesas platforms in the arm64
defconfig.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYxHFsQAKCRCKwlD9ZEnx
cFnnAP0WWCnx50+oodGIJfcpb/QDcmXXVPa4EVrf92TvgqWrCQD+Nel3En9EYaWr
wt+GR2aZpa+E9Kfa9OovTzUWzvHiXw8=
=fwbH
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMR1ZgACgkQmmx57+YA
GNkLmg//bCTFJHb+VrnSkg3YA12xEubZ2cVBc7hlzCpa+LkqcWXHdhqoMrsCBqr7
kNRNy5IZy8juIVxi4aIdgHEeeq1HPB8H4TBLzTu19Lq2ivd+ILSRV7KOnq7NgpcI
LaQ3T7TCXpir+xdLCJ4hCudJEVpDvsaCVAWrrcB3BJCtMiOBOusuQaYIyGhC+DeN
EQ8t0V/18bmVdkXqRssyeLk4C69DPAn+PjCFqRY/KWpMNpSxVfMhUyefyjsdGZmh
EI5XYvuSxdPUnpfW5o5kcUjsiYG5RKPxdykM9gc/SuSHGR+E0hSw49EvTDfTE1MG
m50DrdjkXDitO+y6lk5sXHbHI4FW6cyze0VGVsJzbiXyE6XlQA81HFhdrn+gMRyA
uFe8g8ELcljM+buE+tTnBfWtZqhwW0BBGv4HGA0I4rWzCOCJCWDFzba5GVe5CnQQ
hBe7hjHEg5tOKKpRAUe/DoMY584uhEXWcgv5V+WiBDGD4JZFgMN/KcnNF/ZOWKNx
FmhA+Al6ZXM4eWhTffaZlIQvSJVfZyHlNntHwSGCWW/Zzy+YRBjyApwIC20z1gtf
794versp+GsjRFa/tpxm0HX0tD0QErsbiq6hd92xXLhW4mfpHuPcHve5F5xTAyBK
qcT5m0YHO9+kaw/iJ1lxYi0oDwXqenXvO76JFCsKiPDe4KSbBnw=
=jebc
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-defconfig-for-v6.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig
Renesas ARM defconfig updates for v6.1
- Refresh shmobile_defconfig for v6.0-rc1,
- Enable additional support for Renesas platforms in the arm64
defconfig.
* tag 'renesas-arm-defconfig-for-v6.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: defconfig: Enable additional support for Renesas platforms
ARM: shmobile: defconfig: Refresh for v6.0-rc1
Link: https://lore.kernel.org/r/cover.1662111126.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It contains:
- one new LAN966X based board, namely lan966x-pcb8290
- gpio leds support for lan966x-pcb8291 and lan966x-pcb8309
- a cleanup for sam9x60ek to avoid DT compilation warning due to regulators
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCYxG9uwAKCRCejrg/N2X7
/YLgAP9MoJHWe34fc0ck5BI+x1Pkcqf1RM/Fya1ks67o1CEa+gEAhQw6Sn/bugMf
+XASUkDvXEAr9v7kaHk1Mgpe1kpfhw0=
=Vkvr
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMRzXYACgkQmmx57+YA
GNmupBAAgTT4Rfs9a6c6vmv73dbnopa+5x6URkkur4r1Bji/YAT9PZF0VKVcZsIQ
8SI5a8CAYY1N8nGx33jTKn9w7F3To8iP4dPitjk9TLgeyLDbyziBGaeGPgzilsYk
lWIwsa7K+USW20xq4UDxYn2f5ok2ZNn8IeY0qkWMBs1Sv3evzgwfGM5td4GzDWc0
lP0Chme93p9aZtfknyCkzQ95zwtQbssObTT2/4xE8ZLNjxW7nBQA5txizYfFE6/v
WAUFGuNMAr8cyGCtwRxT0mY5ESmxxxsmefWBcsUvQ82CVcMCzMNtfWMXbVC2lSpI
40xBDd53x5wTKuuD9RYuYQbQNT8oxStzS+MODFwHsAnnw0bAr9Wm3PS6gem1Jepe
SMbqyi7nvp90gbyEABS7r6u0rYY4ClcvneX49ly7gZYvlMOg69PWCNOJaA8kq8DJ
AlRtDoNWNJ1jzrD0bxCeD0YdELQxM2NAAVZpDQdTuU+8n3jEJNEB2HAQFUbNUJ18
2ZXymspez7xbQt0HquhKWZ1hC5fGbREwbwEW3ftD7Jb4ADAIUQ9/c7cUz2C+BqGD
wVTTh3ojAPk5XuZ+qm4Wfi6PuQqlk/xTufTO9nWIbglXEAkLXqTzY2xdkvVsI6EQ
EAfJE3fG1MVRYzq6ZOP0NHk0QzSLQ+SKjS9iZUQFbxKWpOzrLWc=
=lGiW
-----END PGP SIGNATURE-----
Merge tag 'at91-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for v6.1
It contains:
- one new LAN966X based board, namely lan966x-pcb8290
- gpio leds support for lan966x-pcb8291 and lan966x-pcb8309
- a cleanup for sam9x60ek to avoid DT compilation warning due to regulators
* tag 'at91-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: lan966x: add led configuration
ARM: dts: at91: sam9x60ek: remove simple-bus for regulators
ARM: dts: lan966x: add support for pcb8290
Link: https://lore.kernel.org/r/20220902085845.4193579-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It contains:
- fixes for self-refresh on SAMA7G5 while in AT91 power management modes:
one disabling a DDR PHY controller DLL which has been proved to be buggy
and can introduce glitches that can cause unexpected behavior; one
fixing the DDR PHY recalibration which cannot work for all possible
cases (due to hardware bug) while using backup and self-refresh AT91
power management mode;
- one defconfig fix to remove CONFIG_MICROCHIP_PIT64B from all AT91
defconfigs;
- multiple device tree fixes for regulators to avoid having some of them
enabled all the time and to describe min and max output ranges
according to board capabilities.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCYxG/lwAKCRCejrg/N2X7
/bQpAQCEfcz8ockiRHT3dkJcoI0yHbEiZIHSbPjwFLlu54IVBgEAjZPhSIbtYTjM
7MDRFXYF6BeaNga99JXjItz1IlwkvA8=
=5Kwl
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMRzOAACgkQmmx57+YA
GNkVsxAArs1HJ4R8p2H54szlzrLGkgPrXuAIZNnV13jiRi5FL6p5doFLb2Ldhrro
OoSP/9Z8GaEu6B3YP+5QP5gAXtKXntLdsFZA3XididLsZCSJtazuSv4uUUxPg86K
DagY+Yhlb05vZH4JMjC7MJztbaq2rbP/tzYPvdR8I6aN8OIORchzu/36kwp8TVGk
2FiYJSxk3ccYcVTqZjORjQadUn2Hx+rCKgC8lQLZTSnQ+/ZBmPC6vwiHCDVrgVBx
mJeUBnbBFpQMyO3hzOKvLu2hHcHfJrBb7DnpVEUsenfl9O4XPu1LVmuCN7Osh9jT
x+k7PNx1yrTzZpnICz8z92U13zgkaxqkaYAqzQZqEFae8Z2/SWitIls9pM5ZZTbX
nZfWWP1qQ8cN27/fTNz6Igg1Lk3NS0zRsw2kSuRBCUejiQQscByOpEkxveJDb64u
jEVCM9HqYZccKq+j77A1WJez5B7twDSAxl6pbtE0gD+++TqfOfCWxLjbVzx4l89X
/Osr2keeB4tLnna2ltqtvlfH5rL0/A9OmkpXhlwW+VML73rP3fB0y1HCoEzmMyYQ
XQVGwS0d8MMfXyXylpQn767Xxc3qhGdhutugHQgagOe8F74FgZOH5AZQTxBf4e8R
g1uotqy/Fwxojtf9aJf4voeD2QuXg25E+qgDoQf6QW3EFCtaBDQ=
=KEYR
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes
AT91 fixes for 6.0
It contains:
- fixes for self-refresh on SAMA7G5 while in AT91 power management modes:
one disabling a DDR PHY controller DLL which has been proved to be buggy
and can introduce glitches that can cause unexpected behavior; one
fixing the DDR PHY recalibration which cannot work for all possible
cases (due to hardware bug) while using backup and self-refresh AT91
power management mode;
- one defconfig fix to remove CONFIG_MICROCHIP_PIT64B from all AT91
defconfigs;
- multiple device tree fixes for regulators to avoid having some of them
enabled all the time and to describe min and max output ranges
according to board capabilities.
* tag 'at91-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama5d2_icp: don't keep vdd_other enabled all the time
ARM: dts: at91: sama5d27_wlsom1: don't keep ldo2 enabled all the time
ARM: dts: at91: sama7g5ek: specify proper regulator output ranges
ARM: dts: at91: sama5d2_icp: specify proper regulator output ranges
ARM: dts: at91: sama5d27_wlsom1: specify proper regulator output ranges
ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh
ARM: at91: pm: fix self-refresh for sama7g5
ARM: configs: at91: remove CONFIG_MICROCHIP_PIT64B
Link: https://lore.kernel.org/r/20220902085744.4193554-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
6.0, please pull the following:
- William fixes a number of the recently submitted DTS files for 63178,
6846, 6878 to have correct PSCI node propertie as well as correct timer
CPU masks
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmMM9OUACgkQh9CWnEQH
BwSzDA//WZyMEI1AGo+Y5pQQXQIR7MvIr50IwGPPUDa3DzTAGF/td3/mLI4g2cnf
vOKAtgUtAHRNhFzOUbw+IMmGeUJ9SOJIyK2c3kjdcb1Fihuz+wJLcz54ljiwzJmt
ekL/HqHA6Q5l4BJHq+4AMPvgiSZBFlD+iNhAUY6OJ/VIXuXbt7PTrQp1KRImvely
JRyGjoagOlSMbS/WNenuFKRPoe3cnrABHjhAm6zOjPYCvyDmN7N6jwimW0UhLVsd
ievzfg+/3Xux4aKZj82Csj5Y+63Tu7vh2MHQgdHq8Vg6rU0Mvs3S+sThdv5L8XOD
6e80jHVIad8KifgEVxNfu4OvRJJxx/g7rwJPFJJ+ugUUgwXyRU7nH2FdCUqFz+q0
UnDNC+KkBKfsypp8s3kzZHktDdvwkNYBqX/CnRNqh2MeRBUiyLTBZdC1NtkUwAzs
eUrEpMBdrcnDAu0JM7pGaLp1/OdrintDzguqcKwjOQ7prpb61/w3W6CyMRVXJKAT
IF6mP0Tiiww/8p/JH/MJWxCMoA9QRBmUt9ARDEd7nYU/5vAkezZKtz+cjn8E5AEs
j/ScT0ZJ4KkjBuyvONKU2gED82Z2GWysEXZjQgFJPI2AnL0FN9VqdFvipoQo86sl
nH2aWKo7nzC8x8LiTIirQCqDvflNWdSYqvsfMvUsHkrWx4lu1CM=
=hjVE
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMRzFoACgkQmmx57+YA
GNkTxhAAqLZDQX+B3AlpOIIDz8vqtjnuvN1Mz9/zif9btUP3gkX8HWNXQUDY+xhg
1QhRKjrRhKj+Xq7OKXXwGIZL+g7iT5wPh9ORzaY8zUQfoGAHI8B2mHsef90PCl5z
Z7g+11twIu21i+t7JiNLxr9stl2qcjXeuHh+TTF3yuGxgkgxx/A81lyxskjfVpSV
r3hjPwwiNK8o8d5iKPZ3yJeoZEkWrVyUNmla1J+yi2xJ2OZnEQfZFxd6Avg+DFsW
J8Zv+fqgkH0+uKE9PUcV8KUBb1ITl7WOANWN3qZ7ARITbZkW3n+pfP2HUCGEmv/o
nTGtf/wn102snk0e+sxLPsBrStH1zlHC1/2Z/kW+VQivSMH3UQNdynvG/KOKuVtA
14fF0V2DuNvcJTHCaomoROJImCaKxI/mQf0uXmqxndk9sgnkLOcrDKwbdY8aQQNu
ciR7LY+rK+5hHEhsgdhZ7mcqkcI8hcLBGclfUOrIIlmZTXSl/rLDirS+7T/5P0AC
N3qQfiiiyK0G7zfHrhiusBg1bpC75k0FR7rZUa2BvvnqFmILMhCfLGtlfIexu1Nx
xjpRkQDLpbPbcZhQDlfJMEFGBVelHun7kl6v5Z30SKXM1ArbcAAOeyGx5XkhdVyN
b0kcJDyWzHluk9SjyZcn8vZs5h/xNuJ/z75ummXiXh2Q6z0PJ24=
=SM9p
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-6.0/devicetree' of https://github.com/Broadcom/stblinux into arm/fixes
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
6.0, please pull the following:
- William fixes a number of the recently submitted DTS files for 63178,
6846, 6878 to have correct PSCI node propertie as well as correct timer
CPU masks
* tag 'arm-soc/for-6.0/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcmbca: bcm6878: cosmetic change
ARM: dts: bcmbca: bcm6878: fix timer node cpu mask flag
ARM: dts: bcmbca: bcm6846: fix interrupt controller node
ARM: dts: bcmbca: bcm6846: clean up psci node
ARM: dts: bcmbca: bcm6846: fix timer node cpu mask flag
ARM: dts: bcmbca: bcm63178: cosmetic change
ARM: dts: bcmbca: bcm63178: fix interrupt controller node
ARM: dts: bcmbca: bcm63178: clean up psci node
ARM: dts: bcmbca: bcm63178: fix timer node cpu mask flag
Link: https://lore.kernel.org/r/20220829225103.753223-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add led configuration for pcb8291 and pcb8309. Both pcbs have 4 leds which
are connected to the sgpio controller.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220902062447.443846-1-horatiu.vultur@microchip.com
The hardware automatically disable the IRQ interrupt before jumping to the
interrupt or exception vector. Therefore, the preempt_disable() operation
in this_cpu_read() after macro expansion is unnecessary. In fact, function
this_cpu_read() may trigger scheduling, see pseudocode below.
Pseudocode of this_cpu_read(xx):
preempt_disable_notrace();
raw_cpu_read(xx);
if (unlikely(__preempt_count_dec_and_test()))
__preempt_schedule_notrace();
Therefore, use raw_cpu_* instead of this_cpu_* to eliminate potential
hazards. At the very least, it reduces a few lines of assembly code.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Those functions are removed since 2006 commit d6551e884cf6
("[ARM] Add thread_notify infrastructure").
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
When building with an arm-*-uclinuxfdpiceabi toolchain, the FDPIC ABI is
enabled by default but should not be used to build the kernel.
Therefore, pass -mno-fdpic if supported by the compiler.
Signed-off-by: Ben Wolsieffer <ben.wolsieffer@hefring.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
VDD_OTHER is not connected to any on board consumer thus it is not
needed to keep it enabled all the time.
Fixes: 68a95ef72cef ("ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-9-claudiu.beznea@microchip.com
ldo2 is not used by any consumer on sama5d27_wlsom1 board, thus
don't keep it enabled all the time.
Fixes: 5d4c3cfb63fe ("ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-8-claudiu.beznea@microchip.com
Min and max output ranges of regulators need to satisfy board
requirements not PMIC requirements. Thus adjust device tree to
cope with this.
Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-7-claudiu.beznea@microchip.com
Min and max output ranges of regulators need to satisfy board
requirements not PMIC requirements. Thus adjust device tree to
cope with this.
Fixes: 68a95ef72cef ("ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-6-claudiu.beznea@microchip.com
Min and max output ranges of regulators need to satisfy board
requirements not PMIC requirements. Thus adjust device tree to
cope with this.
Fixes: 5d4c3cfb63fe ("ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-5-claudiu.beznea@microchip.com
On SAMA7G5, when resuming from backup and self-refresh, the bootloader
performs DDR PHY recalibration by restoring the value of ZQ0SR0 (stored
in RAM by Linux before going to backup and self-refresh). It has been
discovered that the current procedure doesn't work for all possible values
that might go to ZQ0SR0 due to hardware bug. The workaround to this is to
avoid storing some values in ZQ0SR0. Thus Linux will read the ZQ0SR0
register and cache its value in RAM after processing it (using
modified_gray_code array). The bootloader will restore the processed value.
Fixes: d2d4716d8384 ("ARM: at91: pm: save ddr phy calibration data to securam")
Suggested-by: Frederic Schumacher <frederic.schumacher@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-4-claudiu.beznea@microchip.com
It has been discovered that on some parts, from time to time, self-refresh
procedure doesn't work as expected. Debugging and investigating it proved
that disabling AC DLL introduce glitches in RAM controllers which
leads to unexpected behavior. This is confirmed as a hardware bug. DLL
bypass disables 3 DLLs: 2 DX DLLs and AC DLL. Thus, keep only DX DLLs
disabled. This introduce 6mA extra current consumption on VDDCORE when
switching to any ULP mode or standby mode but the self-refresh procedure
still works.
Fixes: f0bbf17958e8 ("ARM: at91: pm: add self-refresh support for sama7g5")
Suggested-by: Frederic Schumacher <frederic.schumacher@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Cristian Birsan <cristian.birsan@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-3-claudiu.beznea@microchip.com
When user undefined instruction debug is enabled pc value is hashed like
kernel pointers for security reason. But the security benefit of this
hash is very limited because the code goes on to call __show_regs() that
prints the plain pointer value. pc is a user pointer anyway, so the
kernel does not leak anything. The only result is confusion about the
difference between the pc value on the first printed line, and the value
that __show_regs() prints.
Always print the plain value of pc.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Some options like CONFIG_DEBUG_UNCOMPRESS and CONFIG_CMDLINE_FORCE are
fundamentally incompatible with portable kernels but are currently allowed
in all configurations. Other options like XIP_KERNEL are essentially
useless after the completion of the multiplatform conversion.
Repurpose the existing CONFIG_ARCH_MULTIPLATFORM option to decide
whether the resulting kernel image is meant to be portable or not,
and using this to guard all of the known incompatible options.
This is similar to how the RISC-V kernel handles the CONFIG_NONPORTABLE
option (with the opposite polarity).
A few references to CONFIG_ARCH_MULTIPLATFORM were left behind by
earlier clanups and have to be removed now up.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
CONFIG_XIP_KERNEL does not work with any option that involves patching
the read-only kernel .text.
Since at least CONFIG_SMP_ON_UP is required in certain configurations,
flip the dependency to always allow the .text patching options but make
XIP_KERNEL have the dependency instead.
This is a prerequisite for allowing CONFIG_ARCH_MULTIPLATFORM to
be disabled.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Bindings expect Power-on node name to be "pon":
'power-on@800' do not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-4-krzysztof.kozlowski@linaro.org
Bindings expect LPG/PWM node name to be "pwm":
pmic@5: 'lpg' does not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-3-krzysztof.kozlowski@linaro.org
Bindings expect VADC node name to be "adc":
pmic@0: 'vadc@3100' does not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-2-krzysztof.kozlowski@linaro.org
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs. Include
gpio.h header if this is first usage of that flag.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220802153947.44457-5-krzysztof.kozlowski@linaro.org
Using node paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time). This also reduces the indentation making the code
easier to read.
The pre/post DTBS are the same.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220810080516.166866-3-krzysztof.kozlowski@linaro.org
Using node paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time). This also reduces the indentation making the code
easier to read.
The pre/post DTBS are the same.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220810080516.166866-2-krzysztof.kozlowski@linaro.org
Using node paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time). This also reduces the indentation making the code
easier to read.
The pre/post DTBS are the same.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220810080516.166866-1-krzysztof.kozlowski@linaro.org
ipq8065 SoC is based on ipq8064-v2.0 with a more clocked CPU and
an increased voltage output with the smb208 regulators.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220718161826.4943-3-ansuelsmth@gmail.com
